refactor(measured boot): remove weak definition of plat_get_measured_boot_data()

Weak definitions are confusing and should be avoided if possible.
Thus, turn plat_get_measured_boot_data() into a str

refactor(measured boot): remove weak definition of plat_get_measured_boot_data()

Weak definitions are confusing and should be avoided if possible.
Thus, turn plat_get_measured_boot_data() into a strong definition that
platforms must provide (if they need measured boot).

We could have moved the old weak implementation under plat/common as a
sane, default implementation that platforms may pull in if it suits
them. However, this implementation right now simply measures BL2,
which is not enough to get a complete measured boot flow, so this
patch just removes it.

This change only affects the Arm FVP platform, as no other upstream
platform implements measured boot at the moment.

Change-Id: If8680a39ae0ef1044ee981315439d5e0c8461229
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

show more ...

Merge "fix(drivers/mtd): fix MISRA issues and logic improvement" into integration

Merge "style(scmi_common): add \n to warning messages" into integration

fix(drivers/mtd): macronix quad enable bit issue

Invert test logic on the status register control to
fix issue when the bit SR_QUAD_EN_MX is not set.

Change-Id: I8b2f140219f124336bf96462abf9d9445d0

fix(drivers/mtd): macronix quad enable bit issue

Invert test logic on the status register control to
fix issue when the bit SR_QUAD_EN_MX is not set.

Change-Id: I8b2f140219f124336bf96462abf9d9445d0308bc
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

fix(drivers/mtd): fix MISRA issues and logic improvement

Fix MISRA issues and invert the spi_nor_ready status
to improve readability.
Remove an unneeded variable initialization.

Change-Id: I25a97fb

fix(drivers/mtd): fix MISRA issues and logic improvement

Fix MISRA issues and invert the spi_nor_ready status
to improve readability.
Remove an unneeded variable initialization.

Change-Id: I25a97fbd6c4389156b4f077b986019fa7c30a457
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

fix(drivers/st/pmic): missing error check

In pmic_operate(), "regulators" node value must be checked before
entering in the fdt_for_each_subnode loop.

Change-Id: I1460cd24ec56ec47ab644f396b71b92973

fix(drivers/st/pmic): missing error check

In pmic_operate(), "regulators" node value must be checked before
entering in the fdt_for_each_subnode loop.

Change-Id: I1460cd24ec56ec47ab644f396b71b92973e75fb4
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

fix(drivers/st/pmic): initialize i2c_state

Make sure that i2c->i2c_state is correctly initialized
with I2C_STATE_RESET value this avoid hi2c->lock to not
be set to 0 when calling stm32_i2c_init duri

fix(drivers/st/pmic): initialize i2c_state

Make sure that i2c->i2c_state is correctly initialized
with I2C_STATE_RESET value this avoid hi2c->lock to not
be set to 0 when calling stm32_i2c_init during platform
suspend/resume operations.

Change-Id: I3b4c1f9115589325eb256789a1764c322741db7d
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

fix(drivers/st/clk): use correct return value

The function stm32mp1_clk_init() returns an int. Return a negative
error value if the device tree is not found.

Change-Id: I422d5fea46c4d63d55a5b62e1db

fix(drivers/st/clk): use correct return value

The function stm32mp1_clk_init() returns an int. Return a negative
error value if the device tree is not found.

Change-Id: I422d5fea46c4d63d55a5b62e1db154c1f53f41b7
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

Merge changes from topic "io_stm32image" into integration

* changes:
fix(io_stm32image): invalidate cache on local buf
refactor(io_stm32image): add header size variable
fix(io_stm32image): uni

Merge changes from topic "io_stm32image" into integration

* changes:
fix(io_stm32image): invalidate cache on local buf
refactor(io_stm32image): add header size variable
fix(io_stm32image): uninitialized variable warning

show more ...

refactor(gicv3): use helper functions to get SPI/ESPI INTID limit

Use helper functions to get SPI and ESPI INTID limit, to remove
several pieces of similar code in gicv3 driver.

Signed-off-by: Heyi

refactor(gicv3): use helper functions to get SPI/ESPI INTID limit

Use helper functions to get SPI and ESPI INTID limit, to remove
several pieces of similar code in gicv3 driver.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: Iaf441fe5e333c4260e7f6d98df6fdd931591976d

show more ...

refactor(gicv3): add helper function to get the limit of ESPI INTID

Add helper function gicv3_get_espi_limit() to get the value of
(maximum extended SPI INTID + 1), so that some duplicated code can

refactor(gicv3): add helper function to get the limit of ESPI INTID

Add helper function gicv3_get_espi_limit() to get the value of
(maximum extended SPI INTID + 1), so that some duplicated code can be
removed later.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: I0355ca2647f872e8189add259f6c47d415494cce

show more ...

style(scmi_common): add \n to warning messages

Add newline(\n) to make the message clearer when the warnings are
really triggered.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: I5e

style(scmi_common): add \n to warning messages

Add newline(\n) to make the message clearer when the warnings are
really triggered.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: I5e2574a52c9065db32ecb4d453b9b02445f69a82

show more ...

refactor(gicv3): add helper function to get the limit of SPI INTID

Add helper function gicv3_get_spi_limit() to get the value of (maximum
SPI INTID + 1), so that some duplicated code can be removed

refactor(gicv3): add helper function to get the limit of SPI INTID

Add helper function gicv3_get_spi_limit() to get the value of (maximum
SPI INTID + 1), so that some duplicated code can be removed later.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: I160c8a88fbb71d22790b8999a84afbfba766f5e7

show more ...

Merge changes I85a87dc9,If75df769,I55b0c910 into integration

* changes:
feat(plat/st): add STM32MP_EMMC_BOOT option
feat(drivers/st): manage boot part in io_mmc
feat(drivers/mmc): boot partiti

Merge changes I85a87dc9,If75df769,I55b0c910 into integration

* changes:
feat(plat/st): add STM32MP_EMMC_BOOT option
feat(drivers/st): manage boot part in io_mmc
feat(drivers/mmc): boot partition read support

show more ...

Merge "fix(plat/marvell/armada): select correct pcie reference clock source" into integration

fix(io_stm32image): invalidate cache on local buf

When retrieving data from stm32 image file, the header is removed with
a memcpy that shifts the data to overwrite the useless header for next
binary

fix(io_stm32image): invalidate cache on local buf

When retrieving data from stm32 image file, the header is removed with
a memcpy that shifts the data to overwrite the useless header for next
binary.

STM32 binary from boot device:
|-------------------------------------|
| header | payload |
|-------------------------------------|

After the memcpy:
|-------------------------------------|
| payload | remain |
|-------------------------------------|

But the remaining data after the shifted payload is still in
the cache. As it is of no use for anyone, just invalidate the cache
at this address.
This is required if the DDR is mapped secure in BL2, and the secure
access is forbidden in BL33, or else TZC-400 issues an error.

Change-Id: Ice2af3b1ca49eccb79bfc62db60437e259d344ca
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

refactor(io_stm32image): add header size variable

A variable hdr_sz is created in stm32image_partition_read() function.
It just represents the size of the stm32 image header but it really
improves t

refactor(io_stm32image): add header size variable

A variable hdr_sz is created in stm32image_partition_read() function.
It just represents the size of the stm32 image header but it really
improves the readability of the function.

Change-Id: I95ec62a78a4b6c6a75b0d8c8aa0faef8bee424da
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

fix(io_stm32image): uninitialized variable warning

Fixes implementation against build warning reported by GCC:

drivers/st/io/io_stm32image.c: In function ‘stm32image_partition_read’:
drivers/st/io/

fix(io_stm32image): uninitialized variable warning

Fixes implementation against build warning reported by GCC:

drivers/st/io/io_stm32image.c: In function ‘stm32image_partition_read’:
drivers/st/io/io_stm32image.c:249:6: error: ‘result’ may be used
uninitialized in this function [-Werror=maybe-uninitialized]
int result;
^~~~~~

Actually, by construction the current implementation of function
stm32image_partition_read() does not mandate result to be initialized
since it always reaches the exit point with a valid value in 'result'.
Yet, this change prevents compiler from complaining and is more robust
against future changes in the implementation.

Change-Id: I383575edb605b7535398952a5fdfc266c0068c71
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

feat(drivers/st): manage boot part in io_mmc

Use dedicated read function for boot partition

Signed-off-by: Vyacheslav Yurkov <uvv.mail@gmail.com>
Change-Id: If75df7691fce0797205365736fc6e4e3429efdca

feat(drivers/mmc): boot partition read support

Added a public function to read blocks from a current boot partition.
switch between partitions has to respect eMMC partition switch timing.

Signed-of

feat(drivers/mmc): boot partition read support

Added a public function to read blocks from a current boot partition.
switch between partitions has to respect eMMC partition switch timing.

Signed-off-by: Vyacheslav Yurkov <uvv.mail@gmail.com>
Change-Id: I55b0c910314253e5647486609583fd290dadd30a

show more ...

fix(plat/marvell/a3720/uart): fix UART parent clock rate determination

The UART code for the A3K platform assumes that UART parent clock rate
is always 25 MHz. This is incorrect, because the xtal cl

fix(plat/marvell/a3720/uart): fix UART parent clock rate determination

The UART code for the A3K platform assumes that UART parent clock rate
is always 25 MHz. This is incorrect, because the xtal clock can also run
at 40 MHz (this is board specific).

The frequency of the xtal clock is determined by a value on a strapping
pin during SOC reset. The code to determine this frequency is already in
A3K's comphy driver.

Move the get_ref_clk() function from the comphy driver to a separate
file and use it for UART parent clock rate determination.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I8bb18a2d020ef18fe65aa06ffa4ab205c71be92e

show more ...

fix(plat/marvell/armada): select correct pcie reference clock source

when comphy is in pcie mode, correct reference clock need be
selected according to SAR register that reflect the CPx_MPP boot
str

fix(plat/marvell/armada): select correct pcie reference clock source

when comphy is in pcie mode, correct reference clock need be
selected according to SAR register that reflect the CPx_MPP boot
strapping pins. Either from external or from internal

Signed-off-by: Guo Yi <yguo@cavium.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Change-Id: I99ed64a141e85174cc0f8e9dab5886ab2506efa1

show more ...

fix(plat/marvell/a3720/uart): fix configuring UART clock

When configuring the UART_BAUD_REG register, the function
console_a3700_core_init() currently only changes the baud divisor field,
leaving ot

fix(plat/marvell/a3720/uart): fix configuring UART clock

When configuring the UART_BAUD_REG register, the function
console_a3700_core_init() currently only changes the baud divisor field,
leaving other fields to their previous value.

This is incorrect, because the baud divisor is computed with the
assumption that the parent clock rate is 25 MHz, and since the other
fields in this register configure the parent clock, which could have
been changed by U-Boot or Linux.

Fix this function to also configure the other fields so that the UART
parent clock is selected to be the xtal clock.

For example without this change TF-A prints only

ERROR: a3700_system_off needs to be implemented

followed by garbage after plat_crash_console_init() is called.

After applying this change instead of garbage it also print crash info:

PANIC at PC : 0x0000000004023800

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I72f338355cc60d939b8bb978d9c7fdd576416b81

show more ...

fix(plat/marvell/a3720/uart): fix UART clock rate value and divisor calculation

UART parent clock is by default the platform's xtal clock, which is
25 MHz.

The value defined in the driver, though,

fix(plat/marvell/a3720/uart): fix UART clock rate value and divisor calculation

UART parent clock is by default the platform's xtal clock, which is
25 MHz.

The value defined in the driver, though, is 25.8048 MHz. This is a hack
for the suboptimal divisor calculation
Divisor = UART clock / (16 * baudrate)
which does not use rounding division, resulting in a suboptimal value
for divisor if the correct parent clock rate was used.

Change the code for divisor calculation to
Divisor = Round(UART clock / (16 * baudrate))
and change the parent clock rate value to 25 MHz.

The final UART divisor for default baudrate 115200 is not affected by
this change.

(Note that the parent clock rate should not be defined via a macro,
since the xtal clock can also be 40 MHz. This is outside of the scope of
this fix, though.)

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Iaa401173df87aec94f2dd1b38a90fb6ed0bf0ec6

show more ...

fix(driver/auth): avoid NV counter upgrade without certificate validation

Platform NV counter get updated (if cert NV counter > plat NV counter)
before authenticating the certificate if the platform

fix(driver/auth): avoid NV counter upgrade without certificate validation

Platform NV counter get updated (if cert NV counter > plat NV counter)
before authenticating the certificate if the platform specifies NV
counter method before signature authentication in its CoT, and this
provides an opportunity for a tempered certificate to upgrade the
platform NV counter. This is theoretical issue, as in practice none
of the standard CoT (TBBR, dualroot) or upstream platforms ones (NXP)
exercised this issue.

To fix this issue, modified the auth_nvctr method to do only NV
counter check, and flags if the NV counter upgrade is needed or not.
Then ensured that the platform NV counter gets upgraded with the NV
counter value from the certificate only after that certificate gets
authenticated.

This change is verified manually by modifying the CoT that specifies
certificate with:
1. NV counter authentication before signature authentication
method
2. NV counter authentication method only

Change-Id: I1ad17f1a911fb1035a1a60976cc26b2965b05166
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

show more ...