| #
79664cfc |
| 15-Dec-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I2b23e7c8,I779587af,Ic46de7a4,If753e987,I00171b05, ... into integration
* changes: fix(layerscape): unlock write access SMMU_CBn_ACTLR fix(nxp-ddr): add checking return value fea
Merge changes I2b23e7c8,I779587af,Ic46de7a4,If753e987,I00171b05, ... into integration
* changes: fix(layerscape): unlock write access SMMU_CBn_ACTLR fix(nxp-ddr): add checking return value feat(lx2): enable OCRAM ECC fix(nxp-tools): fix coverity issue fix(nxp-ddr): fix coverity issue fix(nxp-ddr): fix underrun coverity issue fix(nxp-drivers): fix sd secure boot failure feat(lx2): support more variants fix(lx2): init global data before using it fix(ls1046a): 4 keys secureboot failure resolved fix(nxp-crypto): fix secure boot assert inclusion fix(nxp-crypto): fix coverity issue fix(nxp-drivers): fix fspi coverity issue fix(nxp-drivers): fix tzc380 memory regions config fix(layerscape): fix nv_storage assert checking fix(nxp-ddr): apply Max CDD values for warm boot fix(nxp-ddr): use CDDWW for write to read delay fix(layerscape): fix errata a008850
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| #
334badb5 |
| 18-May-2022 |
Pankaj Gupta <pankaj.gupta@nxp.com> |
fix(nxp-crypto): fix secure boot assert inclusion
plat-ls: fix for assert inclusion done for secure boot.
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Signed-off-by: Jiafei Pan <Jiafei.Pan@nx
fix(nxp-crypto): fix secure boot assert inclusion
plat-ls: fix for assert inclusion done for secure boot.
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: Iac8314e5b1c2f0a22fa2ff3ffbccc53ed778ddd9
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| #
e4922991 |
| 17-May-2022 |
Pankaj Gupta <pankaj.gupta@nxp.com> |
fix(nxp-crypto): fix coverity issue
In function "desc_length", LSB byte of the first word of the descriptor will be anded with 0x7F, to get the number of words constructing the descriptor.
LSB byte
fix(nxp-crypto): fix coverity issue
In function "desc_length", LSB byte of the first word of the descriptor will be anded with 0x7F, to get the number of words constructing the descriptor.
LSB byte of the first word of the descriptor is auto-incremented with each add_word used while constructing the descriptor.
But if function "desc_add_word" is called more than MAX_DESC_SIZE_WORDS times, then only the function "desc_length", can return number of words greater than MAX_DESC_SIZE_WORDS.
This is the condition when core can overwrite the out of bound memory.
Hence, the following fix is needed: - Before adding any new word to the descriptor, a check for max word length needs to be added, into these functions: "desc_add_word" & "desc_add_ptr".
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: If896cd2e02ecde72fb09c5147119dec4f2f84bc3
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| #
17671798 |
| 23-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "bug-fix" into integration
* changes: fix(nxp-crypto): refine code to avoid hang issue for some of toolchain build(changelog): add new scope for nxp crypto fix(lx2): d
Merge changes from topic "bug-fix" into integration
* changes: fix(nxp-crypto): refine code to avoid hang issue for some of toolchain build(changelog): add new scope for nxp crypto fix(lx2): drop erratum A-009810
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| #
fa7fdfab |
| 18-Nov-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
fix(nxp-crypto): refine code to avoid hang issue for some of toolchain
bitfield structure maybe has strict-aliasing issue for some compiler, for example the old code has hang issue for yocto 3.4 too
fix(nxp-crypto): refine code to avoid hang issue for some of toolchain
bitfield structure maybe has strict-aliasing issue for some compiler, for example the old code has hang issue for yocto 3.4 toolchain, so refine the code to avoid to use bitfield structure.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: I6b6d7597311240dd6d6b8ca4ce508c69332f9c68
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| #
9719e19a |
| 24-Mar-2021 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes I500ddbe9,I9c10dac9,I53bfff85,I06f7594d,I24bff8d4, ... into integration
* changes: nxp lx2160a-aqds: new plat based on soc lx2160a NXP lx2160a-rdb: new plat based on SoC lx2160a
Merge changes I500ddbe9,I9c10dac9,I53bfff85,I06f7594d,I24bff8d4, ... into integration
* changes: nxp lx2160a-aqds: new plat based on soc lx2160a NXP lx2160a-rdb: new plat based on SoC lx2160a nxp lx2162aqds: new plat based on soc lx2160a nxp: errata handling at soc level for lx2160a nxp: make file for loading additional ddr image nxp: adding support of soc lx2160a nxp: deflt hdr files for soc & their platforms nxp: platform files for bl2 and bl31 setup nxp: warm reset support to retain ddr content nxp: nv storage api on platforms nxp: supports two mode of trusted board boot nxp: fip-handler for additional fip_fuse.bin nxp: fip-handler for additional ddr-fip.bin nxp: image loader for loading fip image nxp: svp & sip smc handling nxp: psci platform functions used by lib/psci nxp: helper function used by plat & common code nxp: add data handler used by bl31 nxp: adding the driver.mk file nxp-tool: for creating pbl file from bl2 nxp: adding the smmu driver nxp: cot using nxp internal and mbedtls nxp:driver for crypto h/w accelerator caam nxp:add driver support for sd and emmc nxp:add qspi driver nxp: add flexspi driver support nxp: adding gic apis for nxp soc nxp: gpio driver support nxp: added csu driver nxp: driver pmu for nxp soc nxp: ddr driver enablement for nxp layerscape soc nxp: i2c driver support. NXP: Driver for NXP Security Monitor NXP: SFP driver support for NXP SoC NXP: Interconnect API based on ARM CCN-CCI driver NXP: TZC API to configure ddr region NXP: Timer API added to enable ARM generic timer nxp: add dcfg driver nxp:add console driver for nxp platform tools: add mechanism to allow platform specific image UUID tbbr-cot: conditional definition for the macro tbbr-cot: fix the issue of compiling time define cert_create: updated tool for platform defined certs, keys & extensions tbbr-tools: enable override TRUSTED_KEY_CERT
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| #
a0edacb8 |
| 09-Dec-2020 |
Pankaj Gupta <pankaj.gupta@nxp.com> |
nxp:driver for crypto h/w accelerator caam
NXP has hardware crypto accelerator called CAAM. - Work with Job ring - Jobs are submitted to CAAM in the form of 64 word descriptor.
Signed-off-by: Ruc
nxp:driver for crypto h/w accelerator caam
NXP has hardware crypto accelerator called CAAM. - Work with Job ring - Jobs are submitted to CAAM in the form of 64 word descriptor.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Change-Id: I02bcfce68143b8630e1833a74c4b126972f4323d
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