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1c63cd61 |
| 06-Nov-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "qti-rb3gen2" into integration
* changes: docs(maintainers): update QTI platform maintainers docs(qti): add RB3Gen2 platform documentation docs(qti): move documentatio
Merge changes from topic "qti-rb3gen2" into integration
* changes: docs(maintainers): update QTI platform maintainers docs(qti): add RB3Gen2 platform documentation docs(qti): move documentation under docs/plat/qti/ feat(kodiak): add support for RB3Gen2 platform feat(qti): introduce basic XPU driver refactor(qti): introduce SoC codename as Kodiak feat(qti): add TF-A BL2 common platform framework refactor(qti): refactor RNG as a proper driver fix(qti): fix config PLAT_XLAT_TABLES_DYNAMIC feat(qti): add BL32 support refactor(qti): make UART config independent refactor(qti): make CNTFRQ config independent fix(qti): fix build without coreboot
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| #
368a1dd3 |
| 25-Sep-2025 |
Sumit Garg <sumit.garg@oss.qualcomm.com> |
docs(qti): move documentation under docs/plat/qti/
Move documentation under docs/plat/qti/ to become a consolidated place for QTI platforms documentation.
Change-Id: Ief6f1f811de504761f00ce1acbd608
docs(qti): move documentation under docs/plat/qti/
Move documentation under docs/plat/qti/ to become a consolidated place for QTI platforms documentation.
Change-Id: Ief6f1f811de504761f00ce1acbd608663eee344f Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
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d1b5ada8 |
| 19-Jul-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "msm8916-plats" into integration
* changes: docs(msm8916): document new platforms feat(msm8916): add port for MDM9607 refactor(msm8916): handle single core platforms
Merge changes from topic "msm8916-plats" into integration
* changes: docs(msm8916): document new platforms feat(msm8916): add port for MDM9607 refactor(msm8916): handle single core platforms feat(msm8916): add port for MSM8939 feat(msm8916): power on L2 caches for secondary clusters feat(msm8916): initialize CCI-400 for multiple clusters refactor(msm8916): handle multiple CPU clusters feat(msm8916): add port for MSM8909 feat(msm8916): clear CACHE_LOCK for MMU-500 r2p0+ style(msm8916): add missing braces to while statements
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c97c7ebf |
| 02-Apr-2023 |
Stephan Gerhold <stephan@gerhold.net> |
docs(msm8916): document new platforms
Document the new platform build options for the MSM8916 port which now supports multiple similar Qualcomm SoCs:
- Snapdragon 410 (PLAT=msm8916) as before -
docs(msm8916): document new platforms
Document the new platform build options for the MSM8916 port which now supports multiple similar Qualcomm SoCs:
- Snapdragon 410 (PLAT=msm8916) as before - Snapdragon 615 (PLAT=msm8939) - Snapdragon 210 (PLAT=msm8909) - Snapdragon X5 Modem (PLAT=mdm9607)
The latter two use AArch32-only ARM Cortex-A7 cores that only support using BL32/SP_MIN and not BL31 on AArch64.
Change-Id: I9fffe60dd0ad2acc18f006f11e91854b9e8dcb8f Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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c4c7efe7 |
| 22-Jun-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "msm8916-spmin" into integration
* changes: docs(msm8916): document new build options feat(msm8916): allow selecting which UART to use feat(msm8916): add SP_MIN port f
Merge changes from topic "msm8916-spmin" into integration
* changes: docs(msm8916): document new build options feat(msm8916): allow selecting which UART to use feat(msm8916): add SP_MIN port for AArch32 refactor(msm8916): detect cold boot in plat_get_my_entrypoint feat(msm8916): add Test Secure Payload (TSP) port build(msm8916): place bl32 directly after bl31 refactor(msm8916): separate common platform setup code
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b4e49e3f |
| 02-Apr-2023 |
Stephan Gerhold <stephan@gerhold.net> |
docs(msm8916): document new build options
Update the MSM8916 platform documentation with the new build options introduced in the previous changes:
- AArch32 (BL32/SP_MIN) - UART selection
Whil
docs(msm8916): document new build options
Update the MSM8916 platform documentation with the new build options introduced in the previous changes:
- AArch32 (BL32/SP_MIN) - UART selection
While at it, also document the build options that allow changing the memory addresses (PRELOADED_BL33_BASE, BL31_BASE, BL32_BASE).
Change-Id: I2370c8264982317693f69fda0b03a255f12bafe2 Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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e0a6a512 |
| 03-Feb-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "msm8916" into integration
* changes: feat(msm8916): allow booting secondary CPU cores feat(msm8916): setup hardware for non-secure world feat(gic): allow overriding G
Merge changes from topic "msm8916" into integration
* changes: feat(msm8916): allow booting secondary CPU cores feat(msm8916): setup hardware for non-secure world feat(gic): allow overriding GICD_PIDR2_GICV2 address feat(msm8916): initial platform port docs(msm8916): new port for Qualcomm Snapdragon 410
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fa145398 |
| 01-Dec-2021 |
Stephan Gerhold <stephan@gerhold.net> |
docs(msm8916): new port for Qualcomm Snapdragon 410
The Qualcomm Snapdragon 410 is Qualcomm's first 64-bit SoC, released in 2014 with four ARM Cortex-A53 cores. There are differents variants (MSM891
docs(msm8916): new port for Qualcomm Snapdragon 410
The Qualcomm Snapdragon 410 is Qualcomm's first 64-bit SoC, released in 2014 with four ARM Cortex-A53 cores. There are differents variants (MSM8916, APQ8016(E), ...) that are all very similar. A popular device based on APQ8016E is the DragonBoard 410c single-board computer, but the SoC is also used in various mid-range smartphones/tablets.
This commit adds documentation for a minimal, community-maintained port of TF-A/BL31 for MSM8916. The actual platform port is added in the following four separate small commits to simplify the review process. The code is primarily based on the information from the public Snapdragon 410E Technical Reference Manual [1], combined with a lot of trial and error to actually make it work.
Note that this port is a pure community effort without any commercial interests and is not related to Qualcomm in any way. The main motivation for this port is to have a minimal, updatable firmware since this old chip does not receive many updates anymore from Qualcomm. It works quite well for many use cases so I am willing to maintain it as a "code owner". I have also added Nikita Travkin as second code owner to help with reviews.
The main limitation so far is the lack of memory protection for TF-A. This is similar to the ports for the Raspberry Pi but in this case not a lack of hardware support but rather a lack of documentation. However, this does not limit the usefulness of the port when used as a minimal PSCI implementation.
[1]: https://developer.qualcomm.com/download/sd410/snapdragon-410e-technical-reference-manual.pdf
Change-Id: I676adf86061638cfc2f3ae8615470d145e84f172 Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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