| #
f97062a5 |
| 15-Nov-2019 |
Sumit Garg <sumit.garg@linaro.org> |
docs: Update docs with firmware encryption feature
Update documentation with optional firmware encryption feature.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Change-Id: I26691b18e1ee52a73090
docs: Update docs with firmware encryption feature
Update documentation with optional firmware encryption feature.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Change-Id: I26691b18e1ee52a73090954260f26f2865c4e05a
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| #
7cda17bb |
| 15-Nov-2019 |
Sumit Garg <sumit.garg@linaro.org> |
drivers: crypto: Add authenticated decryption framework
Add framework for autheticated decryption of data. Currently this patch optionally imports mbedtls library as a backend if build option "DECRY
drivers: crypto: Add authenticated decryption framework
Add framework for autheticated decryption of data. Currently this patch optionally imports mbedtls library as a backend if build option "DECRYPTION_SUPPORT = aes_gcm" is set to perform authenticated decryption using AES-GCM algorithm.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Change-Id: I2966f0e79033151012bf4ffc66f484cd949e7271
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| #
7c72beae |
| 26-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "tools: Small improvement to print_memory_map script" into integration
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| #
7390559b |
| 25-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "SPMD: generate and add Secure Partition blobs into FIP" into integration
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| #
ce2b1ec6 |
| 14-Jan-2020 |
Manish Pandey <manish.pandey2@arm.com> |
SPMD: generate and add Secure Partition blobs into FIP
Till now TF-A allows limited number of external images to be made part of FIP. With SPM coming along, there may exist multiple SP packages whic
SPMD: generate and add Secure Partition blobs into FIP
Till now TF-A allows limited number of external images to be made part of FIP. With SPM coming along, there may exist multiple SP packages which need to be inserted into FIP. To achieve this we need a more scalable approach to feed SP packages to FIP.
This patch introduces changes in build system to generate and add SP packages into FIP based on information provided by platform. Platform provides information in form of JSON which contains layout description of available Secure Partitions. JSON parser script is invoked by build system early on and generates a makefile which updates FIP, SPTOOL and FDT arguments which will be used by build system later on for final packaging.
"SP_LAYOUT_FILE" passed as a build argument and can be outside of TF-A tree. This option will be used only when SPD=spmd.
For each SP, generated makefile will have following entries - FDT_SOURCES += sp1.dts - SPTOOL_ARGS += -i sp1.img:sp1.dtb -o sp1.pkg - FIP_ARGS += --blob uuid=XXXX-XXX...,file=SP1.pkg
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ib6a9c064400caa3cd825d9886008a3af67741af7
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| #
b890b36d |
| 13-Feb-2020 |
Louis Mayencourt <louis.mayencourt@arm.com> |
tools: Small improvement to print_memory_map script
This patch: - Add the __COHERENT_RAM_START__ and __COHERENT_RAM_END__ symbols. - Improve how the symbols are found with a regex. - Add a build opt
tools: Small improvement to print_memory_map script
This patch: - Add the __COHERENT_RAM_START__ and __COHERENT_RAM_END__ symbols. - Improve how the symbols are found with a regex. - Add a build option to revert the memory layout output.
Change-Id: I54ec660261431bc98d78acb0f80e3d95bc5397ac Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| #
21c4f56f |
| 11-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "lm/fconf" into integration
* changes: arm-io: Panic in case of io setup failure MISRA fix: Use boolean essential type fconf: Add documentation fconf: Move platform
Merge changes from topic "lm/fconf" into integration
* changes: arm-io: Panic in case of io setup failure MISRA fix: Use boolean essential type fconf: Add documentation fconf: Move platform io policies into fconf fconf: Add mbedtls shared heap as property fconf: Add TBBR disable_authentication property fconf: Add dynamic config DTBs info as property fconf: Populate properties from dtb during bl2 setup fconf: Load config dtb from bl1 fconf: initial commit
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| #
c8e0f950 |
| 10-Feb-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Make PAC demangling more generic" into integration
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| #
68c76088 |
| 06-Feb-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Make PAC demangling more generic
At the moment, address demangling is only used by the backtrace functionality. However, at some point, other parts of the TF-A codebase may want to use it. The 'dema
Make PAC demangling more generic
At the moment, address demangling is only used by the backtrace functionality. However, at some point, other parts of the TF-A codebase may want to use it. The 'demangle_address' function is replaced with a single XPACI instruction which is also added in 'do_crash_reporting()'.
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Change-Id: I4424dcd54d5bf0a5f9b2a0a84c4e565eec7329ec
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| #
0a6e7e3b |
| 24-Oct-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Move platform io policies into fconf
Use the firmware configuration framework to store the io_policies information inside the configuration device tree instead of the static structure in the
fconf: Move platform io policies into fconf
Use the firmware configuration framework to store the io_policies information inside the configuration device tree instead of the static structure in the code base.
The io_policies required by BL1 can't be inside the dtb, as this one is loaded by BL1, and only available at BL2.
This change currently only applies to FVP platform.
Change-Id: Ic9c1ac3931a4a136aa36f7f58f66d3764c1bfca1 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| #
350aed43 |
| 07-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "Adds option to read ROTPK from registers for FVP" into integration
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| #
a6ffddec |
| 06-Dec-2019 |
Max Shvetsov <maksims.svecovs@arm.com> |
Adds option to read ROTPK from registers for FVP
Enables usage of ARM_ROTPK_LOCATION=regs for FVP board. Removes hard-coded developer keys. Instead, setting ARM_ROTPK_LOCATION=devel_* takes keys fro
Adds option to read ROTPK from registers for FVP
Enables usage of ARM_ROTPK_LOCATION=regs for FVP board. Removes hard-coded developer keys. Instead, setting ARM_ROTPK_LOCATION=devel_* takes keys from default directory. In case of ROT_KEY specified - generates a new hash and replaces the original.
Note: Juno board was tested by original feature author and was not tested for this patch since we don't have access to the private key. Juno implementation was moved to board-specific file without changing functionality. It is not known whether byte-swapping is still needed for this platform.
Change-Id: I0fdbaca0415cdcd78f3a388551c2e478c01ed986 Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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| #
3a415eb9 |
| 06-Feb-2020 |
György Szing <gyorgy.szing@arm.com> |
Merge "doc: Remove backquotes from external hyperlinks" into integration
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| #
8d52e16b |
| 03-Feb-2020 |
Imre Kis <imre.kis@arm.com> |
doc: Remove backquotes from external hyperlinks
Since Sphinx 2.3.0 backquotes are replaced to \textasciigrave{} during building latexpdf. Using this element in a \sphinxhref{} breaks the build. In o
doc: Remove backquotes from external hyperlinks
Since Sphinx 2.3.0 backquotes are replaced to \textasciigrave{} during building latexpdf. Using this element in a \sphinxhref{} breaks the build. In order to avoid this error backquotes must not be used in external hyperlinks.
Signed-off-by: Imre Kis <imre.kis@arm.com> Change-Id: Ie3cf454427e3d5a7b7f9829b42be45aebda7f0dd
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| #
dcd03ce7 |
| 30-Jan-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "sb/select-cot" into integration
* changes: Introduce COT build option cert_create: Remove references to TBBR in common code cert_create: Introduce COT build option
Merge changes from topic "sb/select-cot" into integration
* changes: Introduce COT build option cert_create: Remove references to TBBR in common code cert_create: Introduce COT build option cert_create: Introduce TBBR CoT makefile
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| #
3bff910d |
| 15-Jan-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Introduce COT build option
Allows to select the chain of trust to use when the Trusted Boot feature is enabled. This affects both the cert_create tool and the firmware itself.
Right now, the only a
Introduce COT build option
Allows to select the chain of trust to use when the Trusted Boot feature is enabled. This affects both the cert_create tool and the firmware itself.
Right now, the only available CoT is TBBR.
Change-Id: I7ab54e66508a1416cb3fcd3dfb0f055696763b3d Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| #
b012454d |
| 28-Jan-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Measured Boot: add function for hash calculation" into integration
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| #
8c105290 |
| 23-Jan-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Measured Boot: add function for hash calculation
This patch adds 'calc_hash' function using Mbed TLS library required for Measured Boot support.
Change-Id: Ifc5aee0162d04db58ec6391e0726a526f29a52bb
Measured Boot: add function for hash calculation
This patch adds 'calc_hash' function using Mbed TLS library required for Measured Boot support.
Change-Id: Ifc5aee0162d04db58ec6391e0726a526f29a52bb Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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| #
0281e60c |
| 27-Jan-2020 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "pie" into integration
* changes: uniphier: make all BL images completely position-independent uniphier: make uniphier_mmap_setup() work with PIE uniphier: pass SCP ba
Merge changes from topic "pie" into integration
* changes: uniphier: make all BL images completely position-independent uniphier: make uniphier_mmap_setup() work with PIE uniphier: pass SCP base address as a function parameter uniphier: set buffer offset and length for io_block dynamically uniphier: use more mmap_add_dynamic_region() for loading images bl_common: add BL_END macro uniphier: turn on ENABLE_PIE TSP: add PIE support BL2_AT_EL3: add PIE support BL31: discard .dynsym .dynstr .hash sections to make ENABLE_PIE work PIE: pass PIE options only to BL31 Build: support per-BL LDFLAGS
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| #
d974301d |
| 17-Jan-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
TSP: add PIE support
This implementation simply mimics that of BL31.
Change-Id: Ibbaa4ca012d38ac211c52b0b3e97449947160e07 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
69af7fcf |
| 17-Jan-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
BL2_AT_EL3: add PIE support
This implementation simply mimics that of BL31.
I did not implement the ENABLE_PIE support for BL2_IN_XIP_MEM=1 case. It would make the linker script a bit uglier.
Chan
BL2_AT_EL3: add PIE support
This implementation simply mimics that of BL31.
I did not implement the ENABLE_PIE support for BL2_IN_XIP_MEM=1 case. It would make the linker script a bit uglier.
Change-Id: If3215abd99f2758dfb232e44b50320d04eba808b Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
8a0a8199 |
| 02-Jan-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "bl31: Split into two separate memory regions" into integration
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| #
f8578e64 |
| 18-Oct-2018 |
Samuel Holland <samuel@sholland.org> |
bl31: Split into two separate memory regions
Some platforms are extremely memory constrained and must split BL31 between multiple non-contiguous areas in SRAM. Allow the NOBITS sections (.bss, stack
bl31: Split into two separate memory regions
Some platforms are extremely memory constrained and must split BL31 between multiple non-contiguous areas in SRAM. Allow the NOBITS sections (.bss, stacks, page tables, and coherent memory) to be placed in a separate region of RAM from the loaded firmware image.
Because the NOBITS region may be at a lower address than the rest of BL31, __RW_{START,END}__ and __BL31_{START,END}__ cannot include this region, or el3_entrypoint_common would attempt to invalidate the dcache for the entire address space. New symbols __NOBITS_{START,END}__ are added when SEPARATE_NOBITS_REGION is enabled, and the dcached for the NOBITS region is invalidated separately.
Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: Idedfec5e4dbee77e94f2fdd356e6ae6f4dc79d37
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| #
86ed8953 |
| 20-Dec-2019 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "debugfs: add SMC channel" into integration
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| #
91ecca23 |
| 20-Dec-2019 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "spm-devel" into integration
* changes: spm-mm: Rename aarch64 assembly files spm-mm: Rename source files spm-mm: Rename spm_shim_private.h spm-mm: Rename spm_privat
Merge changes from topic "spm-devel" into integration
* changes: spm-mm: Rename aarch64 assembly files spm-mm: Rename source files spm-mm: Rename spm_shim_private.h spm-mm: Rename spm_private.h spm-mm: Rename component makefile spm-mm: Remove mm_svc.h header spm-mm: Refactor spm_svc.h and its contents spm-mm: Refactor secure_partition.h and its contents spm: Remove SPM Alpha 1 prototype and support files Remove dependency between SPM_MM and ENABLE_SPM build flags
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