History log of /rk3399_ARM-atf/changelog.yaml (Results 1 – 25 of 226)
Revision Date Author Comments
# 1d43636d 20-Nov-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge "fix(changelog): fix platform order and add smcc to deprecated" into integration


# 07dc387d 17-Nov-2025 Arvind Ram Prakash <arvind.ramprakash@arm.com>

fix(changelog): fix platform order and add smcc to deprecated

Some platforms were not added in alphabetical order
and this patch fixes it. This patch also deprecates
the scope "smcc".

Signed-off-by

fix(changelog): fix platform order and add smcc to deprecated

Some platforms were not added in alphabetical order
and this patch fixes it. This patch also deprecates
the scope "smcc".

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Ieea2d49ab7d24377edad840f25af563f38ac7e41

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# 7303319b 08-Nov-2025 Chris Kay <chris.kay@arm.com>

Merge changes from topic "NUMA_AWARE_PER_CPU" into integration

* changes:
docs(maintainers): add per-cpu framework into maintainers.rst
feat(per-cpu): add documentation for per-cpu framework
f

Merge changes from topic "NUMA_AWARE_PER_CPU" into integration

* changes:
docs(maintainers): add per-cpu framework into maintainers.rst
feat(per-cpu): add documentation for per-cpu framework
feat(rdv3): enable numa aware per-cpu for RD-V3-Cfg2
feat(per-cpu): migrate amu_ctx to per-cpu framework
feat(per-cpu): migrate spm_core_context to per-cpu framework
feat(per-cpu): migrate psci_ns_context to per-cpu framework
feat(per-cpu): migrate psci_cpu_pd_nodes to per-cpu framework
feat(per-cpu): migrate rmm_context to per-cpu framework
feat(per-cpu): integrate per-cpu framework into BL31/BL32
feat(per-cpu): introduce framework accessors/definers
feat(per-cpu): introduce linker changes for NUMA aware per-cpu framework
docs(changelog): add scope for per-cpu framework

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# b7797995 01-Apr-2025 Rohit Mathew <rohit.mathew@arm.com>

docs(changelog): add scope for per-cpu framework

define "per-cpu" as the scope to be used for any changes to per-cpu
framework.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I076eda

docs(changelog): add scope for per-cpu framework

define "per-cpu" as the scope to be used for any changes to per-cpu
framework.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I076eda00f2aeab2e22dec0e1d7e3687737473848

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# 1c63cd61 06-Nov-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes from topic "qti-rb3gen2" into integration

* changes:
docs(maintainers): update QTI platform maintainers
docs(qti): add RB3Gen2 platform documentation
docs(qti): move documentatio

Merge changes from topic "qti-rb3gen2" into integration

* changes:
docs(maintainers): update QTI platform maintainers
docs(qti): add RB3Gen2 platform documentation
docs(qti): move documentation under docs/plat/qti/
feat(kodiak): add support for RB3Gen2 platform
feat(qti): introduce basic XPU driver
refactor(qti): introduce SoC codename as Kodiak
feat(qti): add TF-A BL2 common platform framework
refactor(qti): refactor RNG as a proper driver
fix(qti): fix config PLAT_XLAT_TABLES_DYNAMIC
feat(qti): add BL32 support
refactor(qti): make UART config independent
refactor(qti): make CNTFRQ config independent
fix(qti): fix build without coreboot

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# ac44b9c7 25-Sep-2025 Sumit Garg <sumit.garg@oss.qualcomm.com>

feat(kodiak): add support for RB3Gen2 platform

RB3Gen2 is an IoT platform based on Kodiak SoC. Details about this
platform can be found here [1]. The boot flow with TF-A/OP-TEE is:

PBL (ROM) -> X

feat(kodiak): add support for RB3Gen2 platform

RB3Gen2 is an IoT platform based on Kodiak SoC. Details about this
platform can be found here [1]. The boot flow with TF-A/OP-TEE is:

PBL (ROM) -> XBL -> BL2 -> BL31 -> BL33 -> Normal world OS
|
--> BL32

Steps to build TF-A for RB3Gen2:

$ make -j`nproc` PLAT=rb3gen2 SPD=opteed QTISECLIB_PATH=<qtiseclib-path>
BL32=<path-to-optee-bin> BL33=<path-to-os-bootloader-bin> fip all

$ ./tools/qti/generate_fip_elf.sh build/rb3gen2/release/fip.bin 0x9fc00000

The resulting fip.elf should be flashed in uefi_a partition on UFS flash
storage.

Note here that the bl2.elf generated requires to be signed as TZ image
with QTI signing involved. There is an ongoing effort to enable OEM only
signing for future boards support.

[1] https://www.qualcomm.com/developer/hardware/rb3-gen-2-development-kit

Change-Id: Ic19f28a5f559a0da28337f2d8da0d0e289a94514
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>

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# 6091f03d 25-Sep-2025 Sumit Garg <sumit.garg@oss.qualcomm.com>

refactor(qti): introduce SoC codename as Kodiak

Qualcomm has recently started using SoC codenames for upstream support
with Linux kernel being the first adoptor. Using SoC codenames for
upstream pro

refactor(qti): introduce SoC codename as Kodiak

Qualcomm has recently started using SoC codenames for upstream support
with Linux kernel being the first adoptor. Using SoC codenames for
upstream projects removes the need to follow different product names
like for kodiak which is also known as sc7280, qcm6490 etc.

Let's follow this practice of using SoC codenames for TF-A project too
beginning with Kodiak. While doing that let's refactor SoC and board
specific files where the existing support for sc7280 has been renamed to
sc7280_chrome to reflect it's usage.

Change-Id: I236fadf8ae9550f94deb05ebfed17e2ddbd69509
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>

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# 673c4443 17-Oct-2025 Mark Dykes <mark.dykes@arm.com>

Merge "feat(rk3568): support SCMI for clock/reset domain" into integration


# 4e1ccc60 29-Sep-2024 Shengfei Xu <xsf@rock-chips.com>

feat(rk3568): support SCMI for clock/reset domain

rockchip scmi clock controls clocks which only available in secure mode.

Change-Id: Ide3a8dac72512ce79331592c3cbb86577de7df70
Signed-off-by: Shengf

feat(rk3568): support SCMI for clock/reset domain

rockchip scmi clock controls clocks which only available in secure mode.

Change-Id: Ide3a8dac72512ce79331592c3cbb86577de7df70
Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

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# d7a21424 08-Oct-2025 Chris Kay <chris.kay@arm.com>

Merge "chore(changelog): add Visual Studio Code scope" into integration


# 021824b9 07-Oct-2025 Mark Dykes <mark.dykes@arm.com>

Merge "build(changelog): add new scope for Altera platform" into integration


# b018f8d5 06-Oct-2025 sieumunt <sieumun93@gmail.com>

build(changelog): add new scope for Altera platform

Add new scope for Altera platform.

Change-Id: I8a9ab38e8e5c5b7b36f957309266fedff310f3c2
Signed-off-by: Sieu Mun Tang <sieumun93@gmail.com>


# 01d01423 01-Oct-2025 Chris Kay <chris.kay@arm.com>

chore(changelog): add Visual Studio Code scope

Change-Id: Ia6d05504b801a9792409023b365527165fc7f997
Signed-off-by: Chris Kay <chris.kay@arm.com>


# 8e94c578 01-Oct-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes from topic "ahmed-azeem/introduce-rdaspen" into integration

* changes:
feat(dsu): enable PMU registers access at EL1
feat(rdaspen): add DSU to the device tree
feat(rdaspen): add

Merge changes from topic "ahmed-azeem/introduce-rdaspen" into integration

* changes:
feat(dsu): enable PMU registers access at EL1
feat(rdaspen): add DSU to the device tree
feat(rdaspen): add DSU support
docs(rdaspen): introduce rdaspen docs
feat(rdaspen): enable tbb on rd-aspen platform
feat(gicv3): add GIC-720AE model id
feat(rdaspen): add BL31 for RD-Aspen platform
feat(rdaspen): introduce Arm RD-Aspen platform

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# 74ac1efc 17-Mar-2025 Ahmed Azeem <ahmed.azeem@arm.com>

docs(rdaspen): introduce rdaspen docs

RD-Aspen platform is formally introduced into the
documentation.

Refactors RD platforms separately, and a generic
Automotive RD index doc file is created.

Mai

docs(rdaspen): introduce rdaspen docs

RD-Aspen platform is formally introduced into the
documentation.

Refactors RD platforms separately, and a generic
Automotive RD index doc file is created.

Maintainers list updated for platform maintainer
of rdaspen.

Change-Id: I289a8caaa6f0e34e953f4101ee2814f1500bc9c8
Signed-off-by: Ahmed Azeem <ahmed.azeem@arm.com>

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# 78b1610e 24-Sep-2025 Manish Pandey <manish.pandey2@arm.com>

Merge "chore(handoff)!: remove in-tree TLC implementation" into integration


# 3ff75238 15-Sep-2025 Harrison Mutai <harrison.mutai@arm.com>

chore(handoff)!: remove in-tree TLC implementation

Remove the TLC implementation from this repository. TLC now
resides with the C implementation of the Transfer List Library,
making it easier to con

chore(handoff)!: remove in-tree TLC implementation

Remove the TLC implementation from this repository. TLC now
resides with the C implementation of the Transfer List Library,
making it easier to consume in other projects.

BREAKING-CHANGE: Projects/scripts relying on the in-tree TLC tool will
need to use the new, externalized location or workflow.

Change-Id: Ib34ff207292ab5523f4464419c51cfe816834fd4
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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# c0ef365b 17-Sep-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge "fix(debugfs): set debugfs smc start to vendor EL3" into integration


# 4db17f4e 09-Sep-2025 Slava Andrianov <slava.andrianov@arm.com>

fix(debugfs): set debugfs smc start to vendor EL3

The smc calls for debugfs were moved from the sip service to the vendor
specific EL3 service [1], so the debugfs smc call handler needs to be
update

fix(debugfs): set debugfs smc start to vendor EL3

The smc calls for debugfs were moved from the sip service to the vendor
specific EL3 service [1], so the debugfs smc call handler needs to be
updated to reflect this change so that it does not view debugfs smc
calls to be invalid.

[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/26917

Change-Id: Ic24e3b7ab4c8a37b888aaf11060da0bc8abe072d
Signed-off-by: Slava Andrianov <slava.andrianov@arm.com>

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# e47c7a16 10-Sep-2025 Yann Gautier <yann.gautier@st.com>

Merge "feat(rcar): add support for Renesas R-Car S4 / V4H / V4M" into integration


# b45b5bac 15-Oct-2021 Marek Vasut <marek.vasut+renesas@mailbox.org>

feat(rcar): add support for Renesas R-Car S4 / V4H / V4M

Add support for Renesas R-Car S4 / V4H / V4M , which are Gen4 SoC.
Add platform code, BL31 setup code, platform specific PSCI handlers,
CPU p

feat(rcar): add support for Renesas R-Car S4 / V4H / V4M

Add support for Renesas R-Car S4 / V4H / V4M , which are Gen4 SoC.
Add platform code, BL31 setup code, platform specific PSCI handlers,
CPU power driver, Gen4 (H)SCIF driver, and function to get canary for
stack protector. Unlike Gen3, the Gen4 uses only TFA BL31 during boot.

Change-Id: Ic0eb8638a85757f997f29fc524c118c3e5d5135a
Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Hieu Nguyen <hieu.nguyen.dn@renesas.com>
Signed-off-by: Jing Dan <jing.dan.nx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Masashi Ozaki <masashi.ozaki.te@renesas.com>
Signed-off-by: Taichiro Yokoyama <taichiro.yokoyama.ns@hitachi.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Tsukasa Kawaguchi <tsukasa.kawaguchi.aw@hitachi.com>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Vincent Bryce <vincent.bryce@cogentembedded.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
---
NOTE: This patch is squashed and cleaned up from large stack of patches
from multiple authors. SoB line from each author is included here,
the author of this commit is set to myself although that is most
certainly not accurate.

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# 480e8dd9 25-Aug-2025 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "Add-i.MX94/95-suport" into integration

* changes:
docs(maintainers): add i.MX9 to maintained paths
feat(imx94): add initial support for imx94
feat(imx95): add optee s

Merge changes from topic "Add-i.MX94/95-suport" into integration

* changes:
docs(maintainers): add i.MX9 to maintained paths
feat(imx94): add initial support for imx94
feat(imx95): add optee support
feat(imx95): support trusty os
feat(imx95): implement a semaphore for GIC quiescing
feat(imx95): add initial support for i.MX95
feat(imx9): add necessary ele api call support
feat(imx9): add imx9 common code base
refactor(imx): drop the __dead2 attribute
fix(imx): add static attribute for platform specific gic struct
feat(gic): change gic_cpuif_enable/disable to weak
feat(scmi): add i.MX9 SCMI vendor CPU protocol
feat(scmi): add base protocol agent API
feat(scmi): update version to 3.0
build(changelog): update for imx94/95 support

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# 674e721b 21-Apr-2025 Jacky Bai <ping.bai@nxp.com>

build(changelog): update for imx94/95 support

Add new scope for i.MX94 & i.MX95 support

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I77859c997dc1afa18b47ddbb1c943b846f121183


# 711f42b2 20-Jun-2025 Olivier Deprez <olivier.deprez@arm.com>

Merge changes from topic "mb/lfa-core-work" into integration

* changes:
docs(maintainers): add myself as code owner for LFA service
docs(lfa): update porting guide with LFA platform APIs
feat(

Merge changes from topic "mb/lfa-core-work" into integration

* changes:
docs(maintainers): add myself as code owner for LFA service
docs(lfa): update porting guide with LFA platform APIs
feat(lfa): add LFA holding pen logic
feat(lfa): add initial implementation for LFA_ACTIVATE
feat(lfa): add initial implementation for LFA_PRIME
feat(fvp): implement platform API for load and auth image
feat(lfa): implement LFA_CANCEL SMC
feat(fvp): implement platform API for LFA cancel operation
feat(lfa): implement LFA_GET_INVENTORY SMC
feat(fvp): implement platform API for LFA activation pending check
feat(lfa): implement LFA_GET_INFO SMC and integrate LFA build
feat(fvp): initialize LFA component activators in platform layer
feat(rmm): add placeholder activator callbacks for LFA
feat(bl31): add placeholder activator implementation for LFA
feat(lfa): add activation handler interface for component activation
feat(fvp): implement LFA get components API
feat(lfa): create LFA SMC handler template

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# cf48f49f 15-Apr-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(lfa): create LFA SMC handler template

As per the specification v1.0[1], added all Live Firmware Activation
(LFA) SMCs, including their Function IDs (FIDs) and associated error
codes.
A dummy ha

feat(lfa): create LFA SMC handler template

As per the specification v1.0[1], added all Live Firmware Activation
(LFA) SMCs, including their Function IDs (FIDs) and associated error
codes.
A dummy handler function has been created as a template. Subsequent
patches will implement the handling of these SMCs.

[1]: https://developer.arm.com/documentation/den0147/latest/

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I5d6500dcff35aa4a438cd5f97f349cd57406ddce

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