History log of /rk3399_ARM-atf/bl32/tsp/tsp_common.c (Results 1 – 12 of 12)
Revision Date Author Comments
# 66fb7ee4 28-Apr-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge changes from topic "hm/handoff-mb" into integration

* changes:
feat(arm): support boot info handoff and event log
fix(arm): update tsp_early_platform_setup prototype
fix(xilinx): update

Merge changes from topic "hm/handoff-mb" into integration

* changes:
feat(arm): support boot info handoff and event log
fix(arm): update tsp_early_platform_setup prototype
fix(xilinx): update tsp_early_platform_setup prototype
fix(socionext): update tsp_early_platform_setup prototype
fix(msm8916): update tsp_early_platform_setup prototype
feat(tsp): cascade boot arguments to platforms
feat(fvp): port event log to firmware handoff
feat(arm): port event log to firmware handoff
feat(fvp): increase bl2 mmap len for handoff
feat(measured-boot): add fw handoff event log utils

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# 32d9e8ec 21-Feb-2025 Harrison Mutai <harrison.mutai@arm.com>

feat(tsp): cascade boot arguments to platforms

Enable platforms to receive boot arguments passed to the TSP, allowing
them to make use of these parameters.

This is in preparation for supporting Fir

feat(tsp): cascade boot arguments to platforms

Enable platforms to receive boot arguments passed to the TSP, allowing
them to make use of these parameters.

This is in preparation for supporting Firmware Handoff within the TSP.

BREAKING CHANGE: The prototype for `tsp_early_platform_setup` has been
redefined. Platforms must update their implementations to match the new
function signature.

Change-Id: I4b5c6493bb62846aaa0d9e330d8aa06e6a0525a8
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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# ee656609 16-Apr-2025 André Przywara <andre.przywara@arm.com>

Merge changes Id942c20c,Idd286bea,I8917a26e,Iec8c3477,If3c25dcd, ... into integration

* changes:
feat(cpufeat): enable FEAT_PAuth to FEAT_STATE_CHECKED
perf(cpufeat): centralise PAuth key saving

Merge changes Id942c20c,Idd286bea,I8917a26e,Iec8c3477,If3c25dcd, ... into integration

* changes:
feat(cpufeat): enable FEAT_PAuth to FEAT_STATE_CHECKED
perf(cpufeat): centralise PAuth key saving
refactor(cpufeat): convert FEAT_PAuth setup to C
refactor(cpufeat): prepare FEAT_PAuth for FEATURE_DETECTION
chore(cpufeat): remove PAuth presence checks
feat(cpufeat): enable FEAT_BTI to FEAT_STATE_CHECKED

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# 34b139e9 14-Apr-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge "fix(tsp): use %u to display unsigned values" into integration


# ec7c29ab 26-Mar-2025 Boyan Karatotev <boyan.karatotev@arm.com>

chore(cpufeat): remove PAuth presence checks

TF-A operates a policy that features must be correctly configured per
each platform. There is a tool to assist in making sure that this is the
case - FEA

chore(cpufeat): remove PAuth presence checks

TF-A operates a policy that features must be correctly configured per
each platform. There is a tool to assist in making sure that this is the
case - FEATURE_DETECTION. So performing these checks in common code is
not the right place for this. Remove them and rely on FEATURE_DETECTION.

Change-Id: If3c25dcd7bc880f1f085bc6bb5270d8d1c4caf43
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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# 3b06438d 05-Jun-2024 Yann Gautier <yann.gautier@foss.st.com>

fix(tsp): use %u to display unsigned values

When enabling -Wformat-signedness option, several warnings occur when
compiling TSP.
For example:
bl32/tsp/tsp_main.c: In function 'tsp_main':
include/com

fix(tsp): use %u to display unsigned values

When enabling -Wformat-signedness option, several warnings occur when
compiling TSP.
For example:
bl32/tsp/tsp_main.c: In function 'tsp_main':
include/common/debug.h:47:41: error: format '%d' expects argument of
type 'int', but argument 3 has type 'uint32_t' {aka 'unsigned int'}
[-Werror=format=]
47 | #define LOG_MARKER_INFO "\x28" /* 40 */
| ^~~~~~
include/common/debug.h:83:32: note: in expansion of macro
'LOG_MARKER_INFO'
83 | # define INFO(...) tf_log(LOG_MARKER_INFO __VA_ARGS__)
| ^~~~~~~~~~~~~~~
bl32/tsp/tsp_main.c:48:9: note: in expansion of macro 'INFO'
48 | INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu on
requests\n",
| ^~~~

Use %u instead of %d to correct that (or PRIu64 instead of PRId64).

Change-Id: I50b4626d2090350c647bc9fd11a4d1bc174a4ee0
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# a97e1f97 08-May-2024 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "early_console" into integration

* changes:
feat(stm32mp2): use early traces
feat(st-bsec): use early traces
refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CON

Merge changes from topic "early_console" into integration

* changes:
feat(stm32mp2): use early traces
feat(st-bsec): use early traces
refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CONSOLE
feat(console): introduce EARLY_CONSOLE
feat(bl32): create an sp_min_setup function

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# ae770fed 16-Jan-2024 Yann Gautier <yann.gautier@st.com>

feat(console): introduce EARLY_CONSOLE

This is a generic porting of what was done on ST platforms with flag
STM32MP_EARLY_CONSOLE. It creates the flag and the prototype for
plat_setup_early_console(

feat(console): introduce EARLY_CONSOLE

This is a generic porting of what was done on ST platforms with flag
STM32MP_EARLY_CONSOLE. It creates the flag and the prototype for
plat_setup_early_console(). This function depends on platform
implementation. This function call is added at the beginning of each BL
image early setup function.
The patch also introduce an extra log macro: EARLY_ERROR. This can
replace ERROR macro in code that will only be executed before the
default console is enabled, and will do nothing when the EARLY_CONSOLE
is not enabled. This can then save some space in memory.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I77bf0a0c4289b4c7df94e4bfb783a938e05bf023

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# 0c0bab0c 25-Aug-2022 Olivier Deprez <olivier.deprez@arm.com>

Merge changes from topic "ffa_el3_spmc" into integration

* changes:
feat(tsp): enable test cases for EL3 SPMC
feat(tsp): increase stack size for tsp
feat(tsp): add ffa_helpers to enable more F

Merge changes from topic "ffa_el3_spmc" into integration

* changes:
feat(tsp): enable test cases for EL3 SPMC
feat(tsp): increase stack size for tsp
feat(tsp): add ffa_helpers to enable more FF-A functionality

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# 15ca1ee3 23-Dec-2021 Marc Bonnici <marc.bonnici@arm.com>

feat(tsp): enable test cases for EL3 SPMC

Introduce initial test cases to the TSP which are
designed to be exercised by the FF-A Test Driver
in the Normal World. These have been designed to
test bas

feat(tsp): enable test cases for EL3 SPMC

Introduce initial test cases to the TSP which are
designed to be exercised by the FF-A Test Driver
in the Normal World. These have been designed to
test basic functionality of the EL3 SPMC.

These tests currently ensure the following functionality:
- Partition discovery.
- Direct messaging.
- Communication with a Logical SP.
- Memory Sharing and Lending ABIs
- Sharing of contiguous and non-contiguous memory regions.
- Memory region descriptors spread of over multiple
invocations.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Signed-off-by: Shruti Gupta <shruti.gupta@arm.com>
Change-Id: Iaee4180aa18d6b7ac7b53685c6589f0ab306e876

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# 19037a71 24-Aug-2022 Olivier Deprez <olivier.deprez@arm.com>

Merge changes from topic "ffa_el3_spmc" into integration

* changes:
feat(tsp): add FF-A support to the TSP
feat(fvp/tsp_manifest): add example manifest for TSP
fix(spmc): fix relinquish valida

Merge changes from topic "ffa_el3_spmc" into integration

* changes:
feat(tsp): add FF-A support to the TSP
feat(fvp/tsp_manifest): add example manifest for TSP
fix(spmc): fix relinquish validation check

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# 4a8bfdb9 04-Oct-2021 Achin Gupta <achin.gupta@arm.com>

feat(tsp): add FF-A support to the TSP

This patch adds the FF-A programming model in the test
secure payload to ensure that it can be used to test
the following spec features.

1. SP initialisation

feat(tsp): add FF-A support to the TSP

This patch adds the FF-A programming model in the test
secure payload to ensure that it can be used to test
the following spec features.

1. SP initialisation on the primary and secondary cpus.
2. An event loop to receive direct requests and respond
with direct responses.
3. Ability to receive messages that indicate power on
and off of a cpu.
4. Ability to handle a secure interrupt.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Signed-off-by: Shruti <shruti.gupta@arm.com>
Change-Id: I81cf744904d5cdc0b27862b5e4bc6f2cfe58a13a

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