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3642ca95 |
| 29-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1170 from dp-arm/dp/amu
Add support for Activity Monitors
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0319a977 |
| 16-Oct-2017 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Implement support for the Activity Monitor Unit on Cortex A75
The Cortex A75 has 5 AMU counters. The first three counters are fixed and the remaining two are programmable.
A new build option is in
Implement support for the Activity Monitor Unit on Cortex A75
The Cortex A75 has 5 AMU counters. The first three counters are fixed and the remaining two are programmable.
A new build option is introduced, `ENABLE_AMU`. When set, the fixed counters will be enabled for use by lower ELs. The programmable counters are currently disabled.
Change-Id: I4bd5208799bb9ed7d2596e8b0bfc87abbbe18740 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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11a70d7e |
| 24-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1172 from sandrine-bailleux-arm/sb/fix-makefile-aarch32
Fix Makefile for ARMv8-A AArch32 builds
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da547d4b |
| 24-Nov-2017 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Fix Makefile for ARMv8-A AArch32 build
Commit 26e63c4450 broke the Makefile for ARMv8-A AArch32 platforms. This patch fixes it.
Change-Id: I49b8eb5b88f3a131aa4c8642ef970e92d90b6dd2 Signed-off-by: S
Fix Makefile for ARMv8-A AArch32 build
Commit 26e63c4450 broke the Makefile for ARMv8-A AArch32 platforms. This patch fixes it.
Change-Id: I49b8eb5b88f3a131aa4c8642ef970e92d90b6dd2 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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71f8a6a9 |
| 23-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1145 from etienne-lms/rfc-armv7-2
Support ARMv7 architectures
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ec04e0f4 |
| 22-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1162 from dp-arm/spe-rework
Move SPE code to lib/extensions
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281a08cc |
| 13-Oct-2017 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Refactor Statistical Profiling Extensions implementation
Factor out SPE operations in a separate file. Use the publish subscribe framework to drain the SPE buffers before entering secure world. Ad
Refactor Statistical Profiling Extensions implementation
Factor out SPE operations in a separate file. Use the publish subscribe framework to drain the SPE buffers before entering secure world. Additionally, enable SPE before entering normal world.
A side effect of this change is that the profiling buffers are now only drained when a transition from normal world to secure world happens. Previously they were drained also on return from secure world, which is unnecessary as SPE is not supported in S-EL1.
Change-Id: I17582c689b4b525770dbb6db098b3a0b5777b70a Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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9500d5a4 |
| 09-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1148 from antonio-nino-diaz-arm/an/spm
Introduce Secure Partition Manager
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2fccb228 |
| 24-Oct-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
SPM: Introduce Secure Partition Manager
A Secure Partition is a software execution environment instantiated in S-EL0 that can be used to implement simple management and security services. Since S-EL
SPM: Introduce Secure Partition Manager
A Secure Partition is a software execution environment instantiated in S-EL0 that can be used to implement simple management and security services. Since S-EL0 is an unprivileged exception level, a Secure Partition relies on privileged firmware e.g. ARM Trusted Firmware to be granted access to system and processor resources. Essentially, it is a software sandbox that runs under the control of privileged software in the Secure World and accesses the following system resources:
- Memory and device regions in the system address map. - PE system registers. - A range of asynchronous exceptions e.g. interrupts. - A range of synchronous exceptions e.g. SMC function identifiers.
A Secure Partition enables privileged firmware to implement only the absolutely essential secure services in EL3 and instantiate the rest in a partition. Since the partition executes in S-EL0, its implementation cannot be overly complex.
The component in ARM Trusted Firmware responsible for managing a Secure Partition is called the Secure Partition Manager (SPM). The SPM is responsible for the following:
- Validating and allocating resources requested by a Secure Partition. - Implementing a well defined interface that is used for initialising a Secure Partition. - Implementing a well defined interface that is used by the normal world and other secure services for accessing the services exported by a Secure Partition. - Implementing a well defined interface that is used by a Secure Partition to fulfil service requests. - Instantiating the software execution environment required by a Secure Partition to fulfil a service request.
Change-Id: I6f7862d6bba8732db5b73f54e789d717a35e802f Co-authored-by: Douglas Raillard <douglas.raillard@arm.com> Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Co-authored-by: Achin Gupta <achin.gupta@arm.com> Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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26e63c44 |
| 08-Nov-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
ARMv7 target is driven by ARM_ARCH_MAJOR==7
External build environment shall sets directive ARM_ARCH_MAJOR to 7 to specify a target ARMv7-A core.
As ARM-TF expects AARCH to be set, ARM_ARCH_MAJOR==
ARMv7 target is driven by ARM_ARCH_MAJOR==7
External build environment shall sets directive ARM_ARCH_MAJOR to 7 to specify a target ARMv7-A core.
As ARM-TF expects AARCH to be set, ARM_ARCH_MAJOR==7 mandates AARCH=aarch32.
The toolchain target architecture/cpu is delegated after the platform configuration is parsed. Platform shall define target core through ARM_CORTEX_A<x>=yes, <x> being 5, 7, 9, 12, 15 and/or 17.
Platform can bypass ARM_CORTEX_A<x>=yes directive and provide straight the toolchain target directive through MARCH32_DIRECTIVE.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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2904f84e |
| 07-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1155 from masahir0y/uniphier
Fix build error when creating ROT key for UniPhier platform
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8012cc5c |
| 03-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
Build: introduce ${BUILD_PLAT} target to create the top build directory
Some platforms (for ex. UniPhier) want to create files in the very top of the build directory. Add ${BUILD_PLAT} so such file
Build: introduce ${BUILD_PLAT} target to create the top build directory
Some platforms (for ex. UniPhier) want to create files in the very top of the build directory. Add ${BUILD_PLAT} so such files can depend on it.
Make existing directory targets depend on ${BUILD_PLAT} because they are sub-directories of ${BUILD_PLAT}.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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623c4377 |
| 21-Oct-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1130 from jeenu-arm/gic-patches
New GIC APIs and specifying interrupt propertes
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74dce7fa |
| 22-Sep-2017 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
GIC: Add APIs to set interrupt type and query support
The back end GIC driver converts and assigns the interrupt type to suitable group.
For GICv2, a build option GICV2_G0_FOR_EL3 is introduced, wh
GIC: Add APIs to set interrupt type and query support
The back end GIC driver converts and assigns the interrupt type to suitable group.
For GICv2, a build option GICV2_G0_FOR_EL3 is introduced, which determines to which type Group 0 interrupts maps to.
- When the build option is set 0 (the default), Group 0 interrupts are meant for Secure EL1. This is presently the case.
- Otherwise, Group 0 interrupts are meant for EL3. This means the SPD will have to synchronously hand over the interrupt to Secure EL1.
The query API allows the platform to query whether the platform supports interrupts of a given type.
API documentation updated.
Change-Id: I60fdb4053ffe0bd006b3b20914914ebd311fc858 Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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03b397a8 |
| 14-Oct-2016 |
Nishanth Menon <nm@ti.com> |
Makefile: Add ability to build dtb
This is a revamp of the original approach in: https://github.com/ARM-software/arm-trusted-firmware/pull/747
Current build system has no means to automatically gen
Makefile: Add ability to build dtb
This is a revamp of the original approach in: https://github.com/ARM-software/arm-trusted-firmware/pull/747
Current build system has no means to automatically generate dtbs from dts, instead, stores the dtbs in the fdts/ folder. While this makes perfect sense for many reference platforms, this becomes a minor breakage in development flow for newer platforms.
However, this can be solved by providing a rule for the dtbs while building the ATF binaries by purely describing which dts sources we need.
For example, with this change, we will now be able to describe the dtbs we need for the platform in the corresponding platform.mk file: FDT_SOURCES += fdts/abc.dts
This should be able to generate the abc.dtb appropriately.
Since device trees are specification of hardware, we don't tie the rule to any specific BL, instead a generic rule is introduced.
Further, this approach allows us to generate appropriate dtbs which may be need to be regenerated when a common dtsi gets updated, by just restricting changes to the dtsi alone, instead of synchronizing all the dtbs as well.
If dtc is not available in default paths, but is available in an alternate location, it can be chosen by overriding the DTC variable such as 'make DTC=~/dtc/dtc ....`
NOTE: dtbs are built only with the explicit make dtbs command. The rule is only available if the platform defines a FDT_SOURCES variable.
Signed-off-by: Benjamin Fair <b-fair@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
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b4f4a2f0 |
| 18-Sep-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1093 from soby-mathew/eb/log_fw
Implement log framework
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50915b89 |
| 12-Sep-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1091 from geesun/qx/el3_payload_base_cfg_check
Filter out invalid configure for EL3_PAYLOAD_BASE
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7f56e9a3 |
| 04-Sep-2017 |
Soby Mathew <soby.mathew@arm.com> |
Implement log framework
This patch gives users control over logging messages printed from the C code using the LOG macros defined in debug.h Users now have the ability to reduce the log_level at run
Implement log framework
This patch gives users control over logging messages printed from the C code using the LOG macros defined in debug.h Users now have the ability to reduce the log_level at run time using the tf_log_set_max_level() function. The default prefix string can be defined by platform by overriding the `plat_log_get_prefix()` platform API which is also introduced in this patch.
The new log framework results in saving of some RO data. For example, when BL1 is built for FVP with LOG_LEVEL=LOG_LEVEL_VERBOSE, resulted in saving 384 bytes of RO data and increase of 8 bytes of RW data. The framework also adds about 108 bytes of code to the release build of FVP.
Fixes ARM-software/tf-issues#462
Change-Id: I476013d9c3deedfdd4c8b0b0f125665ba6250554 Co-authored-by: Eleanor Bonnici <Eleanor.bonnici@arm.com> Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| #
76580f3d |
| 24-Aug-2017 |
Qixiang Xu <qixiang.xu@arm.com> |
Filter out invalid configure for EL3_PAYLOAD_BASE
TRUSTED_BOARD_BOOT and GENERATE_COT is not compatible with EL3_PAYLOAD_BASE
Change-Id: I538c77e1f6c7da400d30ae4d633b8fcc55742202 Signed-off-by: Qix
Filter out invalid configure for EL3_PAYLOAD_BASE
TRUSTED_BOARD_BOOT and GENERATE_COT is not compatible with EL3_PAYLOAD_BASE
Change-Id: I538c77e1f6c7da400d30ae4d633b8fcc55742202 Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>
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5982fa79 |
| 23-Aug-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1017 from etienne-lms/minor-docs
Minor docs
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66079b04 |
| 23-Aug-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
Makefile: correct path for CHECKPATCH warnings
Change-Id: I08c9789d3fd2b034b08de663d151023ca005f77f Reported-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@
Makefile: correct path for CHECKPATCH warnings
Change-Id: I08c9789d3fd2b034b08de663d151023ca005f77f Reported-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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a937d93e |
| 14-Aug-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #1046 from jeenu-arm/revc
Support for RevC FVP model
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e33fd445 |
| 19-Jul-2017 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
CCI: Adapt for specific product at run time
The current build system and driver requires the CCI product to be specified at build time. The device constraints can be determined at run time from its
CCI: Adapt for specific product at run time
The current build system and driver requires the CCI product to be specified at build time. The device constraints can be determined at run time from its ID registers, obviating the need for specifying them ahead.
This patch adds changes to identify and validate CCI at run time. Some global variables are renamed to be in line with the rest of the code base.
The build option ARM_CCI_PRODUCT_ID is now removed, and user guide is updated.
Change-Id: Ibb765e349d3bc95ff3eb9a64bde1207ab710a93d Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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2252c67d |
| 31-Jul-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1036 from jeenu-arm/fix-ordering
Fix alphabetic ordering
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c1232c31 |
| 19-Jul-2017 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
Fix alphabetic ordering
Commit d832aee90, which added SPE support, got the alphabetical ordering wrong for documentation and Makefile addition. This patch fixes that.
Change-Id: I061ecfba4db363902c
Fix alphabetic ordering
Commit d832aee90, which added SPE support, got the alphabetical ordering wrong for documentation and Makefile addition. This patch fixes that.
Change-Id: I061ecfba4db363902c9d7d577d2ce6c612cb9e1d Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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