| #
45aecff0 |
| 28-Apr-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
Implement workaround for AT speculative behaviour
During context switching from higher EL (EL2 or higher) to lower EL can cause incorrect translation in TLB due to speculative execution of AT instru
Implement workaround for AT speculative behaviour
During context switching from higher EL (EL2 or higher) to lower EL can cause incorrect translation in TLB due to speculative execution of AT instruction using out-of-context translation regime.
Workaround is implemented as below during EL's (EL1 or EL2) "context_restore" operation: 1. Disable page table walk using SCTLR.M and TCR.EPD0 & EPD1 bits for EL1 or EL2 (stage1 and stage2 disabled) 2. Save all system registers except TCR and SCTLR (for EL1 and EL2) 3. Do memory barrier operation (isb) to ensure all system register writes are done. 4. Restore TCR and SCTLR registers (for EL1 and EL2)
Errata details are available for various CPUs as below: Cortex-A76: 1165522 Cortex-A72: 1319367 Cortex-A57: 1319537 Cortex-A55: 1530923 Cortex-A53: 1530924
More details can be found in mail-chain: https://lists.trustedfirmware.org/pipermail/tf-a/2020-April/000445.html
Currently, Workaround is implemented as build option which is default disabled.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: If8545e61f782cb0c2dda7ffbaf50681c825bd2f0
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| #
659bf156 |
| 05-May-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "Fix build type is empty in version string" into integration
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| #
f1de4c8f |
| 25-Apr-2020 |
Peiyuan Song <squallatf@gmail.com> |
Fix build type is empty in version string
Signed-off-by: Peiyuan Song <squallatf@gmail.com> Change-Id: I97c2e6f8c12ecf828605811019d47a24293c1ebb
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| #
8ff55a9e |
| 20-Apr-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Incrementing the minor version to reflect upcoming v2.3 release" into integration
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| #
eca80334 |
| 20-Apr-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Incrementing the minor version to reflect upcoming v2.3 release
Change-Id: I27f7d92988fc16f68041c2ddaa8dd3a60362ddd1 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| #
cb2e35b5 |
| 02-Apr-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge changes from topic "macro-cleanup" into integration
* changes: plat: remove redundant =1 from -D option Pass more -D options to BL*_CPPFLAGS instead of BL*_CFLAGS
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| #
3142f6df |
| 02-Apr-2020 |
joanna.farley <joanna.farley@arm.com> |
Merge "cryptocell: add support for Cryptocell 713" into integration
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| #
9cefb4b1 |
| 01-Apr-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
Pass more -D options to BL*_CPPFLAGS instead of BL*_CFLAGS
Commit d5e97a1d2c79 ("Build: define IMAGE_AT_EL1 or IMAGE_AT_EL3 globally for C files") does not have commit 848a7e8ce1d9 ("Build: introduc
Pass more -D options to BL*_CPPFLAGS instead of BL*_CFLAGS
Commit d5e97a1d2c79 ("Build: define IMAGE_AT_EL1 or IMAGE_AT_EL3 globally for C files") does not have commit 848a7e8ce1d9 ("Build: introduce per-BL CPPFLAGS and ASFLAGS") as an ancestor because they were pulled almost at the same time.
This is a follow-up conversion to be consistent with commit 11a3c5ee7325 ("plat: pass -D option to BL*_CPPFLAGS instead of BL*_CFLAGS").
With this change, the command line option, IMAGE_AT_EL3, will be passed to .S files as well.
I remove the definition in include/lib/cpus/aarch64/cpu_macros.S
Otherwise, the following error would happen.
include/lib/cpus/aarch64/cpu_macros.S:29:0: error: "IMAGE_AT_EL3" redefined [-Werror]
Change-Id: I943c8f22356483c2ae3c57b515c69243a8fa6889 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
4501843f |
| 15-May-2019 |
Gilad Ben-Yossef <gilad@benyossef.com> |
cryptocell: add support for Cryptocell 713
Add Crypto 713 support as crypto module and NVM counter provider.
As files under include/drivers/arm/cryptocell/713/ are copied verbatim from the CryptoCe
cryptocell: add support for Cryptocell 713
Add Crypto 713 support as crypto module and NVM counter provider.
As files under include/drivers/arm/cryptocell/713/ are copied verbatim from the CryptoCell SBROM lib project they are filtered from checkpatch coding style check.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com> Change-Id: I7c361772f00ca7d96481f81ac6cbb2704467e52c
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| #
7ff088d1 |
| 22-Mar-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
Enable MTE support
Enable MTE support by adding memory tag option in Makefile This option is available only when ARMv8.5-MemTag is implemented
MTE options are added in latest clang and armclang com
Enable MTE support
Enable MTE support by adding memory tag option in Makefile This option is available only when ARMv8.5-MemTag is implemented
MTE options are added in latest clang and armclang compiler which support below options: for clang <version 11.0.0> 1. -march=arm8.5-a+memtag 2. -fsanitize=memtag
for armclang <version 6.12> 1. -march=arm8.5-a+memtag 2. -mmemtag-stack
Set the option SUPPORT_STACK_MEMTAG=yes to enable memory stack tagging.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I4e0bbde4e9769ce03ead6f550158e22f32c1c413
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| #
426d5f9c |
| 31-Mar-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Build: define IMAGE_AT_EL1 or IMAGE_AT_EL3 globally for C files" into integration
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| #
a7062b7d |
| 31-Mar-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "Makefile: don't use $(CC) before value is explicit set" into integration
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| #
32b209bf |
| 25-Feb-2020 |
Ahmad Fatoum <a.fatoum@pengutronix.de> |
Makefile: don't use $(CC) before value is explicit set
Unless specified in the environment, $(CC) expands to some generic host C compiler like cc or c99. We set our own value for $(CC), but only few
Makefile: don't use $(CC) before value is explicit set
Unless specified in the environment, $(CC) expands to some generic host C compiler like cc or c99. We set our own value for $(CC), but only few lines later.
Move the first use of the $(CC) variable behind the definition to correct this.
Change-Id: I45344e063d21ddfe22b7ad77954e85c1c46087bd Fixes: 1684b8733 ("Use clang assembler when clang compiler is used") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
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| #
d5e97a1d |
| 26-Mar-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
Build: define IMAGE_AT_EL1 or IMAGE_AT_EL3 globally for C files
The build system defines the IMAGE_BL* macro when compiling each image. This is useful to distinguish which image the current file is
Build: define IMAGE_AT_EL1 or IMAGE_AT_EL3 globally for C files
The build system defines the IMAGE_BL* macro when compiling each image. This is useful to distinguish which image the current file is being built for by using #if defined(IMAGE_BL2) or #if defined(IMAGE_BL31), or whatever.
There are some cases where we are more interested in which exception level the current file is being built for.
include/lib/cpus/{aarch32,aarch64}/cpu_macros.S defines IMAGE_AT_EL3, but we do not have it globally.
Pass IMAGE_AT_EL1 or IMAGE_AT_EL3 to BL*_CFLAGS so that it is available from all C code.
The library code (libc.a, libmbedtls.a, etc.) is exceptional cases, where the code can be shared between BL images.
Other than that, we know the exception level at the build time, and this macro will be useful in the shared code.
Change-Id: I7c8a1da10726906adfba981cfe8464dff111d6b0 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
8d8d9cf2 |
| 26-Mar-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "FVP: Add BL2 hash calculation in BL1" into integration
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| #
0ab49645 |
| 20-Mar-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
FVP: Add BL2 hash calculation in BL1
This patch provides support for measured boot by adding calculation of BL2 image hash in BL1 and writing these data in TB_FW_CONFIG DTB.
Change-Id: Ic074a7ed19b
FVP: Add BL2 hash calculation in BL1
This patch provides support for measured boot by adding calculation of BL2 image hash in BL1 and writing these data in TB_FW_CONFIG DTB.
Change-Id: Ic074a7ed19b14956719c271c805b35d147b7cec1 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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| #
ce8dfd28 |
| 24-Mar-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "fconf: Clean Arm IO" into integration
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| #
0d5864d9 |
| 24-Mar-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "spmd: skip loading of secure partitions on pre-v8.4 platforms" into integration
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| #
c33ff198 |
| 19-Mar-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
spmd: skip loading of secure partitions on pre-v8.4 platforms
When SPD=spmd and SPMD_SPM_AT_SEL2=0, that is SPMC sits at S-EL1 then there is no need for TF-A to load secure partitions individually.
spmd: skip loading of secure partitions on pre-v8.4 platforms
When SPD=spmd and SPMD_SPM_AT_SEL2=0, that is SPMC sits at S-EL1 then there is no need for TF-A to load secure partitions individually. In this configuration, SPMC handles secure partition loading at S-EL1/EL0 levels.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I06a0d88a4811274a8c347ce57b56bb5f64e345df
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| #
a6de824f |
| 28-Feb-2020 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Clean Arm IO
Merge the previously introduced arm_fconf_io_storage into arm_io_storage. This removes the duplicate io_policies and functions definition.
This patch: - replace arm_io_storage.c
fconf: Clean Arm IO
Merge the previously introduced arm_fconf_io_storage into arm_io_storage. This removes the duplicate io_policies and functions definition.
This patch: - replace arm_io_storage.c with the content of arm_fconf_io_storage.c - rename the USE_FCONF_BASED_IO option into ARM_IO_IN_DTB. - use the ARM_IO_IN_DTB option to compile out io_policies moved in dtb. - propagate DEFINES when parsing dts. - use ARM_IO_IN_DTB to include or not uuid nodes in fw_config dtb. - set the ARM_IO_IN_DTB to 0 by default for fvp. This ensure that the behavior of fvp stays the same as it was before the introduction of fconf.
Change-Id: Ia774a96d1d3a2bccad29f7ce2e2b4c21b26c080e Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| #
d2737fe1 |
| 12-Mar-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge changes from topic "mp/enhanced_pal_hw" into integration
* changes: plat/arm/fvp: populate pwr domain descriptor dynamically fconf: Extract topology node properties from HW_CONFIG dtb fc
Merge changes from topic "mp/enhanced_pal_hw" into integration
* changes: plat/arm/fvp: populate pwr domain descriptor dynamically fconf: Extract topology node properties from HW_CONFIG dtb fconf: necessary modifications to support fconf in BL31 & SP_MIN fconf: enhancements to firmware configuration framework
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| #
26d1e0c3 |
| 27-Jan-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
fconf: necessary modifications to support fconf in BL31 & SP_MIN
Necessary infrastructure added to integrate fconf framework in BL31 & SP_MIN. Created few populator() functions which parse HW_CONFIG
fconf: necessary modifications to support fconf in BL31 & SP_MIN
Necessary infrastructure added to integrate fconf framework in BL31 & SP_MIN. Created few populator() functions which parse HW_CONFIG device tree and registered them with fconf framework. Many of the changes are only applicable for fvp platform.
This patch: 1. Adds necessary symbols and sections in BL31, SP_MIN linker script 2. Adds necessary memory map entry for translation in BL31, SP_MIN 3. Creates an abstraction layer for hardware configuration based on fconf framework 4. Adds necessary changes to build flow (makefiles) 5. Minimal callback to read hw_config dtb for capturing properties related to GIC(interrupt-controller node) 6. updates the fconf documentation
Change-Id: Ib6292071f674ef093962b9e8ba0d322b7bf919af Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| #
091576e7 |
| 09-Mar-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "tbbr/fw_enc" into integration
* changes: docs: qemu: Add instructions to boot using FIP image docs: Update docs with firmware encryption feature qemu: Support optiona
Merge changes from topic "tbbr/fw_enc" into integration
* changes: docs: qemu: Add instructions to boot using FIP image docs: Update docs with firmware encryption feature qemu: Support optional encryption of BL31 and BL32 images qemu: Update flash address map to keep FIP in secure FLASH0 Makefile: Add support to optionally encrypt BL31 and BL32 tools: Add firmware authenticated encryption tool TBB: Add an IO abstraction layer to load encrypted firmwares drivers: crypto: Add authenticated decryption framework
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| #
c6ba9b45 |
| 14-Nov-2019 |
Sumit Garg <sumit.garg@linaro.org> |
Makefile: Add support to optionally encrypt BL31 and BL32
Following build flags have been added to support optional firmware encryption:
- FW_ENC_STATUS: Top level firmware's encryption numeric fla
Makefile: Add support to optionally encrypt BL31 and BL32
Following build flags have been added to support optional firmware encryption:
- FW_ENC_STATUS: Top level firmware's encryption numeric flag, values: 0: Encryption is done with Secret Symmetric Key (SSK) which is common for a class of devices. 1: Encryption is done with Binding Secret Symmetric Key (BSSK) which is unique per device.
- ENC_KEY: A 32-byte (256-bit) symmetric key in hex string format. It could be SSK or BSSK depending on FW_ENC_STATUS flag.
- ENC_NONCE: A 12-byte (96-bit) encryption nonce or Initialization Vector (IV) in hex string format.
- ENCRYPT_BL31: Binary flag to enable encryption of BL31 firmware.
- ENCRYPT_BL32: Binary flag to enable encryption of Secure BL32 payload.
Similar flags can be added to encrypt other firmwares as well depending on use-cases.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Change-Id: I94374d6830ad5908df557f63823e58383d8ad670
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| #
90aa901f |
| 11-Nov-2019 |
Sumit Garg <sumit.garg@linaro.org> |
tools: Add firmware authenticated encryption tool
Add firmware authenticated encryption tool which utilizes OpenSSL library to encrypt firmwares using a key provided via cmdline. Currently this tool
tools: Add firmware authenticated encryption tool
Add firmware authenticated encryption tool which utilizes OpenSSL library to encrypt firmwares using a key provided via cmdline. Currently this tool supports AES-GCM as an authenticated encryption algorithm.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Change-Id: I60e296af1b98f1912a19d5f91066be7ea85836e4
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