| #
234519ee |
| 24-Oct-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(el3-spmc): allow physical partitions to have multiple UUIDs" into integration
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| #
0322d7af |
| 30-Jan-2025 |
Jay Monkman <jmonkman@google.com> |
feat(el3-spmc): allow physical partitions to have multiple UUIDs
Physical partitions can now be assigned multiple UUIDs. This updates - FFA_PARTITION_INFO_GET handling to return all the required
feat(el3-spmc): allow physical partitions to have multiple UUIDs
Physical partitions can now be assigned multiple UUIDs. This updates - FFA_PARTITION_INFO_GET handling to return all the required parttion descriptors - device tree parsing to read multiple UUIDs
Change-Id: Ib9a961130aace75ba31b6610873138f35d355f09 Signed-off-by: Jay Monkman <jmonkman@google.com> Signed-off-by: Andrei Homescu <ahomescu@xwf.google.com>
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| #
388e822e |
| 24-Oct-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(build): set ERRATA_SPECULATIVE_AT after platform.mk" into integration
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| #
c2dc5129 |
| 23-Oct-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(build): set ERRATA_SPECULATIVE_AT after platform.mk
This was introduced in 289737419: fix(build): align the cpu-ops flags with all others
That patch reduced cpu-ops.mk to an elaborate defaults.
fix(build): set ERRATA_SPECULATIVE_AT after platform.mk
This was introduced in 289737419: fix(build): align the cpu-ops flags with all others
That patch reduced cpu-ops.mk to an elaborate defaults.mk and moved it before platform.mk was evaluated. However, that patch missed the ERRATA_SPECULATIVE_AT setting which must happen after platform.mk, otherwise its value will not reflect errata state. So put it in the main Makefile with other similar flag settings after platform.mk.
Change-Id: I221dab39c417531c5a148886d3e29709ba8b51a8 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
6e2fe623 |
| 06-Jun-2025 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
feat(build): set CRYPTO_SUPPORT macro per BL
Moving the setting of CRYPTO_SUPPORT from the main Makefile to individual component makefiles using the new build macro make_defines for each BL-specific
feat(build): set CRYPTO_SUPPORT macro per BL
Moving the setting of CRYPTO_SUPPORT from the main Makefile to individual component makefiles using the new build macro make_defines for each BL-specific CPPFLAGS.
Rework romlib build command to use CRYPTO_LIB to determine mbedtls need instead of CRYPTO_SUPPORT. If CRYPTO_SUPPORT is set for any component, then CRYPTO_LIB will be filled, romlib can use this instead.
Add a convenience makefile macro for setting CRYPTO_SUPPORT from component specific makefiles, have components call the macro based on whether authenication verification (NEED_AUTH) and/or hash calculation (NEED_HASH) is required for the specific boot stage.
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: I7e81fede74fb9c04694b022e8eebed460616565c
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| #
15379935 |
| 20-Oct-2025 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes Ia8b52237,Id4b7714e into integration
* changes: fix(build): put the -target definitions in toolchain.mk fix(build): align the cpu-ops flags with all others
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| #
28973741 |
| 10-Sep-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(build): align the cpu-ops flags with all others
Since the cpu-ops file was created we've obtained the constraints.mk and cflags.mk files and we also have the defaults.mk. The cpu-ops file is not
fix(build): align the cpu-ops flags with all others
Since the cpu-ops file was created we've obtained the constraints.mk and cflags.mk files and we also have the defaults.mk. The cpu-ops file is not much different to these three, just much more complex. This patch keeps the complicated bit in cpu-ops.mk but it makes it behave like defaults.mk. The non-complicated bits (like cross referencing and compiler flags) go to their corresponding files. This centralises responsibilities and makes it nicer to keep track of.
The reason for doing this untangling is that the order of defaulting, cross referencing, and compiler flag selection is significant and we can run into problems where seemingly identical lines of code produce different outcomes.
Change-Id: Id4b7714e432a0d628d33412836fd5c93f0488970 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
8ff87a31 |
| 17-Oct-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(cpufeat): fix build with ENABLE_FEAT_PAUTH_LR=1" into integration
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| #
3325415b |
| 26-Aug-2025 |
John Powell <john.powell@arm.com> |
feat(cpufeat): fix build with ENABLE_FEAT_PAUTH_LR=1
Since build system underwent some refactoring, the build has been failing with ENABLE_FEAT_PAUTH_LR=1 so this patch fixes it
Change-Id: I1a3faad
feat(cpufeat): fix build with ENABLE_FEAT_PAUTH_LR=1
Since build system underwent some refactoring, the build has been failing with ENABLE_FEAT_PAUTH_LR=1 so this patch fixes it
Change-Id: I1a3faad53b508d760a65656dad78057027a7d69c Signed-off-by: John Powell <john.powell@arm.com>
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| #
ecb8b2de |
| 16-Oct-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(cpufeat): enable FEAT_PFAR support" into integration
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| #
b3bcfd12 |
| 14-Aug-2025 |
Andre Przywara <andre.przywara@arm.com> |
feat(cpufeat): enable FEAT_PFAR support
Implement support for FEAT_PFAR, which introduces the PFAR_ELx system register, recording the faulting physical address for some aborts. Those system register
feat(cpufeat): enable FEAT_PFAR support
Implement support for FEAT_PFAR, which introduces the PFAR_ELx system register, recording the faulting physical address for some aborts. Those system registers are trapped by the SCR_EL3.PFARen bit, so set the bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_PFAR build flag, which follows the usual semantics of 2 meaning the feature being runtime detected. Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: I5c9ae750417e75792f693732df3869e02b6e4319 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| #
aa05796e |
| 15-Oct-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(cpufeat): enable FEAT_AIE support" into integration
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| #
bded41d9 |
| 14-Oct-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes I769ac07f,Ia52ad5ed,I5d22ff86,Iea14d49c into integration
* changes: fix(build): prevent races on the build directory refactor(build): make it standard to request a custom linker sc
Merge changes I769ac07f,Ia52ad5ed,I5d22ff86,Iea14d49c into integration
* changes: fix(build): prevent races on the build directory refactor(build): make it standard to request a custom linker script perf(bl32): don't call cm_get_context() unnecessarily refactor(bl1): simplify context getting and setting
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| #
774fb379 |
| 15-Sep-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(build): prevent races on the build directory
The tools (eg fiptool) don't depend on the build directory so it's possible that make tries to build them before it exists. Doing that leads to rando
fix(build): prevent races on the build directory
The tools (eg fiptool) don't depend on the build directory so it's possible that make tries to build them before it exists. Doing that leads to random and unpredictable errors. Almost always, they are built after a BL image which always has a build directory dependency, but when building MANY tf-a builds over MANY threads concurrently this could be observed (I suspect the high load of the system increases latency just enough that this race is lost).
The fix is simple - have an explicit dependency on the build directory.
This is the same problem as 9855568cc and 25cde5f81.
Change-Id: I769ac07f8882f82ea9d72f3b976337284d697310 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
5be66449 |
| 08-Oct-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(build): make it standard to request a custom linker script
Hoist the add_define to a global location so that platforms only have to declare its usage. Fix up #ifdef to #if since we will now
refactor(build): make it standard to request a custom linker script
Hoist the add_define to a global location so that platforms only have to declare its usage. Fix up #ifdef to #if since we will now always pass a definition.
Change-Id: Ia52ad5ed4dcbd157d139c8ca2fb3d35b32343b93 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
cc2523bb |
| 14-Aug-2025 |
Andre Przywara <andre.przywara@arm.com> |
feat(cpufeat): enable FEAT_AIE support
Implement support for FEAT_AIE, which introduces the AMAIR2_ELx and MAIR2_ELx system registers, extending the memory attributes described by {A}MAIR_ELx. Those
feat(cpufeat): enable FEAT_AIE support
Implement support for FEAT_AIE, which introduces the AMAIR2_ELx and MAIR2_ELx system registers, extending the memory attributes described by {A}MAIR_ELx. Those system registers are trapped by the SCR_EL3.AIEn bit, so set the bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_AIE build flag, which follows the usual semantics of 2 meaning the feature being runtime detected. Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: Iba2011719013a89f9cb3a4317bde18254f45cd25 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| #
156943e1 |
| 24-Sep-2025 |
Mark Dykes <mark.dykes@arm.com> |
Merge "feat(cpufeat): enable FEAT_CPA2 for EL3" into integration
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| #
a1032beb |
| 20-Aug-2025 |
John Powell <john.powell@arm.com> |
feat(cpufeat): enable FEAT_CPA2 for EL3
FEAT_CPA2 enables checked pointer arithmetic, which in the event of an arithmetic overflow in pointer generation will result in a non-canonical pointer being
feat(cpufeat): enable FEAT_CPA2 for EL3
FEAT_CPA2 enables checked pointer arithmetic, which in the event of an arithmetic overflow in pointer generation will result in a non-canonical pointer being generated and subsequent address fault.
Note that FEAT_CPA is a trivial implementation that exists in some hardware purely so it can run CPA2-enabled instructions without crashing but they don't actually have checked arithmetic, so FEAT_CPA is not explicitly enabled in TF-A.
Change-Id: I6d2ca7a7e4b986bb9e917aa8baf8091a271c168b Signed-off-by: John Powell <john.powell@arm.com>
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| #
982ee634 |
| 04-Sep-2025 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge changes from topic "xl/separate-bl2" into integration
* changes: feat(fwu): documentation for BL2 separation feat(fwu): separate bl2 image from rest of the FIP feat(fwu): create flag for
Merge changes from topic "xl/separate-bl2" into integration
* changes: feat(fwu): documentation for BL2 separation feat(fwu): separate bl2 image from rest of the FIP feat(fwu): create flag for BL2 separation
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| #
7924b69f |
| 03-Sep-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(arm): unify Linux kernel as BL33 handling" into integration
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| #
2f5fd826 |
| 08-Oct-2024 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(arm): unify Linux kernel as BL33 handling
Streamlines and unifies how Arm platforms pass arguments to the Linux kernel when it is loaded as BL33. It replaces the FVP specific macro `FVP_HW_CONF
feat(arm): unify Linux kernel as BL33 handling
Streamlines and unifies how Arm platforms pass arguments to the Linux kernel when it is loaded as BL33. It replaces the FVP specific macro `FVP_HW_CONFIG_ADDR` with a common macro `ARM_HW_CONFIG_ADDR` for accessing the device tree blob base address.
For FVP the DT address is set to use `ARM_PRELOADED_DTB_BASE` if provided, falling back to a default address otherwise.
This provides a consistent mechanism for Arm platforms to define and override the DTB base address used during kernel handoff. It reduces the chance of misconfiguration, and simplifies platform integration.
Change-Id: Ib668dbb1de9d42cf41c0b0ee9a316f054891752a Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| #
d57362bd |
| 26-Jun-2025 |
Xialin Liu <xialin.liu@arm.com> |
feat(fwu): separate bl2 image from rest of the FIP
Create a separate partition for BL2 image in the GPT. Modify the makefile to package BL2 image and its certificates into a different FIP image.
Ch
feat(fwu): separate bl2 image from rest of the FIP
Create a separate partition for BL2 image in the GPT. Modify the makefile to package BL2 image and its certificates into a different FIP image.
Change-Id: I950883ea0c393a2a063ad9e51bb963cbac742705 Signed-off-by: Xialin Liu <xialin.liu@arm.com>
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| #
19e4312c |
| 02-Sep-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(cpufeat): enable FEAT_MPAM_PE_BW_CTRL support" into integration
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| #
c42aefd3 |
| 12-Aug-2025 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
feat(cpufeat): enable FEAT_MPAM_PE_BW_CTRL support
Implement support for FEAT_MPAM_PE_BW_CTRL, allowing lower Exception Levels to access MPAM_PE_BW_CTRL control registers by disabling their traps to
feat(cpufeat): enable FEAT_MPAM_PE_BW_CTRL support
Implement support for FEAT_MPAM_PE_BW_CTRL, allowing lower Exception Levels to access MPAM_PE_BW_CTRL control registers by disabling their traps to EL3.
When INIT_UNUSED_NS_EL2=1, configure MPAMBW2_EL2 in EL3 so that MPAM_PE_BW_CTRL accesses from EL0/EL1 do not trap to EL2.
At this stage, PE-side MPAM bandwidth controls remain disabled in EL3.
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I8e359b0eb912cff3bdda109b21727a627cac3a7e
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| #
5ce4ee1a |
| 24-Jul-2025 |
Xialin Liu <xialin.liu@arm.com> |
feat(fwu): create flag for BL2 separation
Adding a flag for BL2 separation in common Makefile, for the usage of non FVP platform
Change-Id: I45ecb6833cdbc4873ffe460fd448814d81d6fa4d Signed-off-by:
feat(fwu): create flag for BL2 separation
Adding a flag for BL2 separation in common Makefile, for the usage of non FVP platform
Change-Id: I45ecb6833cdbc4873ffe460fd448814d81d6fa4d Signed-off-by: Xialin Liu <xialin.liu@arm.com>
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