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7c4e1eea |
| 02-May-2024 |
Chris Kay <chris.kay@arm.com> |
build: unify verbosity handling
This change introduces a few helper variables for dealing with verbose and silent build modes: `silent`, `verbose`, `q` and `s`.
The `silent` and `verbose` variables
build: unify verbosity handling
This change introduces a few helper variables for dealing with verbose and silent build modes: `silent`, `verbose`, `q` and `s`.
The `silent` and `verbose` variables are boolean values determining whether the build system has been configured to run silently or verbosely respectively (i.e. with `--silent` or `V=1`).
These two modes cannot be used together - if `silent` is truthy then `verbose` is always falsy. As such:
make --silent V=1
... results in a silent build.
In addition to these boolean variables, we also introduce two new variables - `s` and `q` - for use in rule recipes to conditionally suppress the output of commands.
When building silently, `s` expands to a value which disables the command that follows, and `q` expands to a value which supppresses echoing of the command:
$(s)echo 'This command is neither echoed nor executed' $(q)echo 'This command is executed but not echoed'
When building verbosely, `s` expands to a value which disables the command that follows, and `q` expands to nothing:
$(s)echo 'This command is neither echoed nor executed' $(q)echo 'This command is executed and echoed'
In all other cases, both `s` and `q` expand to a value which suppresses echoing of the command that follows:
$(s)echo 'This command is executed but not echoed' $(q)echo 'This command is executed but not echoed'
The `s` variable is predominantly useful for `echo` commands, where you always want to suppress echoing of the command itself, whilst `q` is more useful for all other commands.
Change-Id: I8d8ff6ed714d3cb401946c52955887ed7dca602b Signed-off-by: Chris Kay <chris.kay@arm.com>
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| #
261edb6a |
| 28-May-2024 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes I710d1780,Ia9a59bde into integration
* changes: feat(gpt): configure memory size protected by bitlock feat(gpt): add support for large GPT mappings
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| #
f2735ebc |
| 23-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "docs(changelog): changelog for v2.11 release" into integration
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| #
669e2b15 |
| 17-May-2024 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
docs(changelog): changelog for v2.11 release
Generated this change-log using below command: npm run release -- --skip.commit --skip.tag --release-as 2.11.0
Change-Id: I34c7b342549781057da1b18116500
docs(changelog): changelog for v2.11 release
Generated this change-log using below command: npm run release -- --skip.commit --skip.tag --release-as 2.11.0
Change-Id: I34c7b342549781057da1b18116500f110bc3f5ad Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Signed-off-by: Juan Pablo Conde <JuanPablo.Conde@arm.com>
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| #
d766084f |
| 13-May-2024 |
AlexeiFedorov <Alexei.Fedorov@arm.com> |
feat(gpt): configure memory size protected by bitlock
This patch adds support in GPT library for configuration of the memory block size protected by one bit of 'bitlock' structure. Build option 'RME
feat(gpt): configure memory size protected by bitlock
This patch adds support in GPT library for configuration of the memory block size protected by one bit of 'bitlock' structure. Build option 'RME_GPT_BITLOCK_BLOCK' defines the number of 512MB blocks covered by each bit. This numeric parameter must be a power of 2 and can take the values from 0 to 512. Setting this value to 0 chooses a single spinlock for all GPT L1 table entries. The default value is set to 1 which corresponds to 512MB per bit.
Change-Id: I710d178072894a3ef40daebea701f74d19e8a3d7 Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
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98a04b22 |
| 15-May-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "build: skip toolchain detection for some targets" into integration
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| #
291e7182 |
| 14-May-2024 |
Chris Kay <chris.kay@arm.com> |
build: skip toolchain detection for some targets
Most developers run the `clean`, `checkpatch` and other similar targets without specifying any other additional build options. When combined with a f
build: skip toolchain detection for some targets
Most developers run the `clean`, `checkpatch` and other similar targets without specifying any other additional build options. When combined with a flow where the developer passes `CROSS_COMPILE` or `CC` explicitly, and where the default-configured tools are not on the PATH, these targets will warn about unrecognized toolchain tools.
This change is a workaround for this whereby the toolchain makefile is not expanded unless a target *not* named `*clean`, `check*` `doc` or `*tool` has been specified.
Change-Id: I2f2a275964b65253df07c2207043217b14f615fe Signed-off-by: Chris Kay <chris.kay@arm.com>
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| #
ec0088bb |
| 13-Mar-2024 |
AlexeiFedorov <Alexei.Fedorov@arm.com> |
feat(gpt): add support for large GPT mappings
This patch adds support for large GPT mappings using Contiguous descriptors. The maximum size of supported contiguous block in MB is defined in RME_GPT_
feat(gpt): add support for large GPT mappings
This patch adds support for large GPT mappings using Contiguous descriptors. The maximum size of supported contiguous block in MB is defined in RME_GPT_MAX_BLOCK build parameter and takes values 0, 2, 32 and 512 and by default set to 2 in make_helpers/defaults.mk. Setting RME_GPT_MAX_BLOCK value to 0 disables use of Contiguous descriptors. Function gpt_tlbi_by_pa_ll() and its declaration are removed from lib/aarch64/misc_helpers.S and include/arch/aarch64/arch_helpers.h, because the GPT library now uses tlbirpalos_xxx() functions.
Change-Id: Ia9a59bde1741c5666b4ca1de9324e6dfd6f734eb Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
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b38b37ba |
| 10-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "ar/pmuSaveRestore" into integration
* changes: feat(tc): add save/restore DSU PMU register support feat(dsu): save/restore DSU PMU register feat(plat): add platform A
Merge changes from topic "ar/pmuSaveRestore" into integration
* changes: feat(tc): add save/restore DSU PMU register support feat(dsu): save/restore DSU PMU register feat(plat): add platform API that gets cluster ID
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| #
32e5979a |
| 09-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes Ia6611e0c,Ic1ea4d59 into integration
* changes: build: remove experimental mark for PSA FWU support build: mark DICE_PROTECTION_ENVIRONMENT as an experimental feature
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f99a69c3 |
| 21-Dec-2023 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
feat(dsu): save/restore DSU PMU register
Adds driver support to preserve DSU PMU register values over a DSU power cycle. This driver needs to be enabled by the platforms that support DSU and also ne
feat(dsu): save/restore DSU PMU register
Adds driver support to preserve DSU PMU register values over a DSU power cycle. This driver needs to be enabled by the platforms that support DSU and also need it's PMU registers to be preserved
Change-Id: I7fc68a3d7d99ee369379aa5cd114fffc763fc0d2 Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
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| #
91dcf7d1 |
| 09-May-2024 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
build: remove experimental mark for PSA FWU support
The PSA FWU support is significantly matured in terms of its design, threat model documentation, and implementation as well as its adherence to th
build: remove experimental mark for PSA FWU support
The PSA FWU support is significantly matured in terms of its design, threat model documentation, and implementation as well as its adherence to the latest PSA FWU specifications. Consequently, the experimental mark for this feature has been removed.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Ia6611e0c71485413b0da885f41ac59c93038e480
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| #
82222db8 |
| 09-May-2024 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
build: mark DICE_PROTECTION_ENVIRONMENT as an experimental feature
The DICE_PROTECTION_ENVIRONMENT support has been marked as experimental since it has not incorporated into the threat model.
Signe
build: mark DICE_PROTECTION_ENVIRONMENT as an experimental feature
The DICE_PROTECTION_ENVIRONMENT support has been marked as experimental since it has not incorporated into the threat model.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Ic1ea4d59fd8a3fde7ce0404488a56e9d11bc1b85
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a97e1f97 |
| 08-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "early_console" into integration
* changes: feat(stm32mp2): use early traces feat(st-bsec): use early traces refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CON
Merge changes from topic "early_console" into integration
* changes: feat(stm32mp2): use early traces feat(st-bsec): use early traces refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CONSOLE feat(console): introduce EARLY_CONSOLE feat(bl32): create an sp_min_setup function
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ee9cfacc |
| 07-May-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "makefile-cleanup" into integration
* changes: build: improve diagnostics for unrecognized toolchain tools build(rzg): separate BL2 and BL31 SREC generation build(rcar
Merge changes from topic "makefile-cleanup" into integration
* changes: build: improve diagnostics for unrecognized toolchain tools build(rzg): separate BL2 and BL31 SREC generation build(rcar): separate BL2 and BL31 SREC generation build: separate preprocessing from DTB compilation build: remove `MAKE_BUILD_STRINGS` function
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| #
758ccb80 |
| 08-Mar-2024 |
Chris Kay <chris.kay@arm.com> |
build: remove `MAKE_BUILD_STRINGS` function
This function causes the build message to be generated and compiled in two different ways, with one way done inside `build_macros.mk` and the other done i
build: remove `MAKE_BUILD_STRINGS` function
This function causes the build message to be generated and compiled in two different ways, with one way done inside `build_macros.mk` and the other done inside `windows.mk`, mostly because it's done by generating the C file on the command line.
We can instead replace this whole build message generation sequence with a simple standard C compilation command and a normal C file.
Change-Id: I8bc136380c9585ddeec9a11154ee39ef70526f81 Signed-off-by: Chris Kay <chris.kay@arm.com>
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| #
ae770fed |
| 16-Jan-2024 |
Yann Gautier <yann.gautier@st.com> |
feat(console): introduce EARLY_CONSOLE
This is a generic porting of what was done on ST platforms with flag STM32MP_EARLY_CONSOLE. It creates the flag and the prototype for plat_setup_early_console(
feat(console): introduce EARLY_CONSOLE
This is a generic porting of what was done on ST platforms with flag STM32MP_EARLY_CONSOLE. It creates the flag and the prototype for plat_setup_early_console(). This function depends on platform implementation. This function call is added at the beginning of each BL image early setup function. The patch also introduce an extra log macro: EARLY_ERROR. This can replace ERROR macro in code that will only be executed before the default console is enabled, and will do nothing when the EARLY_CONSOLE is not enabled. This can then save some space in memory.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I77bf0a0c4289b4c7df94e4bfb783a938e05bf023
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| #
9bbc989f |
| 12-Apr-2024 |
Soby Mathew <soby.mathew@arm.com> |
Merge "feat(rme): build TF-A with ENABLE_RME for Armv9.2" into integration
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| #
eee0ec48 |
| 26-Mar-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "mte_fixes" into integration
* changes: build(changelog): move mte to mte2 refactor(mte): remove mte, mte_perm
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c282384d |
| 07-Mar-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
refactor(mte): remove mte, mte_perm
Currently both FEAT_MTE and FEAT_MTE_PERM aren't used for enabling of any feature bits in EL3. So remove both FEAT handling.
All mte regs that are currently cont
refactor(mte): remove mte, mte_perm
Currently both FEAT_MTE and FEAT_MTE_PERM aren't used for enabling of any feature bits in EL3. So remove both FEAT handling.
All mte regs that are currently context saved/restored are needed only when FEAT_MTE2 is enabled, so move to usage of FEAT_MTE2 and remove FEAT_MTE usage.
BREAKING CHANGE: Any platform or downstream code trying to use SCR_EL3.ATA bit(26) will see failures as this is now moved to be used only with FEAT_MTE2 with commit@ef0d0e5478a3f19cbe70a378b9b184036db38fe2
Change-Id: Id01e154156571f7792135639e17dc5c8d0e17cf8 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| #
7d5fc98f |
| 13-Mar-2024 |
AlexeiFedorov <Alexei.Fedorov@arm.com> |
feat(rme): build TF-A with ENABLE_RME for Armv9.2
FEAT_RME is OPTIONAL in an Armv9.2 implementation, so set ARM_ARCH_MAJOR := 9 and ARM_ARCH_MINOR := 2 when TF-A is built with 'ENABLE_RME = 1'.
Cha
feat(rme): build TF-A with ENABLE_RME for Armv9.2
FEAT_RME is OPTIONAL in an Armv9.2 implementation, so set ARM_ARCH_MAJOR := 9 and ARM_ARCH_MINOR := 2 when TF-A is built with 'ENABLE_RME = 1'.
Change-Id: Ibcdb23bd057983eb846eed0b0da8c4d72ed696ae Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
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| #
e7d14fa8 |
| 07-Mar-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "DPE" into integration
* changes: feat(tc): group components into certificates feat(dice): add cert_id argument to dpe_derive_context() refactor(sds): modify log level
Merge changes from topic "DPE" into integration
* changes: feat(tc): group components into certificates feat(dice): add cert_id argument to dpe_derive_context() refactor(sds): modify log level for region validity feat(tc): add dummy TRNG support to be able to boot pVMs feat(tc): get the parent component provided DPE context_handle feat(tc): share DPE context handle with child component feat(tc): add DPE context handle node to device tree feat(tc): add DPE backend to the measured boot framework feat(auth): add explicit entries for key OIDs feat(dice): add DPE driver to measured boot feat(dice): add client API for DICE Protection Environment feat(dice): add QCBOR library as a dependency of DPE feat(dice): add typedefs from the Open DICE repo docs(changelog): add 'dice' scope refactor(tc): align image identifier string macros refactor(fvp): align image identifier string macros refactor(imx8m): align image identifier string macros refactor(qemu): align image identifier string macros fix(measured-boot): add missing image identifier string refactor(measured-boot): move metadata size macros to a common header refactor(measured-boot): move image identifier strings to a common header
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| #
e7f1181f |
| 07-Jun-2023 |
Tamas Ban <tamas.ban@arm.com> |
feat(tc): add DPE backend to the measured boot framework
The client platform relies on the DICE attestation scheme. RSS provides the DICE Protection Environment (DPE) service. TF-A measured boot fra
feat(tc): add DPE backend to the measured boot framework
The client platform relies on the DICE attestation scheme. RSS provides the DICE Protection Environment (DPE) service. TF-A measured boot framework supports multiple backends. A given platform always enables the corresponding backend which is required by the attestation scheme.
Signed-off-by: Tamas Ban <tamas.ban@arm.com> Change-Id: Idc3360d0d7216e4859e99b5db3d377407e0aeee5
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| #
58843f25 |
| 05-Mar-2024 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge "build: allow platform makefiles to configure `ENABLE_LTO`" into integration
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fa402f38 |
| 20-Feb-2024 |
Chris Kay <chris.kay@arm.com> |
build: allow platform makefiles to configure `ENABLE_LTO`
This change introduces a lazily-evaluated condition on `ENABLE_LTO` to the `LTO_CFLAGS` variable as opposed to evaluating the condition eage
build: allow platform makefiles to configure `ENABLE_LTO`
This change introduces a lazily-evaluated condition on `ENABLE_LTO` to the `LTO_CFLAGS` variable as opposed to evaluating the condition eagerly.
This concludes a recent request on the mailing list:
https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.org/thread/EU3XR4VB3RP2NQB372QPZ4VRP57ANNLC/
Change-Id: Ie1f73352eb51fb2ceb2385232336312216ef87fc Signed-off-by: Chris Kay <chris.kay@arm.com>
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