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46339731 |
| 12-Aug-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #182 from soby-mathew/sm/stack_optimize
Reduce runtime stack size and add compilation macro for each BL stage
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27905d0a |
| 16-Jul-2014 |
Soby Mathew <soby.mathew@arm.com> |
Add compilation macro for each BL stage
This patch defines a compile time macro for each boot loader stage which allows compilation of code only for a specific stage.
Change-Id: I3a4068404cd3dc26d6
Add compilation macro for each BL stage
This patch defines a compile time macro for each boot loader stage which allows compilation of code only for a specific stage.
Change-Id: I3a4068404cd3dc26d652556ca9ca7afea8dd28ef
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6397bf6a |
| 28-Jul-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #172 from soby-mathew/sm/asm_assert
Introduce asm assert and optimize crash reporting
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626ed510 |
| 25-Jun-2014 |
Soby Mathew <soby.mathew@arm.com> |
Rework the crash reporting in BL3-1 to use less stack
This patch reworks the crash reporting mechanism to further optimise the stack and code size. The reporting makes use of assembly console functi
Rework the crash reporting in BL3-1 to use less stack
This patch reworks the crash reporting mechanism to further optimise the stack and code size. The reporting makes use of assembly console functions to avoid calling C Runtime to report the CPU state. The crash buffer requirement is reduced to 64 bytes with this implementation. The crash buffer is now part of per-cpu data which makes retrieving the crash buffer trivial.
Also now panic() will use crash reporting if invoked from BL3-1.
Fixes ARM-software/tf-issues#199
Change-Id: I79d27a4524583d723483165dc40801f45e627da5
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bc920128 |
| 14-Jul-2014 |
Soby Mathew <soby.mathew@arm.com> |
Implement an assert() callable from assembly code
The patch implements a macro ASM_ASSERT() which can be invoked from assembly code. When assertion happens, file name and line number of the check is
Implement an assert() callable from assembly code
The patch implements a macro ASM_ASSERT() which can be invoked from assembly code. When assertion happens, file name and line number of the check is written to the crash console.
Fixes ARM-software/tf-issues#95
Change-Id: I6f905a068e1c0fa4f746d723f18df60daaa00a86
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592dd7cb |
| 25-Jul-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #176 from danh-arm/jc/tf-issues/203-v3
Add support for printing version at runtime v3
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aaa3e722 |
| 30-Jun-2014 |
Juan Castillo <juan.castillo@arm.com> |
Add support for printing version at runtime
Print out Trusted Firmware version at runtime at each BL stage. Message consists of TF version as defined statically in the Makefile (e.g. v0.4), build mo
Add support for printing version at runtime
Print out Trusted Firmware version at runtime at each BL stage. Message consists of TF version as defined statically in the Makefile (e.g. v0.4), build mode (debug|release) and a customizable build string:
1. By defining BUILD_STRING in command line when building TF 2. Default string is git commit ID 3. Empty if git meta-data is not available
Fixes ARM-software/tf-issues#203
Change-Id: I5c5ba438f66ab68810427d76b49c5b9177a957d6
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54d0911f |
| 25-Jul-2014 |
Dan Handley <dan.handley@arm.com> |
Merge pull request #168 from sandrine-bailleux/sb/set-default-gic-arch
Define ARM_GIC_ARCH default value for all platforms
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705bf680 |
| 25-Jul-2014 |
Dan Handley <dan.handley@arm.com> |
Merge pull request #174 from soby-mathew:sm/lean_printf_v2
Implement a leaner printf for Trusted Firmware
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b79af934 |
| 12-Jun-2014 |
Soby Mathew <soby.mathew@arm.com> |
Implement a leaner printf for Trusted Firmware
This patch implements a "tf_printf" which supports only the commonly used format specifiers in Trusted Firmware, which uses a lot less stack space than
Implement a leaner printf for Trusted Firmware
This patch implements a "tf_printf" which supports only the commonly used format specifiers in Trusted Firmware, which uses a lot less stack space than the stdlib printf function.
Fixes ARM-software/tf-issues#116
Change-Id: I7dfa1944f4c1e634b3e2d571f49afe02d109a351
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2b98e789 |
| 17-Jul-2014 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Define ARM_GIC_ARCH default value for all platforms
The ARM_GIC_ARCH build option was supposed to default to 2 on all platforms. However, the default value was set in the FVP makefile so for all oth
Define ARM_GIC_ARCH default value for all platforms
The ARM_GIC_ARCH build option was supposed to default to 2 on all platforms. However, the default value was set in the FVP makefile so for all other platforms it wasn't even defined.
This patch moves the default value to the main Makefile. The platform port can then override it if needed.
Change-Id: I8e2da1cce7ffa3ed18814bbdcbcf2578101f18a6
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a1a44177 |
| 11-Jul-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #162 from jcastillo-arm/jc/tf-issues/194
Allow FP register context to be optional at build time
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ab26147d |
| 11-Jul-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #164 from sandrine-bailleux/sb/bl30-support-v2
Add support for BL3-0 image (v2)
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93d81d64 |
| 24-Jun-2014 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Add support for BL3-0 image
- Add support for loading a BL3-0 image in BL2. Information about memory extents is populated by platform-specific code. Subsequent handling of BL3-0 is also platf
Add support for BL3-0 image
- Add support for loading a BL3-0 image in BL2. Information about memory extents is populated by platform-specific code. Subsequent handling of BL3-0 is also platform specific. The BL2 main function has been broken down to improve readability. The BL3-2 image is now loaded before the BL3-3 image to align with the boot flow.
- Build system: Add support for specifying a BL3-0 image that will be included into the FIP image.
- IO FIP driver: Add support for identifying a BL3-0 image inside a FIP image.
- Update the documentation to reflect the above changes.
Change-Id: I067c184afd52ccaa86569f13664757570c86fc48
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0f21c547 |
| 25-Jun-2014 |
Juan Castillo <juan.castillo@arm.com> |
Allow FP register context to be optional at build time
CTX_INCLUDE_FPREGS make variable allows us to include or exclude FP registers from context structure, in case FP is not used by TSPD.
Fixes AR
Allow FP register context to be optional at build time
CTX_INCLUDE_FPREGS make variable allows us to include or exclude FP registers from context structure, in case FP is not used by TSPD.
Fixes ARM-software/tf-issues#194
Change-Id: Iee41af382d691340c7ae21830ad1bbf95dad1f4b
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e73af8ac |
| 24-Jun-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2
Remove all checkpatch errors from codebase
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a28daa0d |
| 24-Jun-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #149 from sandrine-bailleux/sb/warn-missing-include-dirs
Compile with '-Wmissing-include-dirs' flag
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4f2104ff |
| 13-Jun-2014 |
Juan Castillo <juan.castillo@arm.com> |
Remove all checkpatch errors from codebase
Exclude stdlib files because they do not follow kernel code style.
Fixes ARM-software/tf-issues#73
Change-Id: I4cfafa38ab436f5ab22c277cb38f884346a267ab
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a0df63ef |
| 23-Jun-2014 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Compile with '-Wmissing-include-dirs' flag
Add the '-Wmissing-include-dirs' flag to the CFLAGS and ASFLAGS to make the build fail if the compiler or the assembler is given a nonexistant directory in
Compile with '-Wmissing-include-dirs' flag
Add the '-Wmissing-include-dirs' flag to the CFLAGS and ASFLAGS to make the build fail if the compiler or the assembler is given a nonexistant directory in the list of directories to be searched for header files.
Also remove 'include/bl1' and 'include/bl2' directories from the search path for header files as they don't exist anymore.
Change-Id: I2475b78ba8b7b448b9d0afaa9ad975257f638b89
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5c633bdf |
| 16-Jun-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2
Make system register functions inline assembly v2
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5c3272a7 |
| 02-Jun-2014 |
Andrew Thoelke <andrew.thoelke@arm.com> |
Make system register functions inline assembly
Replace the current out-of-line assembler implementations of the system register and system instruction operations with inline assembler.
This enables
Make system register functions inline assembly
Replace the current out-of-line assembler implementations of the system register and system instruction operations with inline assembler.
This enables better compiler optimisation and code generation when accessing system registers.
Fixes ARM-software/tf-issues#91
Change-Id: I149af3a94e1e5e5140a3e44b9abfc37ba2324476
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22e002da |
| 27-May-2014 |
Dan Handley <dan.handley@arm.com> |
Merge pull request #112 from danh-arm:dh/refactor-plat-header-v4 into for-v0.4
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5f0cdb05 |
| 14-May-2014 |
Dan Handley <dan.handley@arm.com> |
Split platform.h into separate headers
Previously, platform.h contained many declarations and definitions used for different purposes. This file has been split so that:
* Platform definitions used
Split platform.h into separate headers
Previously, platform.h contained many declarations and definitions used for different purposes. This file has been split so that:
* Platform definitions used by common code that must be defined by the platform are now in platform_def.h. The exact include path is exported through $PLAT_INCLUDES in the platform makefile.
* Platform definitions specific to the FVP platform are now in /plat/fvp/fvp_def.h.
* Platform API declarations specific to the FVP platform are now in /plat/fvp/fvp_private.h.
* The remaining platform API declarations that must be ported by each platform are still in platform.h but this file has been moved to /include/plat/common since this can be shared by all platforms.
Change-Id: Ieb3bb22fbab3ee8027413c6b39a783534aee474a
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db0de0eb |
| 23-May-2014 |
Andrew Thoelke <andrew.thoelke@arm.com> |
Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3
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dbad1bac |
| 24-Apr-2014 |
Vikram Kanigiri <vikram.kanigiri@arm.com> |
Add support for BL3-1 as a reset vector
This change adds optional reset vector support to BL3-1 which means BL3-1 entry point can detect cold/warm boot, initialise primary cpu, set up cci and mail b
Add support for BL3-1 as a reset vector
This change adds optional reset vector support to BL3-1 which means BL3-1 entry point can detect cold/warm boot, initialise primary cpu, set up cci and mail box.
When using BL3-1 as a reset vector it is assumed that the BL3-1 platform code can determine the location of the BL3-2 images, or load them as there are no parameters that can be passed to BL3-1 at reset.
It also fixes the incorrect initialisation of mailbox registers on the FVP platform
This feature can be enabled by building the code with make variable RESET_TO_BL31 set as 1
Fixes ARM-software/TF-issues#133 Fixes ARM-software/TF-issues#20
Change-Id: I4e23939b1c518614b899f549f1e8d412538ee570
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