| 700b4a69 | 22-Nov-2016 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: bugfix core_mmu_get_entry_primitive()
Fixes both implementations of core_mmu_get_entry_primitive() to correctly report TEE_MATTR_TABLE.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.
core: bugfix core_mmu_get_entry_primitive()
Fixes both implementations of core_mmu_get_entry_primitive() to correctly report TEE_MATTR_TABLE.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5e9f2186 | 27-Oct-2016 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: user_ta_dump_state() prints phys addr
user_ta_dump_state() prints physical addresses in addition to the already present virtual addresses.
Reviewed-by: Jerome Forissier <jerome.forissier@lina
core: user_ta_dump_state() prints phys addr
user_ta_dump_state() prints physical addresses in addition to the already present virtual addresses.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5acf809a | 28-Nov-2016 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: protect tee_pobj functions with mutex
The tee_pobj functions can be called concurrently, add a mutex to protect the internal state.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
core: protect tee_pobj functions with mutex
The tee_pobj functions can be called concurrently, add a mutex to protect the internal state.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP Base model) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 80b563f5 | 02-Dec-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
Makefile: unexport MAKEFILE_LIST to reduce the size of the environment
To avoid issues [1] with some projects that call us from a top-level Makefile that has an 'export' directive or a '.EXPORT_ALL_
Makefile: unexport MAKEFILE_LIST to reduce the size of the environment
To avoid issues [1] with some projects that call us from a top-level Makefile that has an 'export' directive or a '.EXPORT_ALL_VARIABLES:' target, we prevent $(MAKEFILE_LIST) from being exported, thereby greatly reducing the size of the environment.
[1] Typically, the build succeeds the first time (because there is no .cmd/.d files yet), then the second invocation of make fails with:
CHK out/arm-plat-vexpress/conf.mk make[3]: execvp: /bin/bash: Argument list too long
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Zeng Tao <prime.zeng@hisilicon.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 05e7884d | 01-Dec-2016 |
Etienne Carriere <etienne.carriere@linaro.org> |
pl310: beautify
Use explicit labels instead of comments to make code readable. Remove useless comments. Remove few useless instructions. Indent assembly instructions.
Signed-off-by: Etienne Carrier
pl310: beautify
Use explicit labels instead of comments to make code readable. Remove useless comments. Remove few useless instructions. Indent assembly instructions.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com>
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| 6f4ed9ae | 01-Dec-2016 |
Etienne Carriere <etienne.carriere@linaro.org> |
pl310: fix 16-way pl310 support
Get number of ways from the PL310 configuration AUX_CTRL[bit#16]. tz_ssvce_def.h require util.h for BIT32().
Signed-off-by: Etienne Carriere <etienne.carriere@linaro
pl310: fix 16-way pl310 support
Get number of ways from the PL310 configuration AUX_CTRL[bit#16]. tz_ssvce_def.h require util.h for BIT32().
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Tested-by: Peng Fan <peng.fan@nxp.com> (i.MX6Q-SDB) Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2260)
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| 249e707b | 30-Nov-2016 |
Victor Chong <victor.chong@linaro.org> |
README: Update outdated text and link
Signed-off-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.o
README: Update outdated text and link
Signed-off-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| 71c1078a | 05-Nov-2016 |
Victor Chong <victor.chong@linaro.org> |
hikey: enable spi by default and add sample test code
Suggested-by: Daniel Thompson <daniel.thompson@linaro.org> Suggested-by: Leo Yan <leo.yan@linaro.org> Suggested-by: Haojian Zhuang <haojian.zhua
hikey: enable spi by default and add sample test code
Suggested-by: Daniel Thompson <daniel.thompson@linaro.org> Suggested-by: Leo Yan <leo.yan@linaro.org> Suggested-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Victor Chong <victor.chong@linaro.org> Tested-by: Victor Chong <victor.chong@linaro.org> (with CFG_SPI_TEST=y) Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 32157afc | 29-Nov-2016 |
Guanchao Liang <liang.guanchao@linaro.org> |
add static ta for testing interrupt framework
Signed-off-by: Guanchao Liang <liang.guanchao@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne
add static ta for testing interrupt framework
Signed-off-by: Guanchao Liang <liang.guanchao@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Tested-by: Joakim Bech <joakim.bech@linaro.org> (QEMU) [Update commit author to be same as S-o-b: above] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 26ed70ec | 29-Nov-2016 |
Guanchao Liang <liang.guanchao@linaro.org> |
core: add code for the interrupt framework
With this commit, we add three more GIC APIs for the kernel of OPTEE-OS: itr_raise_sgi : can raise software generate interrupt(SGI) from secure world to no
core: add code for the interrupt framework
With this commit, we add three more GIC APIs for the kernel of OPTEE-OS: itr_raise_sgi : can raise software generate interrupt(SGI) from secure world to no-secure world, or secure world to secure world. It's a quick communication between different worlds and different cores. Because SGI is using the GIC N-N model, so with this API, every core can receive the interrupt if want.
itr_raise_pi : can trigger the peripheral interrupt with the corresponding interrupt number. When sending it to N cores, just one core can receive the effective interrupt.
itr_set_affinity : can target the peripheral interrupt to the core you want, it means that one can bind the interrupt to the corresponding core use this API.
The usage may as follow: itr_raise_sgi(11, 0x1 << 1) it will raise SGI11 to core 1, and if you want not only core 1 can receive SGI11 but also core 2, then you can change the code to itr_raise_sgi(11, 0x1 << 1 || 0x1 << 2).
itr_set_affinity(61, 0x1 << 1) itr_raise_pi(61) These two APIs may use together, the operation set_affinity set the PI61 can just sent to core 1, then raise_pi, core 1 will receive the peripheral interrupt 61.
Signed-off-by: Guanchao Liang <liang.guanchao@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Tested-by: Joakim Bech <joakim.bech@linaro.org> (QEMU) [Update commit author to be same as S-o-b: above] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| ab046bb5 | 18-Nov-2016 |
Etienne Carriere <etienne.carriere@linaro.org> |
core/armv7: cleanup bootargs
In non-A-TF boot modes, OP-TEE core expects some boot arguments: - nonsecure entry point, default expected from core register LR. - pagestore address, when pager is enab
core/armv7: cleanup bootargs
In non-A-TF boot modes, OP-TEE core expects some boot arguments: - nonsecure entry point, default expected from core register LR. - pagestore address, when pager is enable, from core register R0. - devicetree address, when DT is enable, from core register R2.
Some non-A-TF booted platform rely on u-boot has bootloader, and expect u-boot to boot both linux and op-tee. armv7/linux expects the following boot arguments: - machine ID, expected from core register R1. - devicetree address from core register R2.
Before this patch, some platform used CFG_TEE_GDB_BOOT together with CFG_BUILT_IN_ARGS to both provide op-tee core boot arguments, and relay linux argument from op-tee entry to linux kernel entry (nonsecure entry).
This change proposes to rationalize a bit. Both linux and optee expect device tree from register R2. op-tee could relay machine ID (R1).
This change removes CFG_TEE_GDB_BOOT and CFG_BUILT_IN_ARGS that are now deprecated.
This change still supports CFG_PAGEABLE_ADDR, CFG_DT_ADDR and CFG_NS_ENTRY_ADDR to statically define the pagestore, device tree and nonsecure entry. These can be defined independently.
Since this change, if CFG_WITH_ARM_TRUSTED_FW is not enable, the standard boot arguments (registers R1 and R2 at optee entry) are propagated to the non secure entry.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| ed52538e | 15-Nov-2016 |
Etienne Carriere <etienne.carriere@linaro.org> |
core/armv7: clear 4th arg of secondary boot cores nonsecure entry
Secondary boot cores shall clean cpu register R4 before leaving secure. R4 is the 4th argument propagated to non-secure entry by opt
core/armv7: clear 4th arg of secondary boot cores nonsecure entry
Secondary boot cores shall clean cpu register R4 before leaving secure. R4 is the 4th argument propagated to non-secure entry by optee monitor.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| 050ba678 | 25-Nov-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: crypto: avoid undefined bit shifts by a negative amount (-1)
The GET_ATTRIBUTE() and SET_ATTRIBUTE() macros are replaced with static functions that properly handle the case when the attribute
core: crypto: avoid undefined bit shifts by a negative amount (-1)
The GET_ATTRIBUTE() and SET_ATTRIBUTE() macros are replaced with static functions that properly handle the case when the attribute is not found.
Fixes: Coverity CID:1378609 CID:1378610 CID:1378611 CID:1378612 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 827308b8 | 25-Nov-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
libutee: TEE_AEUpdate(): do nothing when (!srcData && !srcLen)
Fixes: Coverity CID:1378615 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@l
libutee: TEE_AEUpdate(): do nothing when (!srcData && !srcLen)
Fixes: Coverity CID:1378615 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a9f92a95 | 25-Nov-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
libutee: TEE_AEEncryptFinal(): do nothing when (!srcData && !srcLen)
Fixes: Coverity CID:1378616 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wikla
libutee: TEE_AEEncryptFinal(): do nothing when (!srcData && !srcLen)
Fixes: Coverity CID:1378616 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2fda30ff | 25-Nov-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
libutee: TEE_AEDecryptFinal(): do nothing when (!srcData && !srcLen)
Fixes: Coverity CID:1378617 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wikla
libutee: TEE_AEDecryptFinal(): do nothing when (!srcData && !srcLen)
Fixes: Coverity CID:1378617 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4bd53c54 | 24-Nov-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
libutee: TEE_AllocateOperation(): rewrite FALLTHROUGH comment
Fixes: Coverity CID:1378629 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@li
libutee: TEE_AllocateOperation(): rewrite FALLTHROUGH comment
Fixes: Coverity CID:1378629 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f21873cd | 24-Nov-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
libutee: TEE_CipherDoFinal(): do nothing when (!srcData && !srcLen)
Fixes: Coverity CID:1378631 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklan
libutee: TEE_CipherDoFinal(): do nothing when (!srcData && !srcLen)
Fixes: Coverity CID:1378631 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e32c5ddf | 24-Nov-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
libutee: TEE_CipherUpdate(): do nothing when (!srcData && !srcLen)
Fixes: Coverity CID:1378632 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wikland
libutee: TEE_CipherUpdate(): do nothing when (!srcData && !srcLen)
Fixes: Coverity CID:1378632 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b9d8f134 | 24-Nov-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
libutee: TEE_GetObjectValueAttribute(): 'a' and 'b' may be NULL
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> |
| be96c837 | 24-Nov-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
libutee: TEE_GetObjectValueAttribute(): copy data on success only
buf[0] and buf[1] can be relied upon only when utee_cryp_obj_get_attr() is successful.
Fixes: Coverity CID:1378646 Signed-off-by: J
libutee: TEE_GetObjectValueAttribute(): copy data on success only
buf[0] and buf[1] can be relied upon only when utee_cryp_obj_get_attr() is successful.
Fixes: Coverity CID:1378646 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8daf3da9 | 24-Nov-2016 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: fix stack setup at secondary core entry
stack_tmp_offset is required by secondary boot cores before pager is initialized.
Fixes: e56a56428def ("core: sm: use stack_tmp for sm_from_nsec") Sign
core: fix stack setup at secondary core entry
stack_tmp_offset is required by secondary boot cores before pager is initialized.
Fixes: e56a56428def ("core: sm: use stack_tmp for sm_from_nsec") Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c822f03f | 17-Oct-2016 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: sm: use stack_tmp for sm_from_nsec()
As the C function sm_from_nsec() used by the secure monitor is expected to be extended over time it needs a larger stack. With this patch the secure monito
core: sm: use stack_tmp for sm_from_nsec()
As the C function sm_from_nsec() used by the secure monitor is expected to be extended over time it needs a larger stack. With this patch the secure monitor uses stack_tmp. The first part of stack_tmp is permanently reserved for secure and non-secure contexts.
Tested-by: Joakim Bech <joakim.bech@linaro.org> (RPi3) Tested-by: Andrew F. Davis <afd@ti.com> (plat-ti) Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm-b2260) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU v7 & v8) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3f4d6849 | 17-Oct-2016 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: redesign secure monitor
The secure monitor is redesigned to make it easier to register services.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jen
core: redesign secure monitor
The secure monitor is redesigned to make it easier to register services.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 9dd11da5 | 19-Oct-2016 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm32: add mov_imm assembly macro
Adds mov_imm assembly macro to load 32-bit immediate values into a register.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens
core: arm32: add mov_imm assembly macro
Adds mov_imm assembly macro to load 32-bit immediate values into a register.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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