1 /* 2 * Copyright (c) 2016, Linaro Limited 3 * Copyright (c) 2014, STMicroelectronics International N.V. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <platform_config.h> 30 31 #include <arm.h> 32 #include <assert.h> 33 #include <keep.h> 34 #include <kernel/misc.h> 35 #include <kernel/panic.h> 36 #include <kernel/tee_ta_manager.h> 37 #include <kernel/thread_defs.h> 38 #include <kernel/thread.h> 39 #include <kernel/tz_proc_def.h> 40 #include <kernel/tz_proc.h> 41 #include <mm/core_memprot.h> 42 #include <mm/tee_mm.h> 43 #include <mm/tee_mmu_defs.h> 44 #include <mm/tee_mmu.h> 45 #include <mm/tee_pager.h> 46 #include <optee_msg.h> 47 #include <sm/optee_smc.h> 48 #include <sm/sm.h> 49 #include <tee/tee_fs_rpc.h> 50 #include <trace.h> 51 #include <util.h> 52 53 #include "thread_private.h" 54 55 #ifdef CFG_WITH_ARM_TRUSTED_FW 56 #define STACK_TMP_OFFS 0 57 #else 58 #define STACK_TMP_OFFS SM_STACK_TMP_RESERVE_SIZE 59 #endif 60 61 62 #ifdef ARM32 63 #ifdef CFG_CORE_SANITIZE_KADDRESS 64 #define STACK_TMP_SIZE (3072 + STACK_TMP_OFFS) 65 #else 66 #define STACK_TMP_SIZE (1024 + STACK_TMP_OFFS) 67 #endif 68 #define STACK_THREAD_SIZE 8192 69 70 #if TRACE_LEVEL > 0 71 #ifdef CFG_CORE_SANITIZE_KADDRESS 72 #define STACK_ABT_SIZE 3072 73 #else 74 #define STACK_ABT_SIZE 2048 75 #endif 76 #else 77 #define STACK_ABT_SIZE 1024 78 #endif 79 80 #endif /*ARM32*/ 81 82 #ifdef ARM64 83 #define STACK_TMP_SIZE (2048 + STACK_TMP_OFFS) 84 #define STACK_THREAD_SIZE 8192 85 86 #if TRACE_LEVEL > 0 87 #define STACK_ABT_SIZE 3072 88 #else 89 #define STACK_ABT_SIZE 1024 90 #endif 91 #endif /*ARM64*/ 92 93 struct thread_ctx threads[CFG_NUM_THREADS]; 94 95 static struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE]; 96 97 #ifdef CFG_WITH_STACK_CANARIES 98 #ifdef ARM32 99 #define STACK_CANARY_SIZE (4 * sizeof(uint32_t)) 100 #endif 101 #ifdef ARM64 102 #define STACK_CANARY_SIZE (8 * sizeof(uint32_t)) 103 #endif 104 #define START_CANARY_VALUE 0xdededede 105 #define END_CANARY_VALUE 0xabababab 106 #define GET_START_CANARY(name, stack_num) name[stack_num][0] 107 #define GET_END_CANARY(name, stack_num) \ 108 name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] 109 #else 110 #define STACK_CANARY_SIZE 0 111 #endif 112 113 #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \ 114 linkage uint32_t name[num_stacks] \ 115 [ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \ 116 sizeof(uint32_t)] \ 117 __attribute__((section(".nozi_stack"), \ 118 aligned(STACK_ALIGNMENT))) 119 120 #define STACK_SIZE(stack) (sizeof(stack) - STACK_CANARY_SIZE / 2) 121 122 #define GET_STACK(stack) \ 123 ((vaddr_t)(stack) + STACK_SIZE(stack)) 124 125 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE, /* global */); 126 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE, static); 127 #ifndef CFG_WITH_PAGER 128 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE, static); 129 #endif 130 131 const uint32_t stack_tmp_stride = sizeof(stack_tmp[0]); 132 const uint32_t stack_tmp_offset = STACK_TMP_OFFS + STACK_CANARY_SIZE / 2; 133 134 KEEP_PAGER(stack_tmp); 135 KEEP_PAGER(stack_tmp_stride); 136 137 thread_smc_handler_t thread_std_smc_handler_ptr; 138 static thread_smc_handler_t thread_fast_smc_handler_ptr; 139 thread_fiq_handler_t thread_fiq_handler_ptr; 140 thread_pm_handler_t thread_cpu_on_handler_ptr; 141 thread_pm_handler_t thread_cpu_off_handler_ptr; 142 thread_pm_handler_t thread_cpu_suspend_handler_ptr; 143 thread_pm_handler_t thread_cpu_resume_handler_ptr; 144 thread_pm_handler_t thread_system_off_handler_ptr; 145 thread_pm_handler_t thread_system_reset_handler_ptr; 146 147 148 static unsigned int thread_global_lock = SPINLOCK_UNLOCK; 149 static bool thread_prealloc_rpc_cache; 150 151 static void init_canaries(void) 152 { 153 #ifdef CFG_WITH_STACK_CANARIES 154 size_t n; 155 #define INIT_CANARY(name) \ 156 for (n = 0; n < ARRAY_SIZE(name); n++) { \ 157 uint32_t *start_canary = &GET_START_CANARY(name, n); \ 158 uint32_t *end_canary = &GET_END_CANARY(name, n); \ 159 \ 160 *start_canary = START_CANARY_VALUE; \ 161 *end_canary = END_CANARY_VALUE; \ 162 DMSG("#Stack canaries for %s[%zu] with top at %p\n", \ 163 #name, n, (void *)(end_canary - 1)); \ 164 DMSG("watch *%p\n", (void *)end_canary); \ 165 } 166 167 INIT_CANARY(stack_tmp); 168 INIT_CANARY(stack_abt); 169 #ifndef CFG_WITH_PAGER 170 INIT_CANARY(stack_thread); 171 #endif 172 #endif/*CFG_WITH_STACK_CANARIES*/ 173 } 174 175 #define CANARY_DIED(stack, loc, n) \ 176 do { \ 177 EMSG_RAW("Dead canary at %s of '%s[%zu]'", #loc, #stack, n); \ 178 panic(); \ 179 } while (0) 180 181 void thread_check_canaries(void) 182 { 183 #ifdef CFG_WITH_STACK_CANARIES 184 size_t n; 185 186 for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) { 187 if (GET_START_CANARY(stack_tmp, n) != START_CANARY_VALUE) 188 CANARY_DIED(stack_tmp, start, n); 189 if (GET_END_CANARY(stack_tmp, n) != END_CANARY_VALUE) 190 CANARY_DIED(stack_tmp, end, n); 191 } 192 193 for (n = 0; n < ARRAY_SIZE(stack_abt); n++) { 194 if (GET_START_CANARY(stack_abt, n) != START_CANARY_VALUE) 195 CANARY_DIED(stack_abt, start, n); 196 if (GET_END_CANARY(stack_abt, n) != END_CANARY_VALUE) 197 CANARY_DIED(stack_abt, end, n); 198 199 } 200 #ifndef CFG_WITH_PAGER 201 for (n = 0; n < ARRAY_SIZE(stack_thread); n++) { 202 if (GET_START_CANARY(stack_thread, n) != START_CANARY_VALUE) 203 CANARY_DIED(stack_thread, start, n); 204 if (GET_END_CANARY(stack_thread, n) != END_CANARY_VALUE) 205 CANARY_DIED(stack_thread, end, n); 206 } 207 #endif 208 #endif/*CFG_WITH_STACK_CANARIES*/ 209 } 210 211 static void lock_global(void) 212 { 213 cpu_spin_lock(&thread_global_lock); 214 } 215 216 static void unlock_global(void) 217 { 218 cpu_spin_unlock(&thread_global_lock); 219 } 220 221 #ifdef ARM32 222 uint32_t thread_get_exceptions(void) 223 { 224 uint32_t cpsr = read_cpsr(); 225 226 return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL; 227 } 228 229 void thread_set_exceptions(uint32_t exceptions) 230 { 231 uint32_t cpsr = read_cpsr(); 232 233 cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT); 234 cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT); 235 write_cpsr(cpsr); 236 } 237 #endif /*ARM32*/ 238 239 #ifdef ARM64 240 uint32_t thread_get_exceptions(void) 241 { 242 uint32_t daif = read_daif(); 243 244 return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL; 245 } 246 247 void thread_set_exceptions(uint32_t exceptions) 248 { 249 uint32_t daif = read_daif(); 250 251 daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT); 252 daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT); 253 write_daif(daif); 254 } 255 #endif /*ARM64*/ 256 257 uint32_t thread_mask_exceptions(uint32_t exceptions) 258 { 259 uint32_t state = thread_get_exceptions(); 260 261 thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL)); 262 return state; 263 } 264 265 void thread_unmask_exceptions(uint32_t state) 266 { 267 thread_set_exceptions(state & THREAD_EXCP_ALL); 268 } 269 270 271 struct thread_core_local *thread_get_core_local(void) 272 { 273 uint32_t cpu_id = get_core_pos(); 274 275 /* 276 * IRQs must be disabled before playing with core_local since 277 * we otherwise may be rescheduled to a different core in the 278 * middle of this function. 279 */ 280 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 281 282 assert(cpu_id < CFG_TEE_CORE_NB_CORE); 283 return &thread_core_local[cpu_id]; 284 } 285 286 static void thread_lazy_save_ns_vfp(void) 287 { 288 #ifdef CFG_WITH_VFP 289 struct thread_ctx *thr = threads + thread_get_id(); 290 291 thr->vfp_state.ns_saved = false; 292 #if defined(ARM64) && defined(CFG_WITH_ARM_TRUSTED_FW) 293 /* 294 * ARM TF saves and restores CPACR_EL1, so we must assume NS world 295 * uses VFP and always preserve the register file when secure world 296 * is about to use it 297 */ 298 thr->vfp_state.ns.force_save = true; 299 #endif 300 vfp_lazy_save_state_init(&thr->vfp_state.ns); 301 #endif /*CFG_WITH_VFP*/ 302 } 303 304 static void thread_lazy_restore_ns_vfp(void) 305 { 306 #ifdef CFG_WITH_VFP 307 struct thread_ctx *thr = threads + thread_get_id(); 308 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 309 310 assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved); 311 312 if (tuv && tuv->lazy_saved && !tuv->saved) { 313 vfp_lazy_save_state_final(&tuv->vfp); 314 tuv->saved = true; 315 } 316 317 vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved); 318 thr->vfp_state.ns_saved = false; 319 #endif /*CFG_WITH_VFP*/ 320 } 321 322 #ifdef ARM32 323 static void init_regs(struct thread_ctx *thread, 324 struct thread_smc_args *args) 325 { 326 thread->regs.pc = (uint32_t)thread_std_smc_entry; 327 328 /* 329 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous 330 * abort and unmasked FIQ. 331 */ 332 thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E; 333 thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_I | CPSR_A; 334 /* Enable thumb mode if it's a thumb instruction */ 335 if (thread->regs.pc & 1) 336 thread->regs.cpsr |= CPSR_T; 337 /* Reinitialize stack pointer */ 338 thread->regs.svc_sp = thread->stack_va_end; 339 340 /* 341 * Copy arguments into context. This will make the 342 * arguments appear in r0-r7 when thread is started. 343 */ 344 thread->regs.r0 = args->a0; 345 thread->regs.r1 = args->a1; 346 thread->regs.r2 = args->a2; 347 thread->regs.r3 = args->a3; 348 thread->regs.r4 = args->a4; 349 thread->regs.r5 = args->a5; 350 thread->regs.r6 = args->a6; 351 thread->regs.r7 = args->a7; 352 } 353 #endif /*ARM32*/ 354 355 #ifdef ARM64 356 static void init_regs(struct thread_ctx *thread, 357 struct thread_smc_args *args) 358 { 359 thread->regs.pc = (uint64_t)thread_std_smc_entry; 360 361 /* 362 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous 363 * abort and unmasked FIQ. 364 */ 365 thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 366 DAIFBIT_IRQ | DAIFBIT_ABT); 367 /* Reinitialize stack pointer */ 368 thread->regs.sp = thread->stack_va_end; 369 370 /* 371 * Copy arguments into context. This will make the 372 * arguments appear in x0-x7 when thread is started. 373 */ 374 thread->regs.x[0] = args->a0; 375 thread->regs.x[1] = args->a1; 376 thread->regs.x[2] = args->a2; 377 thread->regs.x[3] = args->a3; 378 thread->regs.x[4] = args->a4; 379 thread->regs.x[5] = args->a5; 380 thread->regs.x[6] = args->a6; 381 thread->regs.x[7] = args->a7; 382 383 /* Set up frame pointer as per the Aarch64 AAPCS */ 384 thread->regs.x[29] = 0; 385 } 386 #endif /*ARM64*/ 387 388 void thread_init_boot_thread(void) 389 { 390 struct thread_core_local *l = thread_get_core_local(); 391 size_t n; 392 393 for (n = 0; n < CFG_NUM_THREADS; n++) { 394 TAILQ_INIT(&threads[n].mutexes); 395 TAILQ_INIT(&threads[n].tsd.sess_stack); 396 #ifdef CFG_SMALL_PAGE_USER_TA 397 SLIST_INIT(&threads[n].tsd.pgt_cache); 398 #endif 399 } 400 401 for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) 402 thread_core_local[n].curr_thread = -1; 403 404 l->curr_thread = 0; 405 threads[0].state = THREAD_STATE_ACTIVE; 406 } 407 408 void thread_clr_boot_thread(void) 409 { 410 struct thread_core_local *l = thread_get_core_local(); 411 412 assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS); 413 assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE); 414 assert(TAILQ_EMPTY(&threads[l->curr_thread].mutexes)); 415 threads[l->curr_thread].state = THREAD_STATE_FREE; 416 l->curr_thread = -1; 417 } 418 419 static void thread_alloc_and_run(struct thread_smc_args *args) 420 { 421 size_t n; 422 struct thread_core_local *l = thread_get_core_local(); 423 bool found_thread = false; 424 425 assert(l->curr_thread == -1); 426 427 lock_global(); 428 429 for (n = 0; n < CFG_NUM_THREADS; n++) { 430 if (threads[n].state == THREAD_STATE_FREE) { 431 threads[n].state = THREAD_STATE_ACTIVE; 432 found_thread = true; 433 break; 434 } 435 } 436 437 unlock_global(); 438 439 if (!found_thread) { 440 args->a0 = OPTEE_SMC_RETURN_ETHREAD_LIMIT; 441 return; 442 } 443 444 l->curr_thread = n; 445 446 threads[n].flags = 0; 447 init_regs(threads + n, args); 448 449 /* Save Hypervisor Client ID */ 450 threads[n].hyp_clnt_id = args->a7; 451 452 thread_lazy_save_ns_vfp(); 453 thread_resume(&threads[n].regs); 454 } 455 456 #ifdef ARM32 457 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 458 struct thread_smc_args *args) 459 { 460 /* 461 * Update returned values from RPC, values will appear in 462 * r0-r3 when thread is resumed. 463 */ 464 regs->r0 = args->a0; 465 regs->r1 = args->a1; 466 regs->r2 = args->a2; 467 regs->r3 = args->a3; 468 regs->r4 = args->a4; 469 regs->r5 = args->a5; 470 } 471 #endif /*ARM32*/ 472 473 #ifdef ARM64 474 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 475 struct thread_smc_args *args) 476 { 477 /* 478 * Update returned values from RPC, values will appear in 479 * x0-x3 when thread is resumed. 480 */ 481 regs->x[0] = args->a0; 482 regs->x[1] = args->a1; 483 regs->x[2] = args->a2; 484 regs->x[3] = args->a3; 485 regs->x[4] = args->a4; 486 regs->x[5] = args->a5; 487 } 488 #endif /*ARM64*/ 489 490 static void thread_resume_from_rpc(struct thread_smc_args *args) 491 { 492 size_t n = args->a3; /* thread id */ 493 struct thread_core_local *l = thread_get_core_local(); 494 uint32_t rv = 0; 495 496 assert(l->curr_thread == -1); 497 498 lock_global(); 499 500 if (n < CFG_NUM_THREADS && 501 threads[n].state == THREAD_STATE_SUSPENDED && 502 args->a7 == threads[n].hyp_clnt_id) 503 threads[n].state = THREAD_STATE_ACTIVE; 504 else 505 rv = OPTEE_SMC_RETURN_ERESUME; 506 507 unlock_global(); 508 509 if (rv) { 510 args->a0 = rv; 511 return; 512 } 513 514 l->curr_thread = n; 515 516 if (threads[n].have_user_map) 517 core_mmu_set_user_map(&threads[n].user_map); 518 519 /* 520 * Return from RPC to request service of an IRQ must not 521 * get parameters from non-secure world. 522 */ 523 if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) { 524 copy_a0_to_a5(&threads[n].regs, args); 525 threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN; 526 } 527 528 thread_lazy_save_ns_vfp(); 529 thread_resume(&threads[n].regs); 530 } 531 532 void thread_handle_fast_smc(struct thread_smc_args *args) 533 { 534 thread_check_canaries(); 535 thread_fast_smc_handler_ptr(args); 536 /* Fast handlers must not unmask any exceptions */ 537 assert(thread_get_exceptions() == THREAD_EXCP_ALL); 538 } 539 540 void thread_handle_std_smc(struct thread_smc_args *args) 541 { 542 thread_check_canaries(); 543 544 if (args->a0 == OPTEE_SMC_CALL_RETURN_FROM_RPC) 545 thread_resume_from_rpc(args); 546 else 547 thread_alloc_and_run(args); 548 } 549 550 /* Helper routine for the assembly function thread_std_smc_entry() */ 551 void __thread_std_smc_entry(struct thread_smc_args *args) 552 { 553 struct thread_ctx *thr = threads + thread_get_id(); 554 555 if (!thr->rpc_arg) { 556 paddr_t parg; 557 uint64_t carg; 558 void *arg; 559 560 thread_rpc_alloc_arg( 561 OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS), 562 &parg, &carg); 563 if (!parg || !ALIGNMENT_IS_OK(parg, struct optee_msg_arg) || 564 !(arg = phys_to_virt(parg, CORE_MEM_NSEC_SHM))) { 565 thread_rpc_free_arg(carg); 566 args->a0 = OPTEE_SMC_RETURN_ENOMEM; 567 return; 568 } 569 570 thr->rpc_arg = arg; 571 thr->rpc_carg = carg; 572 } 573 574 thread_std_smc_handler_ptr(args); 575 576 tee_fs_rpc_cache_clear(&thr->tsd); 577 if (!thread_prealloc_rpc_cache) { 578 thread_rpc_free_arg(thr->rpc_carg); 579 thr->rpc_carg = 0; 580 thr->rpc_arg = 0; 581 } 582 } 583 584 void *thread_get_tmp_sp(void) 585 { 586 struct thread_core_local *l = thread_get_core_local(); 587 588 return (void *)l->tmp_stack_va_end; 589 } 590 591 #ifdef ARM64 592 vaddr_t thread_get_saved_thread_sp(void) 593 { 594 struct thread_core_local *l = thread_get_core_local(); 595 int ct = l->curr_thread; 596 597 assert(ct != -1); 598 return threads[ct].kern_sp; 599 } 600 #endif /*ARM64*/ 601 602 bool thread_addr_is_in_stack(vaddr_t va) 603 { 604 struct thread_ctx *thr; 605 int ct = thread_get_id_may_fail(); 606 607 if (ct == -1) 608 return false; 609 610 thr = threads + ct; 611 return va < thr->stack_va_end && 612 va >= (thr->stack_va_end - STACK_THREAD_SIZE); 613 } 614 615 void thread_state_free(void) 616 { 617 struct thread_core_local *l = thread_get_core_local(); 618 int ct = l->curr_thread; 619 620 assert(ct != -1); 621 assert(TAILQ_EMPTY(&threads[ct].mutexes)); 622 623 thread_lazy_restore_ns_vfp(); 624 tee_pager_release_phys( 625 (void *)(threads[ct].stack_va_end - STACK_THREAD_SIZE), 626 STACK_THREAD_SIZE); 627 628 lock_global(); 629 630 assert(threads[ct].state == THREAD_STATE_ACTIVE); 631 threads[ct].state = THREAD_STATE_FREE; 632 threads[ct].flags = 0; 633 l->curr_thread = -1; 634 635 unlock_global(); 636 } 637 638 #ifdef ARM32 639 static bool is_from_user(uint32_t cpsr) 640 { 641 return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR; 642 } 643 #endif 644 645 #ifdef ARM64 646 static bool is_from_user(uint32_t cpsr) 647 { 648 if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT)) 649 return true; 650 if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) == 651 SPSR_64_MODE_EL0) 652 return true; 653 return false; 654 } 655 #endif 656 657 #ifdef CFG_WITH_PAGER 658 static void release_unused_kernel_stack(struct thread_ctx *thr) 659 { 660 vaddr_t sp = thr->regs.svc_sp; 661 vaddr_t base = thr->stack_va_end - STACK_THREAD_SIZE; 662 size_t len = sp - base; 663 664 tee_pager_release_phys((void *)base, len); 665 } 666 #else 667 static void release_unused_kernel_stack(struct thread_ctx *thr __unused) 668 { 669 } 670 #endif 671 672 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc) 673 { 674 struct thread_core_local *l = thread_get_core_local(); 675 int ct = l->curr_thread; 676 677 assert(ct != -1); 678 679 thread_check_canaries(); 680 681 release_unused_kernel_stack(threads + ct); 682 683 if (is_from_user(cpsr)) 684 thread_user_save_vfp(); 685 thread_lazy_restore_ns_vfp(); 686 687 lock_global(); 688 689 assert(threads[ct].state == THREAD_STATE_ACTIVE); 690 threads[ct].flags |= flags; 691 threads[ct].regs.cpsr = cpsr; 692 threads[ct].regs.pc = pc; 693 threads[ct].state = THREAD_STATE_SUSPENDED; 694 695 threads[ct].have_user_map = core_mmu_user_mapping_is_active(); 696 if (threads[ct].have_user_map) { 697 core_mmu_get_user_map(&threads[ct].user_map); 698 core_mmu_set_user_map(NULL); 699 } 700 701 l->curr_thread = -1; 702 703 unlock_global(); 704 705 return ct; 706 } 707 708 #ifdef ARM32 709 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 710 { 711 l->tmp_stack_va_end = sp; 712 thread_set_irq_sp(sp); 713 thread_set_fiq_sp(sp); 714 } 715 716 static void set_abt_stack(struct thread_core_local *l __unused, vaddr_t sp) 717 { 718 thread_set_abt_sp(sp); 719 } 720 #endif /*ARM32*/ 721 722 #ifdef ARM64 723 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 724 { 725 /* 726 * We're already using the tmp stack when this function is called 727 * so there's no need to assign it to any stack pointer. However, 728 * we'll need to restore it at different times so store it here. 729 */ 730 l->tmp_stack_va_end = sp; 731 } 732 733 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 734 { 735 l->abt_stack_va_end = sp; 736 } 737 #endif /*ARM64*/ 738 739 bool thread_init_stack(uint32_t thread_id, vaddr_t sp) 740 { 741 if (thread_id >= CFG_NUM_THREADS) 742 return false; 743 threads[thread_id].stack_va_end = sp; 744 return true; 745 } 746 747 int thread_get_id_may_fail(void) 748 { 749 /* thread_get_core_local() requires IRQs to be disabled */ 750 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 751 struct thread_core_local *l = thread_get_core_local(); 752 int ct = l->curr_thread; 753 754 thread_unmask_exceptions(exceptions); 755 return ct; 756 } 757 758 int thread_get_id(void) 759 { 760 int ct = thread_get_id_may_fail(); 761 762 assert(ct >= 0 && ct < CFG_NUM_THREADS); 763 return ct; 764 } 765 766 static void init_handlers(const struct thread_handlers *handlers) 767 { 768 thread_std_smc_handler_ptr = handlers->std_smc; 769 thread_fast_smc_handler_ptr = handlers->fast_smc; 770 thread_fiq_handler_ptr = handlers->fiq; 771 thread_cpu_on_handler_ptr = handlers->cpu_on; 772 thread_cpu_off_handler_ptr = handlers->cpu_off; 773 thread_cpu_suspend_handler_ptr = handlers->cpu_suspend; 774 thread_cpu_resume_handler_ptr = handlers->cpu_resume; 775 thread_system_off_handler_ptr = handlers->system_off; 776 thread_system_reset_handler_ptr = handlers->system_reset; 777 } 778 779 #ifdef CFG_WITH_PAGER 780 static void init_thread_stacks(void) 781 { 782 size_t n; 783 784 /* 785 * Allocate virtual memory for thread stacks. 786 */ 787 for (n = 0; n < CFG_NUM_THREADS; n++) { 788 tee_mm_entry_t *mm; 789 vaddr_t sp; 790 791 /* Find vmem for thread stack and its protection gap */ 792 mm = tee_mm_alloc(&tee_mm_vcore, 793 SMALL_PAGE_SIZE + STACK_THREAD_SIZE); 794 assert(mm); 795 796 /* Claim eventual physical page */ 797 tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm), 798 true); 799 800 /* Add the area to the pager */ 801 tee_pager_add_core_area(tee_mm_get_smem(mm) + SMALL_PAGE_SIZE, 802 tee_mm_get_bytes(mm) - SMALL_PAGE_SIZE, 803 TEE_MATTR_PRW | TEE_MATTR_LOCKED, 804 NULL, NULL); 805 806 /* init effective stack */ 807 sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm); 808 if (!thread_init_stack(n, sp)) 809 panic("init stack failed"); 810 } 811 } 812 #else 813 static void init_thread_stacks(void) 814 { 815 size_t n; 816 817 /* Assign the thread stacks */ 818 for (n = 0; n < CFG_NUM_THREADS; n++) { 819 if (!thread_init_stack(n, GET_STACK(stack_thread[n]))) 820 panic("thread_init_stack failed"); 821 } 822 } 823 #endif /*CFG_WITH_PAGER*/ 824 825 void thread_init_primary(const struct thread_handlers *handlers) 826 { 827 init_handlers(handlers); 828 829 /* Initialize canaries around the stacks */ 830 init_canaries(); 831 832 init_thread_stacks(); 833 pgt_init(); 834 } 835 836 static void init_sec_mon(size_t pos __maybe_unused) 837 { 838 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 839 /* Initialize secure monitor */ 840 sm_init(GET_STACK(stack_tmp[pos])); 841 #endif 842 } 843 844 void thread_init_per_cpu(void) 845 { 846 size_t pos = get_core_pos(); 847 struct thread_core_local *l = thread_get_core_local(); 848 849 init_sec_mon(pos); 850 851 set_tmp_stack(l, GET_STACK(stack_tmp[pos]) - STACK_TMP_OFFS); 852 set_abt_stack(l, GET_STACK(stack_abt[pos])); 853 854 thread_init_vbar(); 855 } 856 857 struct thread_specific_data *thread_get_tsd(void) 858 { 859 return &threads[thread_get_id()].tsd; 860 } 861 862 struct thread_ctx_regs *thread_get_ctx_regs(void) 863 { 864 struct thread_core_local *l = thread_get_core_local(); 865 866 assert(l->curr_thread != -1); 867 return &threads[l->curr_thread].regs; 868 } 869 870 void thread_set_irq(bool enable) 871 { 872 /* thread_get_core_local() requires IRQs to be disabled */ 873 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 874 struct thread_core_local *l; 875 876 l = thread_get_core_local(); 877 878 assert(l->curr_thread != -1); 879 880 if (enable) { 881 threads[l->curr_thread].flags |= THREAD_FLAGS_IRQ_ENABLE; 882 thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ); 883 } else { 884 /* 885 * No need to disable IRQ here since it's already disabled 886 * above. 887 */ 888 threads[l->curr_thread].flags &= ~THREAD_FLAGS_IRQ_ENABLE; 889 } 890 } 891 892 void thread_restore_irq(void) 893 { 894 /* thread_get_core_local() requires IRQs to be disabled */ 895 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 896 struct thread_core_local *l; 897 898 l = thread_get_core_local(); 899 900 assert(l->curr_thread != -1); 901 902 if (threads[l->curr_thread].flags & THREAD_FLAGS_IRQ_ENABLE) 903 thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ); 904 } 905 906 #ifdef CFG_WITH_VFP 907 uint32_t thread_kernel_enable_vfp(void) 908 { 909 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 910 struct thread_ctx *thr = threads + thread_get_id(); 911 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 912 913 assert(!vfp_is_enabled()); 914 915 if (!thr->vfp_state.ns_saved) { 916 vfp_lazy_save_state_final(&thr->vfp_state.ns); 917 thr->vfp_state.ns_saved = true; 918 } else if (thr->vfp_state.sec_lazy_saved && 919 !thr->vfp_state.sec_saved) { 920 /* 921 * This happens when we're handling an abort while the 922 * thread was using the VFP state. 923 */ 924 vfp_lazy_save_state_final(&thr->vfp_state.sec); 925 thr->vfp_state.sec_saved = true; 926 } else if (tuv && tuv->lazy_saved && !tuv->saved) { 927 /* 928 * This can happen either during syscall or abort 929 * processing (while processing a syscall). 930 */ 931 vfp_lazy_save_state_final(&tuv->vfp); 932 tuv->saved = true; 933 } 934 935 vfp_enable(); 936 return exceptions; 937 } 938 939 void thread_kernel_disable_vfp(uint32_t state) 940 { 941 uint32_t exceptions; 942 943 assert(vfp_is_enabled()); 944 945 vfp_disable(); 946 exceptions = thread_get_exceptions(); 947 assert(exceptions & THREAD_EXCP_IRQ); 948 exceptions &= ~THREAD_EXCP_IRQ; 949 exceptions |= state & THREAD_EXCP_IRQ; 950 thread_set_exceptions(exceptions); 951 } 952 953 void thread_kernel_save_vfp(void) 954 { 955 struct thread_ctx *thr = threads + thread_get_id(); 956 957 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 958 if (vfp_is_enabled()) { 959 vfp_lazy_save_state_init(&thr->vfp_state.sec); 960 thr->vfp_state.sec_lazy_saved = true; 961 } 962 } 963 964 void thread_kernel_restore_vfp(void) 965 { 966 struct thread_ctx *thr = threads + thread_get_id(); 967 968 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 969 assert(!vfp_is_enabled()); 970 if (thr->vfp_state.sec_lazy_saved) { 971 vfp_lazy_restore_state(&thr->vfp_state.sec, 972 thr->vfp_state.sec_saved); 973 thr->vfp_state.sec_saved = false; 974 thr->vfp_state.sec_lazy_saved = false; 975 } 976 } 977 978 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp) 979 { 980 struct thread_ctx *thr = threads + thread_get_id(); 981 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 982 983 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 984 assert(!vfp_is_enabled()); 985 986 if (!thr->vfp_state.ns_saved) { 987 vfp_lazy_save_state_final(&thr->vfp_state.ns); 988 thr->vfp_state.ns_saved = true; 989 } else if (tuv && uvfp != tuv) { 990 if (tuv->lazy_saved && !tuv->saved) { 991 vfp_lazy_save_state_final(&tuv->vfp); 992 tuv->saved = true; 993 } 994 } 995 996 if (uvfp->lazy_saved) 997 vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved); 998 uvfp->lazy_saved = false; 999 uvfp->saved = false; 1000 1001 thr->vfp_state.uvfp = uvfp; 1002 vfp_enable(); 1003 } 1004 1005 void thread_user_save_vfp(void) 1006 { 1007 struct thread_ctx *thr = threads + thread_get_id(); 1008 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1009 1010 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 1011 if (!vfp_is_enabled()) 1012 return; 1013 1014 assert(tuv && !tuv->lazy_saved && !tuv->saved); 1015 vfp_lazy_save_state_init(&tuv->vfp); 1016 tuv->lazy_saved = true; 1017 } 1018 1019 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp) 1020 { 1021 struct thread_ctx *thr = threads + thread_get_id(); 1022 1023 if (uvfp == thr->vfp_state.uvfp) 1024 thr->vfp_state.uvfp = NULL; 1025 uvfp->lazy_saved = false; 1026 uvfp->saved = false; 1027 } 1028 #endif /*CFG_WITH_VFP*/ 1029 1030 #ifdef ARM32 1031 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1032 { 1033 uint32_t s; 1034 1035 if (!is_32bit) 1036 return false; 1037 1038 s = read_spsr(); 1039 s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2); 1040 s |= CPSR_MODE_USR; 1041 if (entry_func & 1) 1042 s |= CPSR_T; 1043 *spsr = s; 1044 return true; 1045 } 1046 #endif 1047 1048 #ifdef ARM64 1049 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1050 { 1051 uint32_t s; 1052 1053 if (is_32bit) { 1054 s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT); 1055 s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT; 1056 s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT; 1057 } else { 1058 s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT); 1059 } 1060 1061 *spsr = s; 1062 return true; 1063 } 1064 #endif 1065 1066 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1, 1067 unsigned long a2, unsigned long a3, unsigned long user_sp, 1068 unsigned long entry_func, bool is_32bit, 1069 uint32_t *exit_status0, uint32_t *exit_status1) 1070 { 1071 uint32_t spsr; 1072 1073 if (!get_spsr(is_32bit, entry_func, &spsr)) { 1074 *exit_status0 = 1; /* panic */ 1075 *exit_status1 = 0xbadbadba; 1076 return 0; 1077 } 1078 return __thread_enter_user_mode(a0, a1, a2, a3, user_sp, entry_func, 1079 spsr, exit_status0, exit_status1); 1080 } 1081 1082 void thread_add_mutex(struct mutex *m) 1083 { 1084 struct thread_core_local *l = thread_get_core_local(); 1085 int ct = l->curr_thread; 1086 1087 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1088 assert(m->owner_id == -1); 1089 m->owner_id = ct; 1090 TAILQ_INSERT_TAIL(&threads[ct].mutexes, m, link); 1091 } 1092 1093 void thread_rem_mutex(struct mutex *m) 1094 { 1095 struct thread_core_local *l = thread_get_core_local(); 1096 int ct = l->curr_thread; 1097 1098 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1099 assert(m->owner_id == ct); 1100 m->owner_id = -1; 1101 TAILQ_REMOVE(&threads[ct].mutexes, m, link); 1102 } 1103 1104 bool thread_disable_prealloc_rpc_cache(uint64_t *cookie) 1105 { 1106 bool rv; 1107 size_t n; 1108 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 1109 1110 lock_global(); 1111 1112 for (n = 0; n < CFG_NUM_THREADS; n++) { 1113 if (threads[n].state != THREAD_STATE_FREE) { 1114 rv = false; 1115 goto out; 1116 } 1117 } 1118 1119 rv = true; 1120 for (n = 0; n < CFG_NUM_THREADS; n++) { 1121 if (threads[n].rpc_arg) { 1122 *cookie = threads[n].rpc_carg; 1123 threads[n].rpc_carg = 0; 1124 threads[n].rpc_arg = NULL; 1125 goto out; 1126 } 1127 } 1128 1129 *cookie = 0; 1130 thread_prealloc_rpc_cache = false; 1131 out: 1132 unlock_global(); 1133 thread_unmask_exceptions(exceptions); 1134 return rv; 1135 } 1136 1137 bool thread_enable_prealloc_rpc_cache(void) 1138 { 1139 bool rv; 1140 size_t n; 1141 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 1142 1143 lock_global(); 1144 1145 for (n = 0; n < CFG_NUM_THREADS; n++) { 1146 if (threads[n].state != THREAD_STATE_FREE) { 1147 rv = false; 1148 goto out; 1149 } 1150 } 1151 1152 rv = true; 1153 thread_prealloc_rpc_cache = true; 1154 out: 1155 unlock_global(); 1156 thread_unmask_exceptions(exceptions); 1157 return rv; 1158 } 1159 1160 static uint32_t rpc_cmd_nolock(uint32_t cmd, size_t num_params, 1161 struct optee_msg_param *params) 1162 { 1163 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1164 struct thread_ctx *thr = threads + thread_get_id(); 1165 struct optee_msg_arg *arg = thr->rpc_arg; 1166 uint64_t carg = thr->rpc_carg; 1167 const size_t params_size = sizeof(struct optee_msg_param) * num_params; 1168 size_t n; 1169 1170 assert(arg && carg && num_params <= THREAD_RPC_MAX_NUM_PARAMS); 1171 1172 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS)); 1173 arg->cmd = cmd; 1174 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1175 arg->num_params = num_params; 1176 memcpy(OPTEE_MSG_GET_PARAMS(arg), params, params_size); 1177 1178 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1179 thread_rpc(rpc_args); 1180 for (n = 0; n < num_params; n++) { 1181 switch (params[n].attr & OPTEE_MSG_ATTR_TYPE_MASK) { 1182 case OPTEE_MSG_ATTR_TYPE_VALUE_OUTPUT: 1183 case OPTEE_MSG_ATTR_TYPE_VALUE_INOUT: 1184 case OPTEE_MSG_ATTR_TYPE_RMEM_OUTPUT: 1185 case OPTEE_MSG_ATTR_TYPE_RMEM_INOUT: 1186 case OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT: 1187 case OPTEE_MSG_ATTR_TYPE_TMEM_INOUT: 1188 memcpy(params + n, OPTEE_MSG_GET_PARAMS(arg) + n, 1189 sizeof(struct optee_msg_param)); 1190 break; 1191 default: 1192 break; 1193 } 1194 } 1195 return arg->ret; 1196 } 1197 1198 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params, 1199 struct optee_msg_param *params) 1200 { 1201 uint32_t ret; 1202 1203 ret = rpc_cmd_nolock(cmd, num_params, params); 1204 1205 return ret; 1206 } 1207 1208 static bool check_alloced_shm(paddr_t pa, size_t len, size_t align) 1209 { 1210 if (pa & (align - 1)) 1211 return false; 1212 return core_pbuf_is(CORE_MEM_NSEC_SHM, pa, len); 1213 } 1214 1215 void thread_rpc_free_arg(uint64_t cookie) 1216 { 1217 if (cookie) { 1218 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1219 OPTEE_SMC_RETURN_RPC_FREE 1220 }; 1221 1222 reg_pair_from_64(cookie, rpc_args + 1, rpc_args + 2); 1223 thread_rpc(rpc_args); 1224 } 1225 } 1226 1227 void thread_rpc_alloc_arg(size_t size, paddr_t *arg, uint64_t *cookie) 1228 { 1229 paddr_t pa; 1230 uint64_t co; 1231 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1232 OPTEE_SMC_RETURN_RPC_ALLOC, size 1233 }; 1234 1235 thread_rpc(rpc_args); 1236 1237 pa = reg_pair_to_64(rpc_args[1], rpc_args[2]); 1238 co = reg_pair_to_64(rpc_args[4], rpc_args[5]); 1239 if (!check_alloced_shm(pa, size, sizeof(uint64_t))) { 1240 thread_rpc_free_arg(co); 1241 pa = 0; 1242 co = 0; 1243 } 1244 1245 *arg = pa; 1246 *cookie = co; 1247 } 1248 1249 /** 1250 * Free physical memory previously allocated with thread_rpc_alloc() 1251 * 1252 * @cookie: cookie received when allocating the buffer 1253 * @bt: must be the same as supplied when allocating 1254 */ 1255 static void thread_rpc_free(unsigned int bt, uint64_t cookie) 1256 { 1257 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1258 struct thread_ctx *thr = threads + thread_get_id(); 1259 struct optee_msg_arg *arg = thr->rpc_arg; 1260 uint64_t carg = thr->rpc_carg; 1261 struct optee_msg_param *params = OPTEE_MSG_GET_PARAMS(arg); 1262 1263 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(1)); 1264 arg->cmd = OPTEE_MSG_RPC_CMD_SHM_FREE; 1265 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1266 arg->num_params = 1; 1267 1268 params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1269 params[0].u.value.a = bt; 1270 params[0].u.value.b = cookie; 1271 params[0].u.value.c = 0; 1272 1273 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1274 thread_rpc(rpc_args); 1275 } 1276 1277 /** 1278 * Allocates shared memory buffer via RPC 1279 * 1280 * @size: size in bytes of shared memory buffer 1281 * @align: required alignment of buffer 1282 * @bt: buffer type OPTEE_MSG_RPC_SHM_TYPE_* 1283 * @payload: returned physical pointer to buffer, 0 if allocation 1284 * failed. 1285 * @cookie: returned cookie used when freeing the buffer 1286 */ 1287 static void thread_rpc_alloc(size_t size, size_t align, unsigned int bt, 1288 paddr_t *payload, uint64_t *cookie) 1289 { 1290 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1291 struct thread_ctx *thr = threads + thread_get_id(); 1292 struct optee_msg_arg *arg = thr->rpc_arg; 1293 uint64_t carg = thr->rpc_carg; 1294 struct optee_msg_param *params = OPTEE_MSG_GET_PARAMS(arg); 1295 1296 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(1)); 1297 arg->cmd = OPTEE_MSG_RPC_CMD_SHM_ALLOC; 1298 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1299 arg->num_params = 1; 1300 1301 params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1302 params[0].u.value.a = bt; 1303 params[0].u.value.b = size; 1304 params[0].u.value.c = align; 1305 1306 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1307 thread_rpc(rpc_args); 1308 if (arg->ret != TEE_SUCCESS) 1309 goto fail; 1310 1311 if (arg->num_params != 1) 1312 goto fail; 1313 1314 if (params[0].attr != OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT) 1315 goto fail; 1316 1317 if (!check_alloced_shm(params[0].u.tmem.buf_ptr, size, align)) { 1318 thread_rpc_free(bt, params[0].u.tmem.shm_ref); 1319 goto fail; 1320 } 1321 1322 *payload = params[0].u.tmem.buf_ptr; 1323 *cookie = params[0].u.tmem.shm_ref; 1324 return; 1325 fail: 1326 *payload = 0; 1327 *cookie = 0; 1328 } 1329 1330 void thread_rpc_alloc_payload(size_t size, paddr_t *payload, uint64_t *cookie) 1331 { 1332 thread_rpc_alloc(size, 8, OPTEE_MSG_RPC_SHM_TYPE_APPL, payload, cookie); 1333 } 1334 1335 void thread_rpc_free_payload(uint64_t cookie) 1336 { 1337 thread_rpc_free(OPTEE_MSG_RPC_SHM_TYPE_APPL, cookie); 1338 } 1339