| c6ac89bc | 18-Jul-2017 |
Peng Fan <peng.fan@nxp.com> |
drivers: add snvs srtc support
Introduce i.MX SNVS SRTC support. The SRTC works with 32.768KHz. The SRTC is in SNVS_LP domain. The SNVS_LP is a data storage subsystem with enhanced security capabili
drivers: add snvs srtc support
Introduce i.MX SNVS SRTC support. The SRTC works with 32.768KHz. The SRTC is in SNVS_LP domain. The SNVS_LP is a data storage subsystem with enhanced security capabilities. Its purpose is to store and protect system data, regardless of the main system power state. SNVS_LP is in the always-powered-up domain, which is a separate power domain with its own power supply. When the chip power supply domain loses power, SNVS_LP continues to operate normally.
Since OP-TEE does not care about calendar time, there is no need to update calendar time, we only need to read the counter and get out the time.
The plat_prng_add_jitter_entropy is reused from tee_time_arm_cntpct.c.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6d1a620a | 19-Jul-2017 |
Yongqin Liu <yongqin.liu@linaro.org> |
mk/gcc.mk: define LD to bfd version by default
In some cases, ld is linked to gold version, and it will cause compiling error for 32bit like following:
prebuilts/gcc/linux-x86/arm/arm-linux-android
mk/gcc.mk: define LD to bfd version by default
In some cases, ld is linked to gold version, and it will cause compiling error for 32bit like following:
prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9/bin/arm-linux-androideabi-ld: fatal error: --sort-section=alignment: must take one of the following arguments: none, name
with the bfd version ld, there will be no such error reported.
Signed-off-by: Yongqin Liu <yongqin.liu@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 0ca35294 | 19-Jul-2017 |
Victor Chong <victor.chong@linaro.org> |
arm.mk: export-ta_arm32: Set default value for CROSS_COMPILE
When building 32-bit optee_os, CROSS_COMPILE32 defaults to CROSS_COMPILE if not set, and CROSS_COMPILE defaults to arm-linux-gnueabihf- i
arm.mk: export-ta_arm32: Set default value for CROSS_COMPILE
When building 32-bit optee_os, CROSS_COMPILE32 defaults to CROSS_COMPILE if not set, and CROSS_COMPILE defaults to arm-linux-gnueabihf- if not set.
When building 32-bit optee_test, CROSS_COMPILE32 also defaults to CROSS_COMPILE if not set, but if CROSS_COMPILE is not set, there is no default value, causing the native compiler to be used and generating errors and confusion.
This patch makes the behavior and expectations consistent across both optee_os and optee_test.
Signed-off-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a8173b25 | 17-Jul-2017 |
Victor Chong <victor.chong@linaro.org> |
mk: aosp_optee.mk: Fix check for 2nd toolchain
Set CROSS_COMPILE32 and append to CROSS_COMPILE_LINE if $($(combo_2nd_arch_prefix)TARGET_TOOLS_PREFIX) is NOT empty.
Signed-off-by: Victor Chong <vict
mk: aosp_optee.mk: Fix check for 2nd toolchain
Set CROSS_COMPILE32 and append to CROSS_COMPILE_LINE if $($(combo_2nd_arch_prefix)TARGET_TOOLS_PREFIX) is NOT empty.
Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Yongqin Liu <yongqin.liu@linaro.org>
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| 3ff350a1 | 16-Jul-2017 |
Victor Chong <victor.chong@linaro.org> |
hikey: Set default value for CONSOLE_UART_BASE in conf.mk
Signed-off-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> |
| 66df8a2c | 12-Jul-2017 |
Victor Chong <victor.chong@linaro.org> |
hikey: add support for hikey960
The HiKey 960 development platform is based around the Huawei Kirin 960 octa-core ARM big.LITTLE processor with four ARM Cortex-A73 and four Cortex-A53 cores with 3GB
hikey: add support for hikey960
The HiKey 960 development platform is based around the Huawei Kirin 960 octa-core ARM big.LITTLE processor with four ARM Cortex-A73 and four Cortex-A53 cores with 3GB of LPDDR4 SDRAM memory, 32GB of UFS 2.0 flash storage, and the latest generation Mali G71 MP8 graphics processor.
See https://www.96boards.org/product/hikey960 for more details.
Signed-off-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 45a2d566 | 12-Jul-2017 |
Victor Chong <victor.chong@linaro.org> |
hikey: Flavorize hikey
Signed-off-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> |
| 77714cbd | 12-Jul-2017 |
Victor Chong <victor.chong@linaro.org> |
hikey: use defines for pl011 uart base addresses
Signed-off-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> |
| d824159f | 12-Jul-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm32: fix native_intr_handler()
Prior to this patch when a native interrupt was received in IRQ mode r12 wasn't saved on the stack. There's two problems with that: 1. r12 isn't a callee prese
core: arm32: fix native_intr_handler()
Prior to this patch when a native interrupt was received in IRQ mode r12 wasn't saved on the stack. There's two problems with that: 1. r12 isn't a callee preserved register, but must be preserved in an exception handler 2. Without r12 an odd number of registers was saved breaking the 8 byte alignment of the stack pointer
This patch fixes this by also saving r12 on the stack when handling a native interrupt in IRQ mode.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 23381c10 | 14-Jul-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: gcc 7 ready
Remove the armv7 compiler option -mno-apcs-float as it's not supported by gcc 7. -apcs-float has be default disabled since at least gcc 4.8.
Reviewed-by: Igor Opaniuk <igor.opaniu
core: gcc 7 ready
Remove the armv7 compiler option -mno-apcs-float as it's not supported by gcc 7. -apcs-float has be default disabled since at least gcc 4.8.
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 70f03150 | 14-Jul-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
libzlib: gcc7 ready
Updates compiler flags to make libzlib gcc7 ready.
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> |
| d31b0006 | 14-Jul-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
libpng: gcc7 ready
Updates compiler flags to make libpng gcc7 ready.
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> |
| 87d96185 | 14-Jul-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: avoid page faults with pager lock held
When a normal thread takes the pager lock there must be no page faults while the lock is held. This is has so far been ensured by feeding the func
core: pager: avoid page faults with pager lock held
When a normal thread takes the pager lock there must be no page faults while the lock is held. This is has so far been ensured by feeding the function to the KEEP_PAGER() macro, but this will only take care of the actual code not stack usage. This patch introduces a new pager lock function, pager_lock_check_stack() which will make sure that the estimated needed stack is mapped before the lock is acquired.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6289239c | 07-Jul-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: assert only normal thread takes a mutex
Adds thread_is_in_normal_mode() which returns true if the current thread is in normal mode. Adds an assert(thread_is_in_normal_mode()) in __mutex_lock()
core: assert only normal thread takes a mutex
Adds thread_is_in_normal_mode() which returns true if the current thread is in normal mode. Adds an assert(thread_is_in_normal_mode()) in __mutex_lock().
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4c6699fc | 17-Jul-2017 |
Peng Fan <peng.fan@nxp.com> |
core: arm: mutex: simplify code with xsave/xrestore spin lock
cpu_spin_lock_xsave/cpu_spin_unlock_xrestore could be used to simplify the code.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by
core: arm: mutex: simplify code with xsave/xrestore spin lock
cpu_spin_lock_xsave/cpu_spin_unlock_xrestore could be used to simplify the code.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| afd74d5d | 14-Jul-2017 |
Peng Fan <peng.fan@nxp.com> |
core: arm: imx: fix imx6solo boot
i.MX6SOLO is almost same with i.MX6DualLite, with difference that 6S has one cpu core, but DualLite has two cpu cores. i.MX6Solo also needs a9_plat_init.S and imx6.
core: arm: imx: fix imx6solo boot
i.MX6SOLO is almost same with i.MX6DualLite, with difference that 6S has one cpu core, but DualLite has two cpu cores. i.MX6Solo also needs a9_plat_init.S and imx6.c for basic initialization.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 78182cff | 12-Jul-2017 |
Victor Chong <victor.chong@linaro.org> |
hikey: use core_mmu_get_va() whenever possible
The ability to get the va of a pa is now available as a core function, i.e. core_mmu_get_va() so the platform specific nsec_periph_base() is not requir
hikey: use core_mmu_get_va() whenever possible
The ability to get the va of a pa is now available as a core function, i.e. core_mmu_get_va() so the platform specific nsec_periph_base() is not required anymore.
Signed-off-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d8bc799d | 10-Jul-2017 |
Zeng Tao <prime.zeng@hisilicon.com> |
core: fix the size of dynamic shared memory buffers
Prior to this patch MEM_AREA_SHM_VASPACE was initialized with RES_VASPACE_SIZE which is wrong. With this patch MEM_AREA_SHM_VASPACE is initialized
core: fix the size of dynamic shared memory buffers
Prior to this patch MEM_AREA_SHM_VASPACE was initialized with RES_VASPACE_SIZE which is wrong. With this patch MEM_AREA_SHM_VASPACE is initialized with SHM_VASPACE_SIZE instead.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Zeng Tao <prime.zeng@hisilicon.com>
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| d1125d55 | 10-Jul-2017 |
Zeng Tao <prime.zeng@hisilicon.com> |
core: remove the useless mem_map_inited
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Zeng Tao <prime.zeng@hisilicon.com> |
| 3078da83 | 07-Jul-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: more details in deadlock report
Adds more details to deadlock report inside pager.
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.
core: pager: more details in deadlock report
Adds more details to deadlock report inside pager.
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4288f144 | 07-Jul-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: attempt to detect deadlock on spin locks
Attempts to detect and report deadlock on spin locks..
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org> Signed-off-by: Jens Wiklander <jens.wikland
core: attempt to detect deadlock on spin locks
Attempts to detect and report deadlock on spin locks..
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 0b8e6e78 | 05-Jul-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: abort: fix get_fault_type()
Fixes get_fault_type() to accurately report abort in abort handler also in AArch64.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wik
core: abort: fix get_fault_type()
Fixes get_fault_type() to accurately report abort in abort handler also in AArch64.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU v8) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 76d95ca2 | 29-Jun-2017 |
Etienne Carriere <etienne.carriere@st.com> |
core: deprecate platform stm-orly2
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> |
| 5d8aaa04 | 28-Jun-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
Update CHANGELOG.md for 2.5.0
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> Juno AArch{32,64} Tested-by: Jens Wiklander <jens.wiklander@linaro.org> Juno AArch{32,64} pager Tested-by: Andrew
Update CHANGELOG.md for 2.5.0
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> Juno AArch{32,64} Tested-by: Jens Wiklander <jens.wiklander@linaro.org> Juno AArch{32,64} pager Tested-by: Andrew F. Davis <afd@ti.com> (ti-dra7xx, ti-am57xx, ti-am43xx) Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org> (RPi3) Tested-by: Joakim Bech <joakim.bech@linaro.org> (MTK8173) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (hikey 32/64, GP) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (hikey 32/64 pager, GP) Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2260, GP) Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (cannes2, GP) Tested-by: Sumit Garg <sumit.garg@nxp.com> (ls1021atwr-single-core) Tested-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> (RCAR H3) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (D02) Tested by: Victor Chong <victor.chong@linaro.org> (hikey aosp) Tested-by: Peng Fan <peng.fan@nxp.com> (imx-mx7dsabresd imx-mx6ulevk imx-mx6ullevk) Tested-by: Sören Brinkmann <soren.brinkmann@xilinx.com> (zynqmp) Tested-by: Joakim Bech <joakim.bech@linaro.org> (Juno, QEMUv7, QEMUv8, FVP, MTK8173)
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| e4c86a07 | 05-Jul-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix print_kernel_stack()
Previously was print_kernel_stack() supplying zeroes instead of real values for start and size of exidx tables needed for unwind. With this patch are correct values f
core: fix print_kernel_stack()
Previously was print_kernel_stack() supplying zeroes instead of real values for start and size of exidx tables needed for unwind. With this patch are correct values for exidx and exidx_sz supplied.
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2260) Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Fixes: 31a2964 ("core: dump call stack of user TAs on abort") Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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