1 /* 2 * Copyright (c) 2016, Linaro Limited 3 * Copyright (c) 2014, STMicroelectronics International N.V. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <platform_config.h> 30 31 #include <arm.h> 32 #include <assert.h> 33 #include <keep.h> 34 #include <kernel/misc.h> 35 #include <kernel/msg_param.h> 36 #include <kernel/panic.h> 37 #include <kernel/spinlock.h> 38 #include <kernel/tee_ta_manager.h> 39 #include <kernel/thread_defs.h> 40 #include <kernel/thread.h> 41 #include <mm/core_memprot.h> 42 #include <mm/mobj.h> 43 #include <mm/tee_mm.h> 44 #include <mm/tee_mmu.h> 45 #include <mm/tee_pager.h> 46 #include <optee_msg.h> 47 #include <sm/optee_smc.h> 48 #include <sm/sm.h> 49 #include <tee/tee_fs_rpc.h> 50 #include <tee/tee_cryp_utl.h> 51 #include <trace.h> 52 #include <util.h> 53 54 #include "thread_private.h" 55 56 #ifdef CFG_WITH_ARM_TRUSTED_FW 57 #define STACK_TMP_OFFS 0 58 #else 59 #define STACK_TMP_OFFS SM_STACK_TMP_RESERVE_SIZE 60 #endif 61 62 63 #ifdef ARM32 64 #ifdef CFG_CORE_SANITIZE_KADDRESS 65 #define STACK_TMP_SIZE (3072 + STACK_TMP_OFFS) 66 #else 67 #define STACK_TMP_SIZE (1536 + STACK_TMP_OFFS) 68 #endif 69 #define STACK_THREAD_SIZE 8192 70 71 #ifdef CFG_CORE_SANITIZE_KADDRESS 72 #define STACK_ABT_SIZE 3072 73 #else 74 #define STACK_ABT_SIZE 2048 75 #endif 76 77 #endif /*ARM32*/ 78 79 #ifdef ARM64 80 #define STACK_TMP_SIZE (2048 + STACK_TMP_OFFS) 81 #define STACK_THREAD_SIZE 8192 82 83 #if TRACE_LEVEL > 0 84 #define STACK_ABT_SIZE 3072 85 #else 86 #define STACK_ABT_SIZE 1024 87 #endif 88 #endif /*ARM64*/ 89 90 struct thread_ctx threads[CFG_NUM_THREADS]; 91 92 static struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE]; 93 94 #ifdef CFG_WITH_STACK_CANARIES 95 #ifdef ARM32 96 #define STACK_CANARY_SIZE (4 * sizeof(uint32_t)) 97 #endif 98 #ifdef ARM64 99 #define STACK_CANARY_SIZE (8 * sizeof(uint32_t)) 100 #endif 101 #define START_CANARY_VALUE 0xdededede 102 #define END_CANARY_VALUE 0xabababab 103 #define GET_START_CANARY(name, stack_num) name[stack_num][0] 104 #define GET_END_CANARY(name, stack_num) \ 105 name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] 106 #else 107 #define STACK_CANARY_SIZE 0 108 #endif 109 110 #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \ 111 linkage uint32_t name[num_stacks] \ 112 [ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \ 113 sizeof(uint32_t)] \ 114 __attribute__((section(".nozi_stack"), \ 115 aligned(STACK_ALIGNMENT))) 116 117 #define STACK_SIZE(stack) (sizeof(stack) - STACK_CANARY_SIZE / 2) 118 119 #define GET_STACK(stack) \ 120 ((vaddr_t)(stack) + STACK_SIZE(stack)) 121 122 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE, static); 123 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE, static); 124 #ifndef CFG_WITH_PAGER 125 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE, static); 126 #endif 127 128 const void *stack_tmp_export = (uint8_t *)stack_tmp + sizeof(stack_tmp[0]) - 129 (STACK_TMP_OFFS + STACK_CANARY_SIZE / 2); 130 const uint32_t stack_tmp_stride = sizeof(stack_tmp[0]); 131 132 /* 133 * These stack setup info are required by secondary boot cores before they 134 * each locally enable the pager (the mmu). Hence kept in pager sections. 135 */ 136 KEEP_PAGER(stack_tmp_export); 137 KEEP_PAGER(stack_tmp_stride); 138 139 thread_smc_handler_t thread_std_smc_handler_ptr; 140 static thread_smc_handler_t thread_fast_smc_handler_ptr; 141 thread_nintr_handler_t thread_nintr_handler_ptr; 142 thread_pm_handler_t thread_cpu_on_handler_ptr; 143 thread_pm_handler_t thread_cpu_off_handler_ptr; 144 thread_pm_handler_t thread_cpu_suspend_handler_ptr; 145 thread_pm_handler_t thread_cpu_resume_handler_ptr; 146 thread_pm_handler_t thread_system_off_handler_ptr; 147 thread_pm_handler_t thread_system_reset_handler_ptr; 148 149 150 static unsigned int thread_global_lock = SPINLOCK_UNLOCK; 151 static bool thread_prealloc_rpc_cache; 152 153 static void init_canaries(void) 154 { 155 #ifdef CFG_WITH_STACK_CANARIES 156 size_t n; 157 #define INIT_CANARY(name) \ 158 for (n = 0; n < ARRAY_SIZE(name); n++) { \ 159 uint32_t *start_canary = &GET_START_CANARY(name, n); \ 160 uint32_t *end_canary = &GET_END_CANARY(name, n); \ 161 \ 162 *start_canary = START_CANARY_VALUE; \ 163 *end_canary = END_CANARY_VALUE; \ 164 DMSG("#Stack canaries for %s[%zu] with top at %p\n", \ 165 #name, n, (void *)(end_canary - 1)); \ 166 DMSG("watch *%p\n", (void *)end_canary); \ 167 } 168 169 INIT_CANARY(stack_tmp); 170 INIT_CANARY(stack_abt); 171 #ifndef CFG_WITH_PAGER 172 INIT_CANARY(stack_thread); 173 #endif 174 #endif/*CFG_WITH_STACK_CANARIES*/ 175 } 176 177 #define CANARY_DIED(stack, loc, n) \ 178 do { \ 179 EMSG_RAW("Dead canary at %s of '%s[%zu]'", #loc, #stack, n); \ 180 panic(); \ 181 } while (0) 182 183 void thread_check_canaries(void) 184 { 185 #ifdef CFG_WITH_STACK_CANARIES 186 size_t n; 187 188 for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) { 189 if (GET_START_CANARY(stack_tmp, n) != START_CANARY_VALUE) 190 CANARY_DIED(stack_tmp, start, n); 191 if (GET_END_CANARY(stack_tmp, n) != END_CANARY_VALUE) 192 CANARY_DIED(stack_tmp, end, n); 193 } 194 195 for (n = 0; n < ARRAY_SIZE(stack_abt); n++) { 196 if (GET_START_CANARY(stack_abt, n) != START_CANARY_VALUE) 197 CANARY_DIED(stack_abt, start, n); 198 if (GET_END_CANARY(stack_abt, n) != END_CANARY_VALUE) 199 CANARY_DIED(stack_abt, end, n); 200 201 } 202 #ifndef CFG_WITH_PAGER 203 for (n = 0; n < ARRAY_SIZE(stack_thread); n++) { 204 if (GET_START_CANARY(stack_thread, n) != START_CANARY_VALUE) 205 CANARY_DIED(stack_thread, start, n); 206 if (GET_END_CANARY(stack_thread, n) != END_CANARY_VALUE) 207 CANARY_DIED(stack_thread, end, n); 208 } 209 #endif 210 #endif/*CFG_WITH_STACK_CANARIES*/ 211 } 212 213 static void lock_global(void) 214 { 215 cpu_spin_lock(&thread_global_lock); 216 } 217 218 static void unlock_global(void) 219 { 220 cpu_spin_unlock(&thread_global_lock); 221 } 222 223 #ifdef ARM32 224 uint32_t thread_get_exceptions(void) 225 { 226 uint32_t cpsr = read_cpsr(); 227 228 return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL; 229 } 230 231 void thread_set_exceptions(uint32_t exceptions) 232 { 233 uint32_t cpsr = read_cpsr(); 234 235 /* Foreign interrupts must not be unmasked while holding a spinlock */ 236 if (!(exceptions & THREAD_EXCP_FOREIGN_INTR)) 237 assert_have_no_spinlock(); 238 239 cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT); 240 cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT); 241 write_cpsr(cpsr); 242 } 243 #endif /*ARM32*/ 244 245 #ifdef ARM64 246 uint32_t thread_get_exceptions(void) 247 { 248 uint32_t daif = read_daif(); 249 250 return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL; 251 } 252 253 void thread_set_exceptions(uint32_t exceptions) 254 { 255 uint32_t daif = read_daif(); 256 257 /* Foreign interrupts must not be unmasked while holding a spinlock */ 258 if (!(exceptions & THREAD_EXCP_FOREIGN_INTR)) 259 assert_have_no_spinlock(); 260 261 daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT); 262 daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT); 263 write_daif(daif); 264 } 265 #endif /*ARM64*/ 266 267 uint32_t thread_mask_exceptions(uint32_t exceptions) 268 { 269 uint32_t state = thread_get_exceptions(); 270 271 thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL)); 272 return state; 273 } 274 275 void thread_unmask_exceptions(uint32_t state) 276 { 277 thread_set_exceptions(state & THREAD_EXCP_ALL); 278 } 279 280 281 struct thread_core_local *thread_get_core_local(void) 282 { 283 uint32_t cpu_id = get_core_pos(); 284 285 /* 286 * Foreign interrupts must be disabled before playing with core_local 287 * since we otherwise may be rescheduled to a different core in the 288 * middle of this function. 289 */ 290 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 291 292 assert(cpu_id < CFG_TEE_CORE_NB_CORE); 293 return &thread_core_local[cpu_id]; 294 } 295 296 static void thread_lazy_save_ns_vfp(void) 297 { 298 #ifdef CFG_WITH_VFP 299 struct thread_ctx *thr = threads + thread_get_id(); 300 301 thr->vfp_state.ns_saved = false; 302 #if defined(ARM64) && defined(CFG_WITH_ARM_TRUSTED_FW) 303 /* 304 * ARM TF saves and restores CPACR_EL1, so we must assume NS world 305 * uses VFP and always preserve the register file when secure world 306 * is about to use it 307 */ 308 thr->vfp_state.ns.force_save = true; 309 #endif 310 vfp_lazy_save_state_init(&thr->vfp_state.ns); 311 #endif /*CFG_WITH_VFP*/ 312 } 313 314 static void thread_lazy_restore_ns_vfp(void) 315 { 316 #ifdef CFG_WITH_VFP 317 struct thread_ctx *thr = threads + thread_get_id(); 318 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 319 320 assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved); 321 322 if (tuv && tuv->lazy_saved && !tuv->saved) { 323 vfp_lazy_save_state_final(&tuv->vfp); 324 tuv->saved = true; 325 } 326 327 vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved); 328 thr->vfp_state.ns_saved = false; 329 #endif /*CFG_WITH_VFP*/ 330 } 331 332 #ifdef ARM32 333 static void init_regs(struct thread_ctx *thread, 334 struct thread_smc_args *args) 335 { 336 thread->regs.pc = (uint32_t)thread_std_smc_entry; 337 338 /* 339 * Stdcalls starts in SVC mode with masked foreign interrupts, masked 340 * Asynchronous abort and unmasked native interrupts. 341 */ 342 thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E; 343 thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_A | 344 (THREAD_EXCP_FOREIGN_INTR << ARM32_CPSR_F_SHIFT); 345 /* Enable thumb mode if it's a thumb instruction */ 346 if (thread->regs.pc & 1) 347 thread->regs.cpsr |= CPSR_T; 348 /* Reinitialize stack pointer */ 349 thread->regs.svc_sp = thread->stack_va_end; 350 351 /* 352 * Copy arguments into context. This will make the 353 * arguments appear in r0-r7 when thread is started. 354 */ 355 thread->regs.r0 = args->a0; 356 thread->regs.r1 = args->a1; 357 thread->regs.r2 = args->a2; 358 thread->regs.r3 = args->a3; 359 thread->regs.r4 = args->a4; 360 thread->regs.r5 = args->a5; 361 thread->regs.r6 = args->a6; 362 thread->regs.r7 = args->a7; 363 } 364 #endif /*ARM32*/ 365 366 #ifdef ARM64 367 static void init_regs(struct thread_ctx *thread, 368 struct thread_smc_args *args) 369 { 370 thread->regs.pc = (uint64_t)thread_std_smc_entry; 371 372 /* 373 * Stdcalls starts in SVC mode with masked foreign interrupts, masked 374 * Asynchronous abort and unmasked native interrupts. 375 */ 376 thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 377 THREAD_EXCP_FOREIGN_INTR | DAIFBIT_ABT); 378 /* Reinitialize stack pointer */ 379 thread->regs.sp = thread->stack_va_end; 380 381 /* 382 * Copy arguments into context. This will make the 383 * arguments appear in x0-x7 when thread is started. 384 */ 385 thread->regs.x[0] = args->a0; 386 thread->regs.x[1] = args->a1; 387 thread->regs.x[2] = args->a2; 388 thread->regs.x[3] = args->a3; 389 thread->regs.x[4] = args->a4; 390 thread->regs.x[5] = args->a5; 391 thread->regs.x[6] = args->a6; 392 thread->regs.x[7] = args->a7; 393 394 /* Set up frame pointer as per the Aarch64 AAPCS */ 395 thread->regs.x[29] = 0; 396 } 397 #endif /*ARM64*/ 398 399 void thread_init_boot_thread(void) 400 { 401 struct thread_core_local *l = thread_get_core_local(); 402 size_t n; 403 404 for (n = 0; n < CFG_NUM_THREADS; n++) { 405 TAILQ_INIT(&threads[n].mutexes); 406 TAILQ_INIT(&threads[n].tsd.sess_stack); 407 SLIST_INIT(&threads[n].tsd.pgt_cache); 408 } 409 410 for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) 411 thread_core_local[n].curr_thread = -1; 412 413 l->curr_thread = 0; 414 threads[0].state = THREAD_STATE_ACTIVE; 415 } 416 417 void thread_clr_boot_thread(void) 418 { 419 struct thread_core_local *l = thread_get_core_local(); 420 421 assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS); 422 assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE); 423 assert(TAILQ_EMPTY(&threads[l->curr_thread].mutexes)); 424 threads[l->curr_thread].state = THREAD_STATE_FREE; 425 l->curr_thread = -1; 426 } 427 428 static void thread_alloc_and_run(struct thread_smc_args *args) 429 { 430 size_t n; 431 struct thread_core_local *l = thread_get_core_local(); 432 bool found_thread = false; 433 434 assert(l->curr_thread == -1); 435 436 lock_global(); 437 438 for (n = 0; n < CFG_NUM_THREADS; n++) { 439 if (threads[n].state == THREAD_STATE_FREE) { 440 threads[n].state = THREAD_STATE_ACTIVE; 441 found_thread = true; 442 break; 443 } 444 } 445 446 unlock_global(); 447 448 if (!found_thread) { 449 args->a0 = OPTEE_SMC_RETURN_ETHREAD_LIMIT; 450 return; 451 } 452 453 l->curr_thread = n; 454 455 threads[n].flags = 0; 456 init_regs(threads + n, args); 457 458 /* Save Hypervisor Client ID */ 459 threads[n].hyp_clnt_id = args->a7; 460 461 thread_lazy_save_ns_vfp(); 462 thread_resume(&threads[n].regs); 463 } 464 465 #ifdef ARM32 466 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 467 struct thread_smc_args *args) 468 { 469 /* 470 * Update returned values from RPC, values will appear in 471 * r0-r3 when thread is resumed. 472 */ 473 regs->r0 = args->a0; 474 regs->r1 = args->a1; 475 regs->r2 = args->a2; 476 regs->r3 = args->a3; 477 regs->r4 = args->a4; 478 regs->r5 = args->a5; 479 } 480 #endif /*ARM32*/ 481 482 #ifdef ARM64 483 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 484 struct thread_smc_args *args) 485 { 486 /* 487 * Update returned values from RPC, values will appear in 488 * x0-x3 when thread is resumed. 489 */ 490 regs->x[0] = args->a0; 491 regs->x[1] = args->a1; 492 regs->x[2] = args->a2; 493 regs->x[3] = args->a3; 494 regs->x[4] = args->a4; 495 regs->x[5] = args->a5; 496 } 497 #endif /*ARM64*/ 498 499 #ifdef ARM32 500 static bool is_from_user(uint32_t cpsr) 501 { 502 return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR; 503 } 504 #endif 505 506 #ifdef ARM64 507 static bool is_from_user(uint32_t cpsr) 508 { 509 if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT)) 510 return true; 511 if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) == 512 SPSR_64_MODE_EL0) 513 return true; 514 return false; 515 } 516 #endif 517 518 static bool is_user_mode(struct thread_ctx_regs *regs) 519 { 520 return is_from_user((uint32_t)regs->cpsr); 521 } 522 523 static void thread_resume_from_rpc(struct thread_smc_args *args) 524 { 525 size_t n = args->a3; /* thread id */ 526 struct thread_core_local *l = thread_get_core_local(); 527 uint32_t rv = 0; 528 529 assert(l->curr_thread == -1); 530 531 lock_global(); 532 533 if (n < CFG_NUM_THREADS && 534 threads[n].state == THREAD_STATE_SUSPENDED && 535 args->a7 == threads[n].hyp_clnt_id) 536 threads[n].state = THREAD_STATE_ACTIVE; 537 else 538 rv = OPTEE_SMC_RETURN_ERESUME; 539 540 unlock_global(); 541 542 if (rv) { 543 args->a0 = rv; 544 return; 545 } 546 547 l->curr_thread = n; 548 549 if (is_user_mode(&threads[n].regs)) 550 tee_ta_update_session_utime_resume(); 551 552 if (threads[n].have_user_map) 553 core_mmu_set_user_map(&threads[n].user_map); 554 555 /* 556 * Return from RPC to request service of a foreign interrupt must not 557 * get parameters from non-secure world. 558 */ 559 if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) { 560 copy_a0_to_a5(&threads[n].regs, args); 561 threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN; 562 } 563 564 thread_lazy_save_ns_vfp(); 565 thread_resume(&threads[n].regs); 566 } 567 568 void thread_handle_fast_smc(struct thread_smc_args *args) 569 { 570 thread_check_canaries(); 571 thread_fast_smc_handler_ptr(args); 572 /* Fast handlers must not unmask any exceptions */ 573 assert(thread_get_exceptions() == THREAD_EXCP_ALL); 574 } 575 576 void thread_handle_std_smc(struct thread_smc_args *args) 577 { 578 thread_check_canaries(); 579 580 if (args->a0 == OPTEE_SMC_CALL_RETURN_FROM_RPC) 581 thread_resume_from_rpc(args); 582 else 583 thread_alloc_and_run(args); 584 } 585 586 /* 587 * Helper routine for the assembly function thread_std_smc_entry() 588 * 589 * Note: this function is weak just to make it possible to exclude it from 590 * the unpaged area. 591 */ 592 void __weak __thread_std_smc_entry(struct thread_smc_args *args) 593 { 594 thread_std_smc_handler_ptr(args); 595 596 if (args->a0 == OPTEE_SMC_RETURN_OK) { 597 struct thread_ctx *thr = threads + thread_get_id(); 598 599 tee_fs_rpc_cache_clear(&thr->tsd); 600 if (!thread_prealloc_rpc_cache) { 601 thread_rpc_free_arg(thr->rpc_carg); 602 mobj_free(thr->rpc_mobj); 603 thr->rpc_carg = 0; 604 thr->rpc_arg = 0; 605 thr->rpc_mobj = NULL; 606 } 607 } 608 } 609 610 void *thread_get_tmp_sp(void) 611 { 612 struct thread_core_local *l = thread_get_core_local(); 613 614 return (void *)l->tmp_stack_va_end; 615 } 616 617 #ifdef ARM64 618 vaddr_t thread_get_saved_thread_sp(void) 619 { 620 struct thread_core_local *l = thread_get_core_local(); 621 int ct = l->curr_thread; 622 623 assert(ct != -1); 624 return threads[ct].kern_sp; 625 } 626 #endif /*ARM64*/ 627 628 vaddr_t thread_stack_start(void) 629 { 630 struct thread_ctx *thr; 631 int ct = thread_get_id_may_fail(); 632 633 if (ct == -1) 634 return 0; 635 636 thr = threads + ct; 637 return thr->stack_va_end - STACK_THREAD_SIZE; 638 } 639 640 size_t thread_stack_size(void) 641 { 642 return STACK_THREAD_SIZE; 643 } 644 645 bool thread_is_from_abort_mode(struct thread_abort_regs __maybe_unused *regs) 646 { 647 #ifdef ARM32 648 return (regs->spsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_ABT; 649 #endif 650 #ifdef ARM64 651 struct thread_core_local *l = thread_get_core_local(); 652 653 return (l->flags >> THREAD_CLF_SAVED_SHIFT) & THREAD_CLF_ABORT; 654 #endif 655 } 656 657 void thread_state_free(void) 658 { 659 struct thread_core_local *l = thread_get_core_local(); 660 int ct = l->curr_thread; 661 662 assert(ct != -1); 663 assert(TAILQ_EMPTY(&threads[ct].mutexes)); 664 665 thread_lazy_restore_ns_vfp(); 666 tee_pager_release_phys( 667 (void *)(threads[ct].stack_va_end - STACK_THREAD_SIZE), 668 STACK_THREAD_SIZE); 669 670 lock_global(); 671 672 assert(threads[ct].state == THREAD_STATE_ACTIVE); 673 threads[ct].state = THREAD_STATE_FREE; 674 threads[ct].flags = 0; 675 l->curr_thread = -1; 676 677 unlock_global(); 678 } 679 680 #ifdef CFG_WITH_PAGER 681 static void release_unused_kernel_stack(struct thread_ctx *thr, 682 uint32_t cpsr __maybe_unused) 683 { 684 #ifdef ARM64 685 /* 686 * If we're from user mode then thr->regs.sp is the saved user 687 * stack pointer and thr->kern_sp holds the last kernel stack 688 * pointer. But if we're from kernel mode then thr->kern_sp isn't 689 * up to date so we need to read from thr->regs.sp instead. 690 */ 691 vaddr_t sp = is_from_user(cpsr) ? thr->kern_sp : thr->regs.sp; 692 #else 693 vaddr_t sp = thr->regs.svc_sp; 694 #endif 695 vaddr_t base = thr->stack_va_end - STACK_THREAD_SIZE; 696 size_t len = sp - base; 697 698 tee_pager_release_phys((void *)base, len); 699 } 700 #else 701 static void release_unused_kernel_stack(struct thread_ctx *thr __unused, 702 uint32_t cpsr __unused) 703 { 704 } 705 #endif 706 707 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc) 708 { 709 struct thread_core_local *l = thread_get_core_local(); 710 int ct = l->curr_thread; 711 712 assert(ct != -1); 713 714 thread_check_canaries(); 715 716 release_unused_kernel_stack(threads + ct, cpsr); 717 718 if (is_from_user(cpsr)) { 719 thread_user_save_vfp(); 720 tee_ta_update_session_utime_suspend(); 721 tee_ta_gprof_sample_pc(pc); 722 } 723 thread_lazy_restore_ns_vfp(); 724 725 lock_global(); 726 727 assert(threads[ct].state == THREAD_STATE_ACTIVE); 728 threads[ct].flags |= flags; 729 threads[ct].regs.cpsr = cpsr; 730 threads[ct].regs.pc = pc; 731 threads[ct].state = THREAD_STATE_SUSPENDED; 732 733 threads[ct].have_user_map = core_mmu_user_mapping_is_active(); 734 if (threads[ct].have_user_map) { 735 core_mmu_get_user_map(&threads[ct].user_map); 736 core_mmu_set_user_map(NULL); 737 } 738 739 l->curr_thread = -1; 740 741 unlock_global(); 742 743 return ct; 744 } 745 746 #ifdef ARM32 747 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 748 { 749 l->tmp_stack_va_end = sp; 750 thread_set_irq_sp(sp); 751 thread_set_fiq_sp(sp); 752 } 753 754 static void set_abt_stack(struct thread_core_local *l __unused, vaddr_t sp) 755 { 756 thread_set_abt_sp(sp); 757 } 758 #endif /*ARM32*/ 759 760 #ifdef ARM64 761 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 762 { 763 /* 764 * We're already using the tmp stack when this function is called 765 * so there's no need to assign it to any stack pointer. However, 766 * we'll need to restore it at different times so store it here. 767 */ 768 l->tmp_stack_va_end = sp; 769 } 770 771 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 772 { 773 l->abt_stack_va_end = sp; 774 } 775 #endif /*ARM64*/ 776 777 bool thread_init_stack(uint32_t thread_id, vaddr_t sp) 778 { 779 if (thread_id >= CFG_NUM_THREADS) 780 return false; 781 threads[thread_id].stack_va_end = sp; 782 return true; 783 } 784 785 int thread_get_id_may_fail(void) 786 { 787 /* 788 * thread_get_core_local() requires foreign interrupts to be disabled 789 */ 790 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 791 struct thread_core_local *l = thread_get_core_local(); 792 int ct = l->curr_thread; 793 794 thread_unmask_exceptions(exceptions); 795 return ct; 796 } 797 798 int thread_get_id(void) 799 { 800 int ct = thread_get_id_may_fail(); 801 802 assert(ct >= 0 && ct < CFG_NUM_THREADS); 803 return ct; 804 } 805 806 static void init_handlers(const struct thread_handlers *handlers) 807 { 808 thread_std_smc_handler_ptr = handlers->std_smc; 809 thread_fast_smc_handler_ptr = handlers->fast_smc; 810 thread_nintr_handler_ptr = handlers->nintr; 811 thread_cpu_on_handler_ptr = handlers->cpu_on; 812 thread_cpu_off_handler_ptr = handlers->cpu_off; 813 thread_cpu_suspend_handler_ptr = handlers->cpu_suspend; 814 thread_cpu_resume_handler_ptr = handlers->cpu_resume; 815 thread_system_off_handler_ptr = handlers->system_off; 816 thread_system_reset_handler_ptr = handlers->system_reset; 817 } 818 819 #ifdef CFG_WITH_PAGER 820 static void init_thread_stacks(void) 821 { 822 size_t n; 823 824 /* 825 * Allocate virtual memory for thread stacks. 826 */ 827 for (n = 0; n < CFG_NUM_THREADS; n++) { 828 tee_mm_entry_t *mm; 829 vaddr_t sp; 830 831 /* Find vmem for thread stack and its protection gap */ 832 mm = tee_mm_alloc(&tee_mm_vcore, 833 SMALL_PAGE_SIZE + STACK_THREAD_SIZE); 834 assert(mm); 835 836 /* Claim eventual physical page */ 837 tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm), 838 true); 839 840 /* Add the area to the pager */ 841 tee_pager_add_core_area(tee_mm_get_smem(mm) + SMALL_PAGE_SIZE, 842 tee_mm_get_bytes(mm) - SMALL_PAGE_SIZE, 843 TEE_MATTR_PRW | TEE_MATTR_LOCKED, 844 NULL, NULL); 845 846 /* init effective stack */ 847 sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm); 848 if (!thread_init_stack(n, sp)) 849 panic("init stack failed"); 850 } 851 } 852 #else 853 static void init_thread_stacks(void) 854 { 855 size_t n; 856 857 /* Assign the thread stacks */ 858 for (n = 0; n < CFG_NUM_THREADS; n++) { 859 if (!thread_init_stack(n, GET_STACK(stack_thread[n]))) 860 panic("thread_init_stack failed"); 861 } 862 } 863 #endif /*CFG_WITH_PAGER*/ 864 865 void thread_init_primary(const struct thread_handlers *handlers) 866 { 867 init_handlers(handlers); 868 869 /* Initialize canaries around the stacks */ 870 init_canaries(); 871 872 init_thread_stacks(); 873 pgt_init(); 874 } 875 876 static void init_sec_mon(size_t pos __maybe_unused) 877 { 878 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 879 /* Initialize secure monitor */ 880 sm_init(GET_STACK(stack_tmp[pos])); 881 #endif 882 } 883 884 void thread_init_per_cpu(void) 885 { 886 size_t pos = get_core_pos(); 887 struct thread_core_local *l = thread_get_core_local(); 888 889 init_sec_mon(pos); 890 891 set_tmp_stack(l, GET_STACK(stack_tmp[pos]) - STACK_TMP_OFFS); 892 set_abt_stack(l, GET_STACK(stack_abt[pos])); 893 894 thread_init_vbar(); 895 } 896 897 struct thread_specific_data *thread_get_tsd(void) 898 { 899 return &threads[thread_get_id()].tsd; 900 } 901 902 struct thread_ctx_regs *thread_get_ctx_regs(void) 903 { 904 struct thread_core_local *l = thread_get_core_local(); 905 906 assert(l->curr_thread != -1); 907 return &threads[l->curr_thread].regs; 908 } 909 910 void thread_set_foreign_intr(bool enable) 911 { 912 /* thread_get_core_local() requires foreign interrupts to be disabled */ 913 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 914 struct thread_core_local *l; 915 916 l = thread_get_core_local(); 917 918 assert(l->curr_thread != -1); 919 920 if (enable) { 921 threads[l->curr_thread].flags |= 922 THREAD_FLAGS_FOREIGN_INTR_ENABLE; 923 thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR); 924 } else { 925 /* 926 * No need to disable foreign interrupts here since they're 927 * already disabled above. 928 */ 929 threads[l->curr_thread].flags &= 930 ~THREAD_FLAGS_FOREIGN_INTR_ENABLE; 931 } 932 } 933 934 void thread_restore_foreign_intr(void) 935 { 936 /* thread_get_core_local() requires foreign interrupts to be disabled */ 937 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 938 struct thread_core_local *l; 939 940 l = thread_get_core_local(); 941 942 assert(l->curr_thread != -1); 943 944 if (threads[l->curr_thread].flags & THREAD_FLAGS_FOREIGN_INTR_ENABLE) 945 thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR); 946 } 947 948 #ifdef CFG_WITH_VFP 949 uint32_t thread_kernel_enable_vfp(void) 950 { 951 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 952 struct thread_ctx *thr = threads + thread_get_id(); 953 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 954 955 assert(!vfp_is_enabled()); 956 957 if (!thr->vfp_state.ns_saved) { 958 vfp_lazy_save_state_final(&thr->vfp_state.ns); 959 thr->vfp_state.ns_saved = true; 960 } else if (thr->vfp_state.sec_lazy_saved && 961 !thr->vfp_state.sec_saved) { 962 /* 963 * This happens when we're handling an abort while the 964 * thread was using the VFP state. 965 */ 966 vfp_lazy_save_state_final(&thr->vfp_state.sec); 967 thr->vfp_state.sec_saved = true; 968 } else if (tuv && tuv->lazy_saved && !tuv->saved) { 969 /* 970 * This can happen either during syscall or abort 971 * processing (while processing a syscall). 972 */ 973 vfp_lazy_save_state_final(&tuv->vfp); 974 tuv->saved = true; 975 } 976 977 vfp_enable(); 978 return exceptions; 979 } 980 981 void thread_kernel_disable_vfp(uint32_t state) 982 { 983 uint32_t exceptions; 984 985 assert(vfp_is_enabled()); 986 987 vfp_disable(); 988 exceptions = thread_get_exceptions(); 989 assert(exceptions & THREAD_EXCP_FOREIGN_INTR); 990 exceptions &= ~THREAD_EXCP_FOREIGN_INTR; 991 exceptions |= state & THREAD_EXCP_FOREIGN_INTR; 992 thread_set_exceptions(exceptions); 993 } 994 995 void thread_kernel_save_vfp(void) 996 { 997 struct thread_ctx *thr = threads + thread_get_id(); 998 999 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1000 if (vfp_is_enabled()) { 1001 vfp_lazy_save_state_init(&thr->vfp_state.sec); 1002 thr->vfp_state.sec_lazy_saved = true; 1003 } 1004 } 1005 1006 void thread_kernel_restore_vfp(void) 1007 { 1008 struct thread_ctx *thr = threads + thread_get_id(); 1009 1010 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1011 assert(!vfp_is_enabled()); 1012 if (thr->vfp_state.sec_lazy_saved) { 1013 vfp_lazy_restore_state(&thr->vfp_state.sec, 1014 thr->vfp_state.sec_saved); 1015 thr->vfp_state.sec_saved = false; 1016 thr->vfp_state.sec_lazy_saved = false; 1017 } 1018 } 1019 1020 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp) 1021 { 1022 struct thread_ctx *thr = threads + thread_get_id(); 1023 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1024 1025 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1026 assert(!vfp_is_enabled()); 1027 1028 if (!thr->vfp_state.ns_saved) { 1029 vfp_lazy_save_state_final(&thr->vfp_state.ns); 1030 thr->vfp_state.ns_saved = true; 1031 } else if (tuv && uvfp != tuv) { 1032 if (tuv->lazy_saved && !tuv->saved) { 1033 vfp_lazy_save_state_final(&tuv->vfp); 1034 tuv->saved = true; 1035 } 1036 } 1037 1038 if (uvfp->lazy_saved) 1039 vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved); 1040 uvfp->lazy_saved = false; 1041 uvfp->saved = false; 1042 1043 thr->vfp_state.uvfp = uvfp; 1044 vfp_enable(); 1045 } 1046 1047 void thread_user_save_vfp(void) 1048 { 1049 struct thread_ctx *thr = threads + thread_get_id(); 1050 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1051 1052 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1053 if (!vfp_is_enabled()) 1054 return; 1055 1056 assert(tuv && !tuv->lazy_saved && !tuv->saved); 1057 vfp_lazy_save_state_init(&tuv->vfp); 1058 tuv->lazy_saved = true; 1059 } 1060 1061 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp) 1062 { 1063 struct thread_ctx *thr = threads + thread_get_id(); 1064 1065 if (uvfp == thr->vfp_state.uvfp) 1066 thr->vfp_state.uvfp = NULL; 1067 uvfp->lazy_saved = false; 1068 uvfp->saved = false; 1069 } 1070 #endif /*CFG_WITH_VFP*/ 1071 1072 #ifdef ARM32 1073 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1074 { 1075 uint32_t s; 1076 1077 if (!is_32bit) 1078 return false; 1079 1080 s = read_spsr(); 1081 s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2); 1082 s |= CPSR_MODE_USR; 1083 if (entry_func & 1) 1084 s |= CPSR_T; 1085 *spsr = s; 1086 return true; 1087 } 1088 #endif 1089 1090 #ifdef ARM64 1091 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1092 { 1093 uint32_t s; 1094 1095 if (is_32bit) { 1096 s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT); 1097 s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT; 1098 s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT; 1099 } else { 1100 s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT); 1101 } 1102 1103 *spsr = s; 1104 return true; 1105 } 1106 #endif 1107 1108 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1, 1109 unsigned long a2, unsigned long a3, unsigned long user_sp, 1110 unsigned long entry_func, bool is_32bit, 1111 uint32_t *exit_status0, uint32_t *exit_status1) 1112 { 1113 uint32_t spsr; 1114 1115 tee_ta_update_session_utime_resume(); 1116 1117 if (!get_spsr(is_32bit, entry_func, &spsr)) { 1118 *exit_status0 = 1; /* panic */ 1119 *exit_status1 = 0xbadbadba; 1120 return 0; 1121 } 1122 return __thread_enter_user_mode(a0, a1, a2, a3, user_sp, entry_func, 1123 spsr, exit_status0, exit_status1); 1124 } 1125 1126 void thread_add_mutex(struct mutex *m) 1127 { 1128 struct thread_core_local *l = thread_get_core_local(); 1129 int ct = l->curr_thread; 1130 1131 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1132 assert(m->owner_id == MUTEX_OWNER_ID_NONE); 1133 m->owner_id = ct; 1134 TAILQ_INSERT_TAIL(&threads[ct].mutexes, m, link); 1135 } 1136 1137 void thread_rem_mutex(struct mutex *m) 1138 { 1139 struct thread_core_local *l = thread_get_core_local(); 1140 int ct = l->curr_thread; 1141 1142 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1143 assert(m->owner_id == ct); 1144 m->owner_id = MUTEX_OWNER_ID_NONE; 1145 TAILQ_REMOVE(&threads[ct].mutexes, m, link); 1146 } 1147 1148 bool thread_disable_prealloc_rpc_cache(uint64_t *cookie) 1149 { 1150 bool rv; 1151 size_t n; 1152 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1153 1154 lock_global(); 1155 1156 for (n = 0; n < CFG_NUM_THREADS; n++) { 1157 if (threads[n].state != THREAD_STATE_FREE) { 1158 rv = false; 1159 goto out; 1160 } 1161 } 1162 1163 rv = true; 1164 for (n = 0; n < CFG_NUM_THREADS; n++) { 1165 if (threads[n].rpc_arg) { 1166 *cookie = threads[n].rpc_carg; 1167 threads[n].rpc_carg = 0; 1168 threads[n].rpc_arg = NULL; 1169 goto out; 1170 } 1171 } 1172 1173 *cookie = 0; 1174 thread_prealloc_rpc_cache = false; 1175 out: 1176 unlock_global(); 1177 thread_unmask_exceptions(exceptions); 1178 return rv; 1179 } 1180 1181 bool thread_enable_prealloc_rpc_cache(void) 1182 { 1183 bool rv; 1184 size_t n; 1185 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1186 1187 lock_global(); 1188 1189 for (n = 0; n < CFG_NUM_THREADS; n++) { 1190 if (threads[n].state != THREAD_STATE_FREE) { 1191 rv = false; 1192 goto out; 1193 } 1194 } 1195 1196 rv = true; 1197 thread_prealloc_rpc_cache = true; 1198 out: 1199 unlock_global(); 1200 thread_unmask_exceptions(exceptions); 1201 return rv; 1202 } 1203 1204 void thread_rpc_free_arg(uint64_t cookie) 1205 { 1206 if (cookie) { 1207 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1208 OPTEE_SMC_RETURN_RPC_FREE 1209 }; 1210 1211 reg_pair_from_64(cookie, rpc_args + 1, rpc_args + 2); 1212 thread_rpc(rpc_args); 1213 } 1214 } 1215 1216 struct mobj *thread_rpc_alloc_arg(size_t size, uint64_t *cookie) 1217 { 1218 paddr_t pa; 1219 uint64_t co; 1220 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1221 OPTEE_SMC_RETURN_RPC_ALLOC, size 1222 }; 1223 struct mobj *mobj = NULL; 1224 1225 thread_rpc(rpc_args); 1226 1227 pa = reg_pair_to_64(rpc_args[1], rpc_args[2]); 1228 co = reg_pair_to_64(rpc_args[4], rpc_args[5]); 1229 1230 if (!ALIGNMENT_IS_OK(pa, struct optee_msg_arg)) 1231 goto err; 1232 1233 mobj = mobj_shm_alloc(pa, size); 1234 if (!mobj) 1235 goto err; 1236 1237 *cookie = co; 1238 return mobj; 1239 err: 1240 thread_rpc_free_arg(co); 1241 mobj_free(mobj); 1242 *cookie = 0; 1243 return NULL; 1244 } 1245 1246 static bool get_rpc_arg(uint32_t cmd, size_t num_params, 1247 struct optee_msg_arg **arg_ret, uint64_t *carg_ret) 1248 { 1249 struct thread_ctx *thr = threads + thread_get_id(); 1250 struct optee_msg_arg *arg = thr->rpc_arg; 1251 struct mobj *mobj; 1252 size_t sz = OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS); 1253 uint64_t c; 1254 1255 if (num_params > THREAD_RPC_MAX_NUM_PARAMS) 1256 return false; 1257 1258 if (!arg) { 1259 mobj = thread_rpc_alloc_arg(sz, &c); 1260 if (!mobj) 1261 return false; 1262 1263 arg = mobj_get_va(mobj, 0); 1264 if (!arg) 1265 goto bad; 1266 1267 thr->rpc_arg = arg; 1268 thr->rpc_carg = c; 1269 thr->rpc_mobj = mobj; 1270 } 1271 1272 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(num_params)); 1273 arg->cmd = cmd; 1274 arg->num_params = num_params; 1275 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1276 1277 *arg_ret = arg; 1278 *carg_ret = thr->rpc_carg; 1279 return true; 1280 1281 bad: 1282 thread_rpc_free_arg(c); 1283 return false; 1284 } 1285 1286 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params, 1287 struct optee_msg_param *params) 1288 { 1289 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1290 struct optee_msg_arg *arg; 1291 uint64_t carg; 1292 size_t n; 1293 1294 /* 1295 * Break recursion in case plat_prng_add_jitter_entropy_norpc() 1296 * sleeps on a mutex or unlocks a mutex with a sleeper (contended 1297 * mutex). 1298 */ 1299 if (cmd != OPTEE_MSG_RPC_CMD_WAIT_QUEUE) 1300 plat_prng_add_jitter_entropy_norpc(); 1301 1302 if (!get_rpc_arg(cmd, num_params, &arg, &carg)) 1303 return TEE_ERROR_OUT_OF_MEMORY; 1304 1305 memcpy(arg->params, params, sizeof(*params) * num_params); 1306 1307 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1308 thread_rpc(rpc_args); 1309 for (n = 0; n < num_params; n++) { 1310 switch (params[n].attr & OPTEE_MSG_ATTR_TYPE_MASK) { 1311 case OPTEE_MSG_ATTR_TYPE_VALUE_OUTPUT: 1312 case OPTEE_MSG_ATTR_TYPE_VALUE_INOUT: 1313 case OPTEE_MSG_ATTR_TYPE_RMEM_OUTPUT: 1314 case OPTEE_MSG_ATTR_TYPE_RMEM_INOUT: 1315 case OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT: 1316 case OPTEE_MSG_ATTR_TYPE_TMEM_INOUT: 1317 params[n] = arg->params[n]; 1318 break; 1319 default: 1320 break; 1321 } 1322 } 1323 return arg->ret; 1324 } 1325 1326 /** 1327 * Free physical memory previously allocated with thread_rpc_alloc() 1328 * 1329 * @cookie: cookie received when allocating the buffer 1330 * @bt: must be the same as supplied when allocating 1331 * @mobj: mobj that describes allocated buffer 1332 * 1333 * This function also frees corresponding mobj. 1334 */ 1335 static void thread_rpc_free(unsigned int bt, uint64_t cookie, struct mobj *mobj) 1336 { 1337 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1338 struct optee_msg_arg *arg; 1339 uint64_t carg; 1340 1341 if (!get_rpc_arg(OPTEE_MSG_RPC_CMD_SHM_FREE, 1, &arg, &carg)) 1342 return; 1343 1344 arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1345 arg->params[0].u.value.a = bt; 1346 arg->params[0].u.value.b = cookie; 1347 arg->params[0].u.value.c = 0; 1348 1349 mobj_free(mobj); 1350 1351 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1352 thread_rpc(rpc_args); 1353 } 1354 1355 /** 1356 * Allocates shared memory buffer via RPC 1357 * 1358 * @size: size in bytes of shared memory buffer 1359 * @align: required alignment of buffer 1360 * @bt: buffer type OPTEE_MSG_RPC_SHM_TYPE_* 1361 * @payload: returned physical pointer to buffer, 0 if allocation 1362 * failed. 1363 * @cookie: returned cookie used when freeing the buffer 1364 */ 1365 static struct mobj *thread_rpc_alloc(size_t size, size_t align, unsigned int bt, 1366 uint64_t *cookie) 1367 { 1368 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1369 struct optee_msg_arg *arg; 1370 uint64_t carg; 1371 struct mobj *mobj = NULL; 1372 1373 if (!get_rpc_arg(OPTEE_MSG_RPC_CMD_SHM_ALLOC, 1, &arg, &carg)) 1374 goto fail; 1375 1376 arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1377 arg->params[0].u.value.a = bt; 1378 arg->params[0].u.value.b = size; 1379 arg->params[0].u.value.c = align; 1380 1381 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1382 thread_rpc(rpc_args); 1383 1384 if (arg->ret != TEE_SUCCESS) 1385 goto fail; 1386 1387 if (arg->num_params != 1) 1388 goto fail; 1389 1390 mobj = mobj_shm_alloc(arg->params[0].u.tmem.buf_ptr, 1391 arg->params[0].u.tmem.size); 1392 *cookie = arg->params[0].u.tmem.shm_ref; 1393 1394 if (!mobj) 1395 goto free_first; 1396 1397 assert(mobj_is_nonsec(mobj)); 1398 return mobj; 1399 1400 free_first: 1401 thread_rpc_free(bt, *cookie, mobj); 1402 fail: 1403 *cookie = 0; 1404 return NULL; 1405 } 1406 1407 struct mobj *thread_rpc_alloc_payload(size_t size, uint64_t *cookie) 1408 { 1409 return thread_rpc_alloc(size, 8, OPTEE_MSG_RPC_SHM_TYPE_APPL, cookie); 1410 } 1411 1412 void thread_rpc_free_payload(uint64_t cookie, struct mobj *mobj) 1413 { 1414 thread_rpc_free(OPTEE_MSG_RPC_SHM_TYPE_APPL, cookie, mobj); 1415 } 1416