core: add framework to load REE-FS encrypted TAs

Add framework to support loading of encrypted TAs from REE-FS using
symmetric authenticated encryption scheme supported by OP-TEE.

The default encry

core: add framework to load REE-FS encrypted TAs

Add framework to support loading of encrypted TAs from REE-FS using
symmetric authenticated encryption scheme supported by OP-TEE.

The default encryption key is derived from hardware unique key which
can be overridden via platform specific encryption key.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm32: bugfix booting second cpu with ASLR

Fixes crashing second cpu when booting with ASLR enabled.

Fixes: 170e9084a84f ("core: add support for CFG_CORE_ASLR")
Reviewed-by: Etienne Carriere

core: arm32: bugfix booting second cpu with ASLR

Fixes crashing second cpu when booting with ASLR enabled.

Fixes: 170e9084a84f ("core: add support for CFG_CORE_ASLR")
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2260)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add plat_primary_init_early()

Adds plat_primary_init_early() which replaces plat_cpu_reset_late().
plat_cpu_reset_late() was called for each cpu, but
plat_primary_init_early() is only called o

core: add plat_primary_init_early()

Adds plat_primary_init_early() which replaces plat_cpu_reset_late().
plat_cpu_reset_late() was called for each cpu, but
plat_primary_init_early() is only called on the primary cpu.

In practice that's not a problem (except for plat-stm, more on that
later) since all the platform specific plat_cpu_reset_late() only does
something if get_core_pos() returns 0, that is on the primary cpu.

On plat-stm SCR is now updated in plat_cpu_reset_early() instead.

This patch is needed because ASLR may relocate OP-TEE to a virtual base
address which differs from the physical base address. This means that
it's not possible to execute C code before MMU has been enabled.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: fix gen_tee_bin.py to handle STB_LOCAL symbols

Prior to this patch scripts/gen_tee_bin.py only looked for global
symbols (STB_GLOBAL). The linker in some older versions of the gcc
toolchain ma

core: fix gen_tee_bin.py to handle STB_LOCAL symbols

Prior to this patch scripts/gen_tee_bin.py only looked for global
symbols (STB_GLOBAL). The linker in some older versions of the gcc
toolchain makes some of the symbols local (STB_LOCAL) instead. This
patch fixes that by falling back to a local symbol in case a global
cannot be found.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Reported-by: Victor Chong <victor.chong@linaro.org>
Fixes: 3c51966baa03 ("core: add scripts/gen_tee_bin.py for boot binaries")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove unused user_ta_ctx::load_addr

Since commit d1911a85142d ("core: load TAs using ldelf"), the load_addr
field in struct user_ta_ctx is not used anymore. Remove it.

Signed-off-by: Jerome

core: remove unused user_ta_ctx::load_addr

Since commit d1911a85142d ("core: load TAs using ldelf"), the load_addr
field in struct user_ta_ctx is not used anymore. Remove it.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-imx: mx6: support for TZASC on 6UL/ULL

The i.MX6UL/ULL processors support only one instance of the TZC380 IP.
Use only one to setup the firewall mappings.

Signed-off-by: Rouven Czerwinski <r.c

plat-imx: mx6: support for TZASC on 6UL/ULL

The i.MX6UL/ULL processors support only one instance of the TZC380 IP.
Use only one to setup the firewall mappings.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: move relocation to embedded data region

The relocation sections are placed last in the linker script to be kept
out of the way for the other sections. The relocation sections are
interpreted b

core: move relocation to embedded data region

The relocation sections are placed last in the linker script to be kept
out of the way for the other sections. The relocation sections are
interpreted by gen_tee_bin.py and converted into a more compact data
structure which is stored in the embedded data region.

For each relocation, only one 32-bit offset is kept. Compared to the
standard ELF format, the size of the relocation table is either halved
(Rel32 type: two 32-bit words per entry) or divided by 6 (Rel64 type:
three 64-bit words per entry).

Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add embedded data region

Until this patch hashes has been supplied as a single blob following the
init part when configured for paging. To facilitate storing additional
data when OP-TEE is ini

core: add embedded data region

Until this patch hashes has been supplied as a single blob following the
init part when configured for paging. To facilitate storing additional
data when OP-TEE is initializing a struct boot_embdata is added. This
struct is populated gen_tee_bin.py and later interpreted by
assembly boot code and init_runtime().

Previous memory allocation for hashes in the linker script is replaced
by this new mechanism.

Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: generic_entry_a64.S: fix boot_mmu_config alignment

Makes sure that boot_mmu_config is at a 8 byte aligned address.

Fixes: 520860f658be ("core: generic_entry: add enable_mmu()")
Reviewed-by: J

core: generic_entry_a64.S: fix boot_mmu_config alignment

Makes sure that boot_mmu_config is at a 8 byte aligned address.

Fixes: 520860f658be ("core: generic_entry: add enable_mmu()")
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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pta: bcm: Add Broadcom SOTP PTA

Add Broadcom SOTP PTA
This PTA is used by userspace application to read
SOTP value and determine modules/features that are
enabled on this platform

Signed-off-by: Ra

pta: bcm: Add Broadcom SOTP PTA

Add Broadcom SOTP PTA
This PTA is used by userspace application to read
SOTP value and determine modules/features that are
enabled on this platform

Signed-off-by: Rahul Gupta <rahul.gupta@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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pta: bcm: Add additional bnxt commands in pta

Add support for below bnxt commands:
- HEALTH_STATUS
- HANDSHAKE_STATUS
- CRASH_DUMP_COPY

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Sign

pta: bcm: Add additional bnxt commands in pta

Add support for below bnxt commands:
- HEALTH_STATUS
- HANDSHAKE_STATUS
- CRASH_DUMP_COPY

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: bnxt: Add driver support for additional bnxt cmds

Add driver support for following bnxt commands:
- HEALTH_STATUS
- HANDSHAKE_STATUS
- CRASH_DUMP_COPY

Signed-off-by: Vikas Gupta <vikas.

drivers: bnxt: Add driver support for additional bnxt cmds

Add driver support for following bnxt commands:
- HEALTH_STATUS
- HANDSHAKE_STATUS
- CRASH_DUMP_COPY

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: bnxt: Load bnxt images from secure memory

Load bnxt images from the secure memory at 1K offset,
If found on the secure memory instead of flash.
We copy the images from flash to secure memor

drivers: bnxt: Load bnxt images from secure memory

Load bnxt images from the secure memory at 1K offset,
If found on the secure memory instead of flash.
We copy the images from flash to secure memory for
the very first time

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: bnxt: Remove NS3Z specific code

Remove support for discontinued platform(NS3Z)

Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broad

drivers: bnxt: Remove NS3Z specific code

Remove support for discontinued platform(NS3Z)

Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: bnxt: Update TEMP_MEM region that was overlapped

Update TEMP_MEM region that was overlapped with BNXT_CRASH_SEC_MEM

Signed-off-by: Tony Poon <tony.poon@broadcom.com>
Signed-off-by: Sheetal

drivers: bnxt: Update TEMP_MEM region that was overlapped

Update TEMP_MEM region that was overlapped with BNXT_CRASH_SEC_MEM

Signed-off-by: Tony Poon <tony.poon@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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pta: bcm: Add HW RNG PTA

Add PTA for hardware random number generator.
PTA Reads the random number from the RNG FIFO and passes to
user application.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.

pta: bcm: Add HW RNG PTA

Add PTA for hardware random number generator.
PTA Reads the random number from the RNG FIFO and passes to
user application.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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core: link.mk: deprecate tee{,-pager,-pageable}.bin

Deprecates the generated files tee.bin, tee-pager.bin and tee-pageable.bin.
The files can still be generated by supplying the complete output path

core: link.mk: deprecate tee{,-pager,-pageable}.bin

Deprecates the generated files tee.bin, tee-pager.bin and tee-pageable.bin.
The files can still be generated by supplying the complete output path as a
target to make.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Remove unused scripts/gen_hashed_bin.py

Removes the now unused scripts/gen_hashed_bin.py which was
replaced by scripts/gen_tee_bin.py.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-of

Remove unused scripts/gen_hashed_bin.py

Removes the now unused scripts/gen_hashed_bin.py which was
replaced by scripts/gen_tee_bin.py.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: link.mk: use gen_tee_bin.py

Uses gen_tee_bin.py instead of objcopy and gen_hashed_bin.py.

Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey960)
Reviewed-by: Jerome Forissier <jerome@f

core: link.mk: use gen_tee_bin.py

Uses gen_tee_bin.py instead of objcopy and gen_hashed_bin.py.

Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey960)
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add scripts/gen_tee_bin.py for boot binaries

Adds scripts/gen_tee_bin.py which can produce the boot binaries instead
of objdump and scripts/gen_hashed_bin.py.

Reviewed-by: Jerome Forissier <j

core: add scripts/gen_tee_bin.py for boot binaries

Adds scripts/gen_tee_bin.py which can produce the boot binaries instead
of objdump and scripts/gen_hashed_bin.py.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: bcm_sotp: No ECC bits for Section 0 to Section 3

- Hardware does not support ECC bits for SOTP section_0 to
section_3, i.e ROWS_0 to ROWS_20.
- Remove magic number and use platform provid

drivers: bcm_sotp: No ECC bits for Section 0 to Section 3

- Hardware does not support ECC bits for SOTP section_0 to
section_3, i.e ROWS_0 to ROWS_20.
- Remove magic number and use platform provided
SOTP_NO_ECC_ROWS macro.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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pta: bcm: Add PTA for secure watchdog

Add PTA for secure watchdog.
A userspace application uses this PTA to carry out
below operations:
- Initialize and configure secure watchdog
- Set timeout val

pta: bcm: Add PTA for secure watchdog

Add PTA for secure watchdog.
A userspace application uses this PTA to carry out
below operations:
- Initialize and configure secure watchdog
- Set timeout value
- Start and
- Stop watchdog

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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plat-bcm: Add Broadcom platform specific err log support

Add Broadcom platform specific err logging support

Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Acked-by: Jerome Forissie

plat-bcm: Add Broadcom platform specific err log support

Add Broadcom platform specific err logging support

Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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trace: Add weak platform tracer function

Add weak platform tracer function
This would allow each platform to carry out
plat specific logging, possibly to some media
for post-mortem analysis

Signed-

trace: Add weak platform tracer function

Add weak platform tracer function
This would allow each platform to carry out
plat specific logging, possibly to some media
for post-mortem analysis

Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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core: imx: fix CFG_DRAM_BASE for i.MX7ulp

Change CFG_DRAM_BASE to 0x60000000 for i.MX7ulp

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.c

core: imx: fix CFG_DRAM_BASE for i.MX7ulp

Change CFG_DRAM_BASE to 0x60000000 for i.MX7ulp

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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