1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 65OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 66 67ENTRY(_start) 68SECTIONS 69{ 70 . = TEE_TEXT_VA_START; 71#ifdef ARM32 72 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 73#endif 74#ifdef ARM64 75 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 76#endif 77 __text_start = .; 78 79 /* 80 * Memory between TEE_TEXT_VA_START and page aligned rounded down 81 * value will be mapped with unpaged "text" section attributes: 82 * likely to be read-only/executable. 83 */ 84 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 85 86 .text : { 87 KEEP(*(.text._start)) 88 __identity_map_init_start = .; 89 *(.identity_map .identity_map.* \ 90 /* 91 * The one below is needed because it's a weak 92 * symbol that may be overridden by platform 93 * specific code. 94 */ 95 .text.get_core_pos_mpidr) 96 __identity_map_init_end = .; 97 KEEP(*(.text.init .text.plat_cpu_reset_early \ 98 .text.reset .text.reset_primary .text.unhandled_cpu \ 99 .text.__assert_flat_mapped_range)) 100 101#ifdef CFG_WITH_PAGER 102 *(.text) 103/* Include list of sections needed for paging */ 104#include <text_unpaged.ld.S> 105#else 106 *(.text .text.*) 107#endif 108 *(.sram.text.glue_7* .gnu.linkonce.t.*) 109 . = ALIGN(8); 110 } 111 __text_end = .; 112 113#ifdef CFG_CORE_RODATA_NOEXEC 114 . = ALIGN(SMALL_PAGE_SIZE); 115#endif 116 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 117 __flatmap_unpg_ro_start = .; 118 119 .rodata : ALIGN(8) { 120 __rodata_start = .; 121 *(.gnu.linkonce.r.*) 122#ifdef CFG_WITH_PAGER 123 *(.rodata .rodata.__unpaged) 124#include <rodata_unpaged.ld.S> 125#else 126#ifdef CFG_DT 127 __rodata_dtdrv_start = .; 128 KEEP(*(.rodata.dtdrv)) 129 __rodata_dtdrv_end = .; 130#endif 131#ifdef CFG_EARLY_TA 132 . = ALIGN(8); 133 __rodata_early_ta_start = .; 134 KEEP(*(.rodata.early_ta)) 135 __rodata_early_ta_end = .; 136#endif 137 138 *(.rodata .rodata.*) 139 . = ALIGN(8); 140 KEEP(*(SORT(.scattered_array*))); 141#endif 142 . = ALIGN(8); 143 __rodata_end = .; 144 } 145 146 .hash : { *(.hash) } 147 .dynsym : { *(.dynsym) } 148 .dynstr : { *(.dynstr) } 149 150 .rel : { 151 __rel_start = .; 152 *(.rel.*) 153 __rel_end = .; 154 } 155 .rela : { 156 __rela_start = .; 157 *(.rela.*) 158 __rela_end = .; 159 } 160#ifndef CFG_CORE_ASLR 161 ASSERT(__rel_end == __rel_start, "Relocation entries not expected") 162 ASSERT(__rela_end == __rela_start, "Relocation entries not expected") 163#endif 164 165 166 .got : { *(.got.plt) *(.got) } 167 .dynamic : { *(.dynamic) } 168 .plt : { *(.plt) } 169 170 .ctors : ALIGN(8) { 171 __ctor_list = .; 172 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 173 __ctor_end = .; 174 } 175 .dtors : ALIGN(8) { 176 __dtor_list = .; 177 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 178 __dtor_end = .; 179 } 180 181 /* .ARM.exidx is sorted, so has to go in its own output section. */ 182 .ARM.exidx : { 183 __exidx_start = .; 184 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 185 __exidx_end = .; 186 } 187 188 .ARM.extab : { 189 __extab_start = .; 190 *(.ARM.extab*) 191 __extab_end = .; 192 } 193 194 /* Start page aligned read-write memory */ 195#ifdef CFG_CORE_RWDATA_NOEXEC 196 . = ALIGN(SMALL_PAGE_SIZE); 197#endif 198 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 199 200#ifdef CFG_VIRTUALIZATION 201 __flatmap_nex_rw_start = . ; 202 .nex_data : ALIGN(8) { 203 *(.nex_data .nex_data.*) 204 } 205 206 .nex_bss : ALIGN(8) { 207 __nex_bss_start = .; 208 *(.nex_bss .nex_bss.*) 209 __nex_bss_end = .; 210 } 211 212 /* 213 * We want to keep all nexus memory in one place, because 214 * it should be always mapped and it is easier to map one 215 * memory region than two. 216 * Next section are NOLOAD ones, but they are followed 217 * by sections with data. Thus, this NOLOAD section will 218 * be included in the resulting binary, filled with zeroes 219 */ 220 .nex_stack (NOLOAD) : { 221 __nozi_stack_start = .; 222 KEEP(*(.nozi_stack.stack_tmp .nozi_stack.stack_abt)) 223 . = ALIGN(8); 224 __nozi_stack_end = .; 225 } 226 227 .nex_heap (NOLOAD) : { 228 __nex_heap_start = .; 229 . += CFG_CORE_NEX_HEAP_SIZE; 230 . = ALIGN(16 * 1024); 231 __nex_heap_end = .; 232 } 233 .nex_nozi (NOLOAD) : { 234 ASSERT(!(ABSOLUTE(.) & (16 * 1024 - 1)), "align nozi to 16kB"); 235 KEEP(*(.nozi.mmu.l1 .nozi.mmu.l2)) 236 } 237 238 . = ALIGN(SMALL_PAGE_SIZE); 239 240 __flatmap_nex_rw_size = . - __flatmap_nex_rw_start; 241 __flatmap_nex_rw_end = .; 242#endif 243 244 __flatmap_unpg_rw_start = .; 245 246 .data : ALIGN(8) { 247 /* writable data */ 248 __data_start_rom = .; 249 /* in one segment binaries, the rom data address is on top 250 of the ram data address */ 251 __data_start = .; 252 *(.data .data.* .gnu.linkonce.d.*) 253 . = ALIGN(8); 254 } 255 256 /* unintialized data */ 257 .bss : { 258 __data_end = .; 259 __bss_start = .; 260 *(.bss .bss.*) 261 *(.gnu.linkonce.b.*) 262 *(COMMON) 263 . = ALIGN(8); 264 __bss_end = .; 265 } 266 267 .heap1 (NOLOAD) : { 268 /* 269 * We're keeping track of the padding added before the 270 * .nozi section so we can do something useful with 271 * this otherwise wasted memory. 272 */ 273 __heap1_start = .; 274#ifndef CFG_WITH_PAGER 275 . += CFG_CORE_HEAP_SIZE; 276#endif 277#ifdef CFG_WITH_LPAE 278 . = ALIGN(4 * 1024); 279#else 280 . = ALIGN(16 * 1024); 281#endif 282 __heap1_end = .; 283 } 284 /* 285 * Uninitialized data that shouldn't be zero initialized at 286 * runtime. 287 * 288 * L1 mmu table requires 16 KiB alignment 289 */ 290 .nozi (NOLOAD) : { 291 __nozi_start = .; 292 KEEP(*(.nozi .nozi.*)) 293 . = ALIGN(16); 294 __nozi_end = .; 295 /* 296 * If virtualization is enabled, abt and tmp stacks will placed 297 * at above .nex_stack section and thread stacks will go there 298 */ 299 __nozi_stack_start = .; 300 KEEP(*(.nozi_stack .nozi_stack.*)) 301 . = ALIGN(8); 302 __nozi_stack_end = .; 303 } 304 305#ifdef CFG_WITH_PAGER 306 .heap2 (NOLOAD) : { 307 __heap2_start = .; 308 /* 309 * Reserve additional memory for heap, the total should be 310 * at least CFG_CORE_HEAP_SIZE, but count what has already 311 * been reserved in .heap1 312 */ 313 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 314 . = ALIGN(SMALL_PAGE_SIZE); 315 __heap2_end = .; 316 } 317 318 /* Start page aligned read-only memory */ 319 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 320 321 __init_start = .; 322 __flatmap_init_rx_start = .; 323 324 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 325 "read-write memory is not paged aligned") 326 327 .text_init : { 328/* 329 * Include list of sections needed for boot initialization, this list 330 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 331 * sections will go into the unpaged area. 332 */ 333#include <text_init.ld.S> 334 KEEP(*(.text.startup.*)); 335 /* Make sure constructor functions are available during init */ 336 KEEP(*(.text._GLOBAL__sub_*)); 337 . = ALIGN(8); 338 } 339 340#ifdef CFG_CORE_RODATA_NOEXEC 341 . = ALIGN(SMALL_PAGE_SIZE); 342#endif 343 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 344 __flatmap_init_ro_start = .; 345 346 .rodata_init : { 347#include <rodata_init.ld.S> 348 349 . = ALIGN(8); 350 KEEP(*(SORT(.scattered_array*))); 351 352 . = ALIGN(8); 353 __rodata_init_end = .; 354 } 355 __rodata_init_end = .; 356 357 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 358 __init_size = __init_end - __init_start; 359 360 /* vcore flat map stops here. No need to page align, rodata follows. */ 361 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 362 363 .rodata_pageable : ALIGN(8) { 364#ifdef CFG_DT 365 __rodata_dtdrv_start = .; 366 KEEP(*(.rodata.dtdrv)) 367 __rodata_dtdrv_end = .; 368#endif 369#ifdef CFG_EARLY_TA 370 . = ALIGN(8); 371 __rodata_early_ta_start = .; 372 KEEP(*(.rodata.early_ta)) 373 __rodata_early_ta_end = .; 374#endif 375 *(.rodata*) 376 } 377 378#ifdef CFG_CORE_RODATA_NOEXEC 379 . = ALIGN(SMALL_PAGE_SIZE); 380#endif 381 382 .text_pageable : ALIGN(8) { 383 *(.text*) 384 . = ALIGN(SMALL_PAGE_SIZE); 385 } 386 387 __pageable_part_end = .; 388 __pageable_part_start = __init_end; 389 __pageable_start = __init_start; 390 __pageable_end = __pageable_part_end; 391 392 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 393 "Load address before start of physical memory") 394 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 395 "Load address after end of physical memory") 396 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 397 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 398 399 400#endif /*CFG_WITH_PAGER*/ 401 402#ifdef CFG_CORE_SANITIZE_KADDRESS 403 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 404 . = ALIGN(8); 405 .asan_shadow : { 406 __asan_shadow_start = .; 407 . += TEE_RAM_VA_SIZE / 9; 408 __asan_shadow_end = .; 409 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 410 } 411#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 412 413 __end = .; 414 415#ifndef CFG_WITH_PAGER 416 __init_size = __data_end - TEE_TEXT_VA_START; 417#endif 418 /* 419 * Guard against moving the location counter backwards in the assignment 420 * below. 421 */ 422 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 423 "TEE_RAM_VA_SIZE is too small") 424 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 425 426 _end_of_ram = .; 427 428#ifndef CFG_WITH_PAGER 429 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 430#endif 431 432 /DISCARD/ : { 433 /* Strip unnecessary stuff */ 434 *(.comment .note .eh_frame .interp) 435 /* Strip meta variables */ 436 *(__keep_meta_vars*) 437 } 438 439} 440 441/* Unpaged read-only memories */ 442__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 443__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 444#ifdef CFG_CORE_RODATA_NOEXEC 445__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 446__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 447#else 448__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 449__vcore_unpg_ro_size = 0; 450#endif 451 452/* Unpaged read-write memory */ 453__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 454__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 455 456#ifdef CFG_VIRTUALIZATION 457/* Nexus read-write memory */ 458__vcore_nex_rw_start = __flatmap_nex_rw_start; 459__vcore_nex_rw_size = __flatmap_nex_rw_size; 460#endif 461 462#ifdef CFG_WITH_PAGER 463/* 464 * Core init mapping shall cover up to end of the physical RAM. 465 * This is required since the hash table is appended to the 466 * binary data after the firmware build sequence. 467 */ 468#define __FLATMAP_PAGER_TRAILING_SPACE \ 469 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 470 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 471 472/* Paged/init read-only memories */ 473__vcore_init_rx_start = __flatmap_init_rx_start; 474__vcore_init_ro_start = __flatmap_init_ro_start; 475#ifdef CFG_CORE_RODATA_NOEXEC 476__vcore_init_rx_size = __flatmap_init_rx_size; 477__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 478#else 479__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 480 __FLATMAP_PAGER_TRAILING_SPACE; 481__vcore_init_ro_size = 0; 482#endif /* CFG_CORE_RODATA_NOEXEC */ 483#endif /* CFG_WITH_PAGER */ 484 485#ifdef CFG_CORE_SANITIZE_KADDRESS 486__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 487 SMALL_PAGE_SIZE; 488__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 489 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 490__asan_map_size = __asan_map_end - __asan_map_start; 491#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 492