| c6e827c0 | 25-Feb-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
Rename to barrier_read_counter_timer()
Renames barrier_read_cntpct() to barrier_read_counter_timer() to use a neutral name for the counter.
With SPMC at S-EL2 OP-TEE will be virtualized and must us
Rename to barrier_read_counter_timer()
Renames barrier_read_cntpct() to barrier_read_counter_timer() to use a neutral name for the counter.
With SPMC at S-EL2 OP-TEE will be virtualized and must use CNTVCT instead of CNTPCT while the old physical OP-TEE must continue to use CNTPCT.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4a3f6ad0 | 08-Feb-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: let struct tee_pager_area span multiple translation tables
Extends struct tee_pager_area to be able to span multiple translation tables avoiding the need to split ranges into multiple a
core: pager: let struct tee_pager_area span multiple translation tables
Extends struct tee_pager_area to be able to span multiple translation tables avoiding the need to split ranges into multiple areas in case a range crosses a translation table boundary.
Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey960) Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| edef052d | 30-Mar-2021 |
Clement Faure <clement.faure@nxp.com> |
core: ls: enable CAAM DH
Enabled CAAM DH algorithm for all LS platforms.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> |
| 10a688d8 | 30-Mar-2021 |
Clement Faure <clement.faure@nxp.com> |
core: imx: enable CAAM DH
Enable CAAM DH algorithm for all i.MX platforms.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> |
| ba7c81e9 | 30-Mar-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: implement NXP CAAM Driver - DH
Add DH CAAM driver.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carrier
drivers: caam: implement NXP CAAM Driver - DH
Add DH CAAM driver.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| f6e2b9e2 | 14-Jan-2020 |
Cedric Neveux <cedric.neveux@nxp.com> |
drivers: crypto: implement crypto driver - DH
Add a generic cryptographic DH driver interface connecting TEE Crypto generic APIs to HW driver interface
Signed-off-by: Cedric Neveux <cedric.neveux@n
drivers: crypto: implement crypto driver - DH
Add a generic cryptographic DH driver interface connecting TEE Crypto generic APIs to HW driver interface
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 30c13f9e | 30-Apr-2021 |
Ruchika Gupta <ruchika.gupta@linaro.org> |
Update CHANGELOG.md for 3.13.0
Update CHANGELOG for 3.13.0 and collect Tested-by tags.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> Tested-by: Clement Faure <clement.faure@nxp.com> (mx6d
Update CHANGELOG.md for 3.13.0
Update CHANGELOG for 3.13.0 and collect Tested-by tags.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> Tested-by: Clement Faure <clement.faure@nxp.com> (mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (mx8qxpmek) Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-ev1/dk2 gp pkcs11) Tested-by: Igor Opaniuk <igor.opaniuk@foundries.io> (Poplar) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (imx-mx8mqevk) Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey GP PKCS#11) Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey960 GP PKCS#11) Tested-by: Jerome Forissier <jerome@forissier.org> (QEMU GP PKCS#11) Tested-by: Jerome Forissier <jerome@forissier.org> (QEMUv8 GP PKCS#11) Tested-by: Joakim Bech <joakim.bech@linaro.org> (RPi3B) Tested-by: Ricardo Salveti <ricardo@foundries.io> (ZynqMP) Tested-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> (ccimx6ulsbcpro barebox upstream kernel) Tested-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> (imx6qsabrelite barebox upstream kernel) Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (RCAR M3) Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (RCAR M3/virtualization)
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| 4016b863 | 30-Mar-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: fix CMAC update operation
Fix an issue in the CMAC do_update() operation that would happen in the following conditions: * a data temporay buffer full (16 bytes). * an input message
drivers: caam: fix CMAC update operation
Fix an issue in the CMAC do_update() operation that would happen in the following conditions: * a data temporay buffer full (16 bytes). * an input message of 16 bytes.
These conditions would set the data size to be processed by the CAAM equals to zero. This would result on the loss of 16 bytes of the input message and a wrong CMAC.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 5c2de886 | 30-Mar-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: fix input data size for CMAC do_update()
Fix a corner case where the CAAM would try to allocate an input DMA object with a size of 0 bytes.
Signed-off-by: Cedric Neveux <cedric.neveu
drivers: caam: fix input data size for CMAC do_update()
Fix a corner case where the CAAM would try to allocate an input DMA object with a size of 0 bytes.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 0ae917ec | 05-Apr-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: enable SCMI PTA interface
Enable SCMI PTA for REE to interface SCMI services in a threaded context.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wikla
plat-stm32mp1: enable SCMI PTA interface
Enable SCMI PTA for REE to interface SCMI services in a threaded context.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b0a1c250 | 05-Apr-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: pta: scmi: new interface to REE SCMI agent
Adds a PTA interface to REE SCMI agents to get SCMI message communication channel for processing in OP-TEE SCMI server.
Currently implement supports
core: pta: scmi: new interface to REE SCMI agent
Adds a PTA interface to REE SCMI agents to get SCMI message communication channel for processing in OP-TEE SCMI server.
Currently implement supports for a SCMI server built with CFG_SCMI_MSG_SMT=y. The implementation is made so that an alternate SCMI server implementation can added.
Client gets SCMI channel capabilities with PTA_SCMI_CMD_CAPABILITIES. Client gets a handle for an SCMI channel with command PTA_SCMI_CMD_GET_CHANNEL_HANDLE. Client pushes SCMI messages with command PTA_SCMI_CMD_PROCESS_SMT_CHANNEL or PTA_SCMI_CMD_PROCESS_SMT_CHANNEL_MESSAGE.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3e530666 | 25-Apr-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: scmi-msg: introduce scmi_smt_channel_handle()
New API function for scmi-msg drivers: sub channel ID to handle conversion for consistency in SCMI PTA.
Signed-off-by: Etienne Carriere <etien
drivers: scmi-msg: introduce scmi_smt_channel_handle()
New API function for scmi-msg drivers: sub channel ID to handle conversion for consistency in SCMI PTA.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e687029d | 27-Apr-2021 |
Volodymyr Babchuk <volodymyr_babchuk@epam.com> |
plat: rcar: use new register_ddr() macro
As register_dynamic_shm() is being retired - switch to the new macro.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Volodymyr Babchuk
plat: rcar: use new register_ddr() macro
As register_dynamic_shm() is being retired - switch to the new macro.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
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| ad11fdb3 | 19-Mar-2021 |
Volodymyr Babchuk <volodymyr_babchuk@epam.com> |
plat: rcar m3: Add support for 8GB version
Add support for M3 SOC with 8GB of RAM. In this case memory is organized in two bank of 4GB. Renesas calls this variant 2x4g, so in OP-TEE we will have fla
plat: rcar m3: Add support for 8GB version
Add support for M3 SOC with 8GB of RAM. In this case memory is organized in two bank of 4GB. Renesas calls this variant 2x4g, so in OP-TEE we will have flavor salvator_m3_2x4g.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
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| c31a368d | 26-Mar-2021 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
libutee: include: fix typo in pta_invoke_tests.h
In PTA "invoke test", the AES performance test command takes as argument key size value as bits instead of bytes. Fix typo in comment.
Signed-off-by
libutee: include: fix typo in pta_invoke_tests.h
In PTA "invoke test", the AES performance test command takes as argument key size value as bits instead of bytes. Fix typo in comment.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d269f2ec | 25-Apr-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: fix plat_scmi_get_channel() against invalid IDs
Fix plat_scmi_get_channel() to safely return NULL when channel ID argument is invalid.
Signed-off-by: Etienne Carriere <etienne.carrie
plat-stm32mp1: fix plat_scmi_get_channel() against invalid IDs
Fix plat_scmi_get_channel() to safely return NULL when channel ID argument is invalid.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b104cf5a | 06-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: clock gating: atomic RCC registers access
Use io_{set|clr}bits32_stm32shregs() instead of io_{set|clr}bits32() for SoC clock registers that must be locked while updated.
Signed-off-b
plat-stm32mp1: clock gating: atomic RCC registers access
Use io_{set|clr}bits32_stm32shregs() instead of io_{set|clr}bits32() for SoC clock registers that must be locked while updated.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cef5035c | 09-Apr-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: disable BGET test
Disable BGET tests when pager is enabled since these can be very very lengthy when pager page pool is small relatively to the tested heap size.
Signed-off-by: Etien
plat-stm32mp1: disable BGET test
Disable BGET tests when pager is enabled since these can be very very lengthy when pager page pool is small relatively to the tested heap size.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| fe513722 | 22-Mar-2021 |
Jelle Sels <jelle.sels@arm.com> |
core: Add FFA_FEATURES handling for SPs
FFA_FEATURES is used to signal the supported FF-A features.
Signed-off-by: Jelle Sels <jelle.sels@arm.com> Acked-by: Etienne Carriere <etienne.carriere@linar
core: Add FFA_FEATURES handling for SPs
FFA_FEATURES is used to signal the supported FF-A features.
Signed-off-by: Jelle Sels <jelle.sels@arm.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 0a8fa27d | 22-Mar-2021 |
Jelle Sels <jelle.sels@arm.com> |
core: Add FFA_VERSION handling for SPs
FFA_VERSION return the current support FF-A version
Signed-off-by: Jelle Sels <jelle.sels@arm.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> |
| 82c617c7 | 22-Mar-2021 |
Jelle Sels <jelle.sels@arm.com> |
core: Add FFA_ID_GET handling for SPs
FFA_ID_GET returns the id of the calling SP.
Signed-off-by: Jelle Sels <jelle.sels@arm.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> |
| 36905f94 | 22-Apr-2021 |
Guido Vranken <guidovranken@gmail.com> |
libmbedtls: Use single-line string literals.
Signed-off-by: Guido Vranken <guidovranken@gmail.com> [Cherry-pick upstream commit 962e4ee4a6b3, add libmbedtls: prefix] Signed-off-by: Jerome Forissier
libmbedtls: Use single-line string literals.
Signed-off-by: Guido Vranken <guidovranken@gmail.com> [Cherry-pick upstream commit 962e4ee4a6b3, add libmbedtls: prefix] Signed-off-by: Jerome Forissier <jerome@forissier.org>
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| 77bdbf67 | 22-Apr-2021 |
Guido Vranken <guidovranken@gmail.com> |
libmbedtls: Prevent triggering Clang 12 -Wstring-concatenation warning
Wrap multi-line string literals in parentheses to prevent a Clang 12 -Wstring-concatenation warning (activated by -Wall), which
libmbedtls: Prevent triggering Clang 12 -Wstring-concatenation warning
Wrap multi-line string literals in parentheses to prevent a Clang 12 -Wstring-concatenation warning (activated by -Wall), which caused the build to fail.
Fixes https://github.com/ARMmbed/mbedtls/issues/3586
Signed-off-by: Guido Vranken <guidovranken@gmail.com> [Cherry-pick upstream commit 027fe00d2e32, add libmbedtls: prefix] Signed-off-by: Jerome Forissier <jerome@forissier.org>
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| 5aaab9c0 | 22-Apr-2021 |
Jerome Forissier <jerome@forissier.org> |
core: asm: use WEAK_FUNC rather than FUNC + .weak
Some functions are defined in assembler with the FUNC macro (which contains a .global directive) followed by a .weak directive to make them weak sym
core: asm: use WEAK_FUNC rather than FUNC + .weak
Some functions are defined in assembler with the FUNC macro (which contains a .global directive) followed by a .weak directive to make them weak symbols. While this works fine with GCC and Clang up to 11.0.0, Clang 12.0.0 emits a warning:
AS out/arm/core/arch/arm/kernel/misc_a32.o core/arch/arm/kernel/misc_a32.S:58:1: warning: get_core_pos_mpidr changed binding to STB_WEAK .weak get_core_pos_mpidr ^
Fix this by using the newly introduced WEAK_FUNC macro.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 44a8a0cf | 22-Apr-2021 |
Jerome Forissier <jerome@forissier.org> |
libutils: asm.S: introduce WEAK_FUNC
Adds a WEAK_FUNC macro which does the same as FUNC but defines a weak symbol rather than a global one.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Re
libutils: asm.S: introduce WEAK_FUNC
Adds a WEAK_FUNC macro which does the same as FUNC but defines a weak symbol rather than a global one.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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