History log of /optee_os/ (Results 3776 – 3800 of 8383)
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b50e1d8e07-Jul-2021 Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>

plat-totalcompute: define tzdram start address for S-EL1 SPMC config

Define TZDRAM_START for CFG_CORE_SEL1_SPMC config

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Reviewed-

plat-totalcompute: define tzdram start address for S-EL1 SPMC config

Define TZDRAM_START for CFG_CORE_SEL1_SPMC config

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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37e9518e07-Jul-2021 Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>

core: arm: Total Compute platform support

Initial support for Total Compute platform[1]
- defines tc0 platform configuration
- enables CFG_ARM64_core by default
- defines TZCDRAM_BASE

L

core: arm: Total Compute platform support

Initial support for Total Compute platform[1]
- defines tc0 platform configuration
- enables CFG_ARM64_core by default
- defines TZCDRAM_BASE

Link: [1] https://community.arm.com/developer/tools-software/oss-platforms/w/docs/606/total-compute

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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fbbf894413-Jul-2021 ZheTing <ztliu2652.cs@gmail.com>

core: mm: remove redundant mobj_put() in vm_map_pad()

When mobj_get_cattr() fails vm_map_pad() doesn't need to
call mobj_put() which is expected to balance mobj_get() called
only after mobj_get_catt

core: mm: remove redundant mobj_put() in vm_map_pad()

When mobj_get_cattr() fails vm_map_pad() doesn't need to
call mobj_put() which is expected to balance mobj_get() called
only after mobj_get_cattr() succeeds. The issue was introduced
in release 3.8.0 with struct mobj reference counting.

Signed-off-by: Gavin Liu <Gavin.Liu@mediatek.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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16a1c17809-Jul-2021 Jerome Forissier <jerome@forissier.org>

crypto: optimize speed of AES CBC MAC

The current AES CBC MAC implementation invokes the AES CBC algorithm via
crypto_cipher_update() for each 16-byte block of the input data. This
can be inefficien

crypto: optimize speed of AES CBC MAC

The current AES CBC MAC implementation invokes the AES CBC algorithm via
crypto_cipher_update() for each 16-byte block of the input data. This
can be inefficient especially with hardware accelerated implementations
which may have a significant overhead (I am thinking of proprietary
implementations of MBed TLS for example).

This commit introduces a new config option:
CFG_CRYPTO_CBC_MAC_BUNDLE_BLOCKS (default 64) which allows to bundle
several 16-byte blocks of input data when calling the AES CBC function.
Therefore with the default value, data are processed 1 KB at a time
(assuming the caller provides enough data of course). There is a small
memory overhead (malloc) of the same size at most.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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bd944eed19-Jul-2021 Jerome Forissier <jerome@forissier.org>

ci: azure: run 'git pull' to update repo tool before 'repo sync'

Update the repo tool to the latest commit on the 'stable' branch before
running 'repo sync' (the 'default' local branch tracks 'stabl

ci: azure: run 'git pull' to update repo tool before 'repo sync'

Update the repo tool to the latest commit on the 'stable' branch before
running 'repo sync' (the 'default' local branch tracks 'stable').
Fixes the following error [1]:

sudo -E bash -c "cd /root/optee_repo_qemu_v8 && repo sync -j 10"
project .repo/manifests/
Updating 7b69f4f..30fb9a8
Fast-forward

info: A new version of repo is available
warning: repo is not tracking a remote branch, so it will not receive updates
repo: Updating release signing keys to keyset ver 2.3
repo reset: error: Entry 'docs/manifest-format.md' not uptodate. Cannot merge.
fatal: Could not reset index file to revision 'v2.16.2^0'.

Link: [1] https://dev.azure.com/OPTEE/optee_os/_build/results?buildId=855&view=logs&j=705748f3-7146-5e86-79af-1c0266d20a8c&t=d3458a7d-1a81-5639-8e63-8927d807e53a&l=23
Signed-off-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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235834c428-Feb-2021 Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>

scripts: checkpatch_inc.sh: Add CHECKPATCH_OPT for optional arguments

Add new environment variable CHECKPATCH_OPT for configuring common optional
arguments.

In example newer codespell has moved dic

scripts: checkpatch_inc.sh: Add CHECKPATCH_OPT for optional arguments

Add new environment variable CHECKPATCH_OPT for configuring common optional
arguments.

In example newer codespell has moved dictionary to new location.

This allows one to use:

export CHECKPATCH=<path to linux kernel source>/scripts/checkpatch.pl
export CHECKPATCH_OPT=--codespellfile=/usr/lib/python3/dist-packages/codespell_lib/data/dictionary.txt

Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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d21befa530-Apr-2021 Jerome Forissier <jerome@forissier.org>

Update CHANGELOG.md for 3.14.0

Update CHANGELOG for 3.14.0 and collect Tested-by tags.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (

Update CHANGELOG.md for 3.14.0

Update CHANGELOG for 3.14.0 and collect Tested-by tags.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno)
Tested-by: Jerome Forissier <jerome@forissier.org> (hikey-hiKey960)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (imx-mx8mqevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1012A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1043A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1046A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1088A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS2088A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LX2160A-RDB)
Tested-by: Jerome Forissier <jerome@forissier.org> (vexpress-qemu_armv8a)
Tested-by: Jerome Forissier <jerome@forissier.org> (vexpress-qemu_virt)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek)
Tested-by: Sumit Garg <sumit.garg@linaro.org> (Developerbox)
Tested-by: Jerome Forissier <jerome@forissier.org> (hikey)
Tested-by: Victor Chong <victor.chong@linaro.org> (QEMUv8 AOSP)
Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (rcar-salvator_m3_2x4g)
Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (rcar-salvator_m3_2x4g / virt)
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2, pkcs11, gp)
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_ED1)
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_EV1)
Tested-by: Ricardo Salveti <ricardo@foundries.io> (ZynqMP)

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824d308515-Dec-2020 Franck LENORMAND <franck.lenormand@nxp.com>

core: plat-ls: ls1012a: Fix GIC offset

The GIC offset for LS1012A is different than the one for
LS1043A and LS1046A.
Fixing for LS1012A

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Si

core: plat-ls: ls1012a: Fix GIC offset

The GIC offset for LS1012A is different than the one for
LS1043A and LS1046A.
Fixing for LS1012A

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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df7e4e9609-Jul-2021 Jerome Forissier <jerome@forissier.org>

Update revision for release tag 3.14.0-rc1

Signed-off-by: Jerome Forissier <jerome@forissier.org>

f1e8880508-Jul-2021 Jerome Forissier <jerome@forissier.org>

Revert "libutee: TEE_MACCompareFinal(): panic if input size is too large"

This reverts commit dbb3274a60f0b258fe115ed1678fc569335c0c5d. It turns
out the panic reason cited in the commit ("If input d

Revert "libutee: TEE_MACCompareFinal(): panic if input size is too large"

This reverts commit dbb3274a60f0b258fe115ed1678fc569335c0c5d. It turns
out the panic reason cited in the commit ("If input data exceeds maximum
length for the algorithm") applies to the message only and has nothing
to do with macLen. The same sentence appears elsewhere in the spec where
there is no ambiguity.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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aeda1d5a08-Jul-2021 Etienne Carriere <etienne.carriere@linaro.org>

plat-stm32mp1: increase CFG_DTB_MAX_SIZE to 256KiB

On stm32mp1 platform the external DTB that may be passed by former
boot stage may overflow the default 64kB of CFG_DTB_MAX_SIZE hence
increase it t

plat-stm32mp1: increase CFG_DTB_MAX_SIZE to 256KiB

On stm32mp1 platform the external DTB that may be passed by former
boot stage may overflow the default 64kB of CFG_DTB_MAX_SIZE hence
increase it to 256kB which is reasonable for that platform.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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e77d27c401-Jul-2021 Etienne Carriere <etienne.carriere@linaro.org>

plat-stm32mp1: fix shres2str_state() prototype

Reported by GCC-10.2 when build plat-stm32mp1 with CFG_TEE_CORE_LOG_LEVEL=3.

core/arch/arm/plat-stm32mp1/shared_resources.c: In function ‘register_per

plat-stm32mp1: fix shres2str_state() prototype

Reported by GCC-10.2 when build plat-stm32mp1 with CFG_TEE_CORE_LOG_LEVEL=3.

core/arch/arm/plat-stm32mp1/shared_resources.c: In function ‘register_periph’:
core/arch/arm/plat-stm32mp1/shared_resources.c:212:24: warning: implicit conversion from ‘enum shres_state’ to ‘enum stm32mp_shres’ [-Wenum-conversion]
212 | shres2str_state(state));
| ^~~~~

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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dbb3274a07-Jul-2021 Jerome Forissier <jerome@forissier.org>

libutee: TEE_MACCompareFinal(): panic if input size is too large

The GlobalPlatform TEE Internal Core API specification mentions the
following panic reason for TEE_MACCompareFinal(): "if input data

libutee: TEE_MACCompareFinal(): panic if input size is too large

The GlobalPlatform TEE Internal Core API specification mentions the
following panic reason for TEE_MACCompareFinal(): "if input data exceeds
the maximum length for the algorithm". The current code returns
TEE_ERROR_MAC_INVALID instead. Fix this by assigning error code
TEE_ERROR_BAD_PARAMETERS which gets translated into a panic later.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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d0475d2f06-Jul-2021 Clement Faure <clement.faure@nxp.com>

core: imx: increase CFG_DTB_MAX_SIZE to 128KiB

On imx6q, imx6qp, imx6dl and imx7d platforms, we get the following error
at boot:

E/TC:0 0 init_external_dt:1099 Invalid Device Tree at 0x18000000: er

core: imx: increase CFG_DTB_MAX_SIZE to 128KiB

On imx6q, imx6qp, imx6dl and imx7d platforms, we get the following error
at boot:

E/TC:0 0 init_external_dt:1099 Invalid Device Tree at 0x18000000: error -3

i.MX device trees compiled with _symbols_ nodes makes DTB bigger than 56KiB.
Increase the CFG_DTB_MAX_SIZE from 56KiB to 128KiB for all imx6 and imx7
platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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f5c0739c22-Mar-2021 Ruchika Gupta <ruchika.gupta@linaro.org>

ta: pkcs11: Add access check on new object when deriving/unwrapping

Access check is also required on created attributes when
a new object is created when deriving/unwrapping keys.

Reviewed-by: Vesa

ta: pkcs11: Add access check on new object when deriving/unwrapping

Access check is also required on created attributes when
a new object is created when deriving/unwrapping keys.

Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>

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e3f0cb5605-Jul-2021 Ruchika Gupta <ruchika.gupta@linaro.org>

ta: pkcs11: Add support for indirect templates

Add support for handling indirect template - CKA_DERIVE_TEMPLATE
and CKA_UNWRAP_TEMPLATE during key derivation/unwrapping.

Reviewed-by: Vesa Jääskeläi

ta: pkcs11: Add support for indirect templates

Add support for handling indirect template - CKA_DERIVE_TEMPLATE
and CKA_UNWRAP_TEMPLATE during key derivation/unwrapping.

Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>

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3668310b05-Jul-2021 Ruchika Gupta <ruchika.gupta@linaro.org>

ta: pkcs11: Add implementation for unwrapping keys

Add implementation for handling C_UnwrapKey() for mechanisms :
CKM_AES_ECB
CKM_AES_CBC

Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.c

ta: pkcs11: Add implementation for unwrapping keys

Add implementation for handling C_UnwrapKey() for mechanisms :
CKM_AES_ECB
CKM_AES_CBC

Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>

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5f80f27025-Feb-2021 Ruchika Gupta <ruchika.gupta@linaro.org>

ta: pkcs11: Add implementation for wrapping keys

Add implementation for handling C_WrapKey() for mechanisms :
CKM_AES_ECB
CKM_AES_CBC

Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>

ta: pkcs11: Add implementation for wrapping keys

Add implementation for handling C_WrapKey() for mechanisms :
CKM_AES_ECB
CKM_AES_CBC

Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>

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06b47dc425-Feb-2021 Ruchika Gupta <ruchika.gupta@linaro.org>

ta: pkcs11: Add missing error codes

Some error codes related with wrap, unwrap and random number
API's were missing from the list. These have been added.

Reviewed-by: Vesa Jääskeläinen <vesa.jaaske

ta: pkcs11: Add missing error codes

Some error codes related with wrap, unwrap and random number
API's were missing from the list. These have been added.

Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>

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b603058524-Feb-2021 Ruchika Gupta <ruchika.gupta@linaro.org>

ta: pkcs11: Allocate command ID's for wrapping/unwrapping keys

Allocate command ID's for C_WrapKey() and C_UnwrapKey().

Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Reviewed-by: E

ta: pkcs11: Allocate command ID's for wrapping/unwrapping keys

Allocate command ID's for C_WrapKey() and C_UnwrapKey().

Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>

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e12b0e8622-Jan-2021 Anil Kumar Reddy <areddy3@marvell.com>

plat-marvell: Add support for OcteonTX2 CNF95xx and CN98xx

Add support for OcteonTX2 CNF95xx and CN98xx platforms
from Marvell.

Signed-off-by: Anil Kumar Reddy <areddy3@marvell.com>
Acked-by: Jerom

plat-marvell: Add support for OcteonTX2 CNF95xx and CN98xx

Add support for OcteonTX2 CNF95xx and CN98xx platforms
from Marvell.

Signed-off-by: Anil Kumar Reddy <areddy3@marvell.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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681a92d327-Oct-2020 Bharat Bhushan <bbhushan2@marvell.com>

plat-marvell: Add support for OcteonTX2 CN96xx SoC

Add support for OcteonTX2 CN96xx SoC from Marvell.

Only tested 64-bit mode with default configurations:

1. Build command
make PLATFORM=marvell-o

plat-marvell: Add support for OcteonTX2 CN96xx SoC

Add support for OcteonTX2 CN96xx SoC from Marvell.

Only tested 64-bit mode with default configurations:

1. Build command
make PLATFORM=marvell-otx2t96
2. Passed xtest

Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com>
Signed-off-by: Anil Kumar Reddy <areddy3@marvell.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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5729b44e06-Jul-2021 Devendra Devadiga <devendradevadiga01@gmail.com>

drivers: imx_i2c: support i2c4

Extend the driver functionality to support i2c4

Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: De

drivers: imx_i2c: support i2c4

Extend the driver functionality to support i2c4

Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Devendra Devadiga <devendradevadiga01@gmail.com>

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3d72b01206-Jul-2021 Devendra Devadiga <devendradevadiga01@gmail.com>

plat-imx: registers: i2c: support i2c4

Add required definitions to support i2c4

Reviewed-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: D

plat-imx: registers: i2c: support i2c4

Add required definitions to support i2c4

Reviewed-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Devendra Devadiga <devendradevadiga01@gmail.com>

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c29c538806-Jul-2021 Devendra Devadiga <devendradevadiga01@gmail.com>

drivers: imx_i2c: fix support for MX8MQ

Add missing config required to enable the support

Reviewed-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Devendra Devadiga <devendradevadiga01

drivers: imx_i2c: fix support for MX8MQ

Add missing config required to enable the support

Reviewed-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Devendra Devadiga <devendradevadiga01@gmail.com>

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