xref: /optee_os/core/arch/arm/plat-totalcompute/main.c (revision 37e9518efd62699a31cf51c09f4ef1f07b83f163)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (c) 2021, Arm Limited. All rights reserved.
4  */
5 
6 #include <arm.h>
7 #include <console.h>
8 #include <drivers/gic.h>
9 #include <drivers/pl011.h>
10 #include <initcall.h>
11 #include <kernel/boot.h>
12 #include <kernel/interrupt.h>
13 #include <kernel/misc.h>
14 #include <kernel/panic.h>
15 
16 #include <mm/core_mmu.h>
17 #include <platform_config.h>
18 
19 static struct gic_data gic_data __nex_bss;
20 static struct pl011_data console_data __nex_bss;
21 
22 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
23 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICD_BASE, GIC_DIST_REG_SIZE);
24 
25 register_ddr(DRAM0_BASE, DRAM0_SIZE);
26 
27 void main_init_gic(void)
28 {
29 	vaddr_t gicc_base;
30 
31 	gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET,
32 					  MEM_AREA_IO_SEC);
33 	if (!gicc_base)
34 		panic();
35 
36 	/*
37 	 * On ARMv8, GIC configuration is initialized in ARM-TF
38 	 * gicd base address is same as gicc_base.
39 	 */
40 	gic_init_base_addr(&gic_data, gicc_base, gicc_base);
41 	itr_init(&gic_data.chip);
42 }
43 
44 void itr_core_handler(void)
45 {
46 	gic_it_handle(&gic_data);
47 }
48 
49 void console_init(void)
50 {
51 	pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ,
52 		   CONSOLE_UART_BAUDRATE);
53 	register_serial_console(&console_data.chip);
54 }
55