drivers: clk: print tree without recursion

Remove recursive calls used in clk_print_tree() implementation using
list parsing algorithm to prevent uncontrolled stack overflows.

Print "-- No register

drivers: clk: print tree without recursion

Remove recursive calls used in clk_print_tree() implementation using
list parsing algorithm to prevent uncontrolled stack overflows.

Print "-- No registered clock" instead of nothing after
"Clock tree summary" trace message when there are no registered clocks.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Co-developed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: assert registered clock pointer is not NULL

Fix clk_register() assertion entry instruction to print an assertion
error message on NULL clock pointer instead of issuing a segmentation
f

drivers: clk: assert registered clock pointer is not NULL

Fix clk_register() assertion entry instruction to print an assertion
error message on NULL clock pointer instead of issuing a segmentation
fault.

Fixes: 2305544b3b9b ("drivers: clk: add generic clock framework")
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: clk_print_tree() stub for disabled CFG_DRIVERS_CLK

Add an stub implementation of clk_print_tree() when CFG_DRIVERS_CLK
is disabled. This allows generic code as the statistics PTA to no

drivers: clk: clk_print_tree() stub for disabled CFG_DRIVERS_CLK

Add an stub implementation of clk_print_tree() when CFG_DRIVERS_CLK
is disabled. This allows generic code as the statistics PTA to not
rely on #ifdef CFG_DRIVERS_CLK pragma.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: change queue from STAILQ to SLIST

Replace registered clock list from a STAILQ queue to a SLIST queue
that is enough for our purpose.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro

drivers: clk: change queue from STAILQ to SLIST

Replace registered clock list from a STAILQ queue to a SLIST queue
that is enough for our purpose.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-vexpress: donate a secure SGI to normal world

With OP-TEE acting as SPMC in S-EL1 donate a secure SGI to normal world
to be used to signal asynchronous notifications for FF-A.

Signed-off-by: J

plat-vexpress: donate a secure SGI to normal world

With OP-TEE acting as SPMC in S-EL1 donate a secure SGI to normal world
to be used to signal asynchronous notifications for FF-A.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: ffa: add notifications with SPMC at S-EL1

Adds support for asynchronous notifications via FF-A with SPMC at S-EL1.

The OP-TEE FF-A ABI is extended to report support for asynchronous
notificat

core: ffa: add notifications with SPMC at S-EL1

Adds support for asynchronous notifications via FF-A with SPMC at S-EL1.

The OP-TEE FF-A ABI is extended to report support for asynchronous
notifications during OPTEE_FFA_EXCHANGE_CAPABILITIES.

The SPMC at S-EL1 is extended to provide the FF-A notifications ABI to a
normal world VM.

The notifications depends on having a non-secure SGI interrupt ID
available to notify normal world that a notification is pending.
Notifications becomes available once platform code has called
thread_spmc_set_async_notif_intid() with a designed SGI ID.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: ffa: special treatment for FFA_ERROR

If FFA_ERROR is received print the error code. If the FFA_ERROR is from
the SPMC panic, else return back FFA_ERROR(FFA_NOT_SUPPORTED).

Signed-off-by: Jens

core: ffa: special treatment for FFA_ERROR

If FFA_ERROR is received print the error code. If the FFA_ERROR is from
the SPMC panic, else return back FFA_ERROR(FFA_NOT_SUPPORTED).

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: gic: add gic_init_donate_sgi_to_ns()

Adds gic_init_donate_sgi_to_ns() which changes a secure SGI to become
non-secure.

Secure world currently has a few SGIs to spare while normal world
typica

core: gic: add gic_init_donate_sgi_to_ns()

Adds gic_init_donate_sgi_to_ns() which changes a secure SGI to become
non-secure.

Secure world currently has a few SGIs to spare while normal world
typically have reserved each of the non-secure SGIs for different
purposes.

In case another non-secure SGI is needed secure world can donate one of
its unused SGIs. This configuration will then deviate from the standard
GIC configuration where SGI ID0-ID7 are non-secure and ID8-ID15 are
secure.

Platforms using gic_init_donate_sgi_to_ns() should also use
gic_init_per_cpu() instead of the deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-vexpress: use gic_init_per_cpu()

Calls gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere

plat-vexpress: use gic_init_per_cpu()

Calls gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: deprecate gic_cpu_init()

Deprecates gic_cpu_init() in favor of the new function
gic_init_per_cpu(). gic_cpu_init() is only supposed to be called by
secondary CPUs in non-TF-A configurations w

core: deprecate gic_cpu_init()

Deprecates gic_cpu_init() in favor of the new function
gic_init_per_cpu(). gic_cpu_init() is only supposed to be called by
secondary CPUs in non-TF-A configurations while gic_init_per_cpu()
should be called by all secondary CPUs. gic_init_per_cpu() itself takes
CFG_WITH_ARM_TRUSTED_FW into account instead of having each platform
doing that.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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qemu_armv8a: add GIC v3 redistributor base address

Adds and configures the GIC v3 redistributor base address.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <e

qemu_armv8a: add GIC v3 redistributor base address

Adds and configures the GIC v3 redistributor base address.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: gic: use redistributor CPU interface

GICv3 has a redistributor CPU interface that until now hasn't been used.
To prepare for coming patches that need to access the redistributor
initialize a l

core: gic: use redistributor CPU interface

GICv3 has a redistributor CPU interface that until now hasn't been used.
To prepare for coming patches that need to access the redistributor
initialize a list with each CPU specific redistributor address. A new
function gic_init_v3() is added with a parameter for the redistributor
base address.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: gic: check gic version

Adds a check to see that the version of the GIC matches the expected
version.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <e

core: gic: check gic version

Adds a check to see that the version of the GIC matches the expected
version.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: mobj_ffa.c: add reassuring comment in mobj_ffa_unregister_by_cookie()

Adds a reassuring comment in mobj_ffa_unregister_by_cookie() to explain
why it may fail if the cookie hasn't been used yet

core: mobj_ffa.c: add reassuring comment in mobj_ffa_unregister_by_cookie()

Adds a reassuring comment in mobj_ffa_unregister_by_cookie() to explain
why it may fail if the cookie hasn't been used yet. Updates the error
message to include inactive_refs.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: notif: remove interrupt assumptions

Removes the assumption in notif_register_driver() that OP-TEE is using
interrupts to notify the normal world. The coming FF-A based
implementation will use

core: notif: remove interrupt assumptions

Removes the assumption in notif_register_driver() that OP-TEE is using
interrupts to notify the normal world. The coming FF-A based
implementation will use FFA_NOTIFICATION_SET for when notifying using an
SPMC at S-EL2 or EL3.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: separate async notification implementation

Separates the implementation of sending asynchronous notifications from
the part managing reception of events. This makes room for an
alternative imp

core: separate async notification implementation

Separates the implementation of sending asynchronous notifications from
the part managing reception of events. This makes room for an
alternative implementation based on FF-A.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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qemu_armv8a: enable testing of notifications using the console

When asynchronous notifications are enabled the console driver in
qemu_armv8a is configured as a top half and bottom half driver allowi

qemu_armv8a: enable testing of notifications using the console

When asynchronous notifications are enabled the console driver in
qemu_armv8a is configured as a top half and bottom half driver allowing
basic testing of the notification framework.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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ci: enable CFG_DRIVERS_REGULATOR_PRINT_TREE for stm32mp1-135F_DK build

Enables CFG_DRIVERS_REGULATOR_PRINT_TREE when building stm32mp1-135F_DK.


Reviewed-by: Jens Wiklander <jens.wiklander@linaro.o

ci: enable CFG_DRIVERS_REGULATOR_PRINT_TREE for stm32mp1-135F_DK build

Enables CFG_DRIVERS_REGULATOR_PRINT_TREE when building stm32mp1-135F_DK.


Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: regulator: print regulator tree summary

Changes implementation of regulator_print_state() to better show
the regulator tree hierarchy and renames the function to
regulator_print_tree().

Th

drivers: regulator: print regulator tree summary

Changes implementation of regulator_print_state() to better show
the regulator tree hierarchy and renames the function to
regulator_print_tree().

The function now depends on CFG_DRIVERS_REGULATOR_PRINT_TREE
being enabled.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Co-developed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32mp15: harden RCC secure configuration on ST boards

Enable STM32MP15 RCC secure hardening configuration on ST boards
(DK1, DK2, ED1 and EV1) to assign SoC clocks, reset controllers
and PWR

dts: stm32mp15: harden RCC secure configuration on ST boards

Enable STM32MP15 RCC secure hardening configuration on ST boards
(DK1, DK2, ED1 and EV1) to assign SoC clocks, reset controllers
and PWR regulators to OP-TEE secure world.

This change removes setting of &rcc node status property from
stm32mp157a-dk1.dts, stm32mp157c-dk2.dts as the property is
set from stm32mp15xx-dkx.dtsi that is included from the 2 former
DTS files.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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arm: aspeed: Add cflags for AST2600 SoCs

AST2600 only supports VFPv3-D16, which should be speicifed by cflags
to prevent undef-abort due to unsupoorted instructions generated by
compilers.

Signed-o

arm: aspeed: Add cflags for AST2600 SoCs

AST2600 only supports VFPv3-D16, which should be speicifed by cflags
to prevent undef-abort due to unsupoorted instructions generated by
compilers.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Neal Liu <neal_liu@aspeedtech.com>

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drivers: regulator: fix getting GPIO for level control

Swap the 2 calls to find gpio property in "regulator-gpio" compatible
node. The call that expects to get a TEE_ERROR_ITEM_NOT_FOUND return
valu

drivers: regulator: fix getting GPIO for level control

Swap the 2 calls to find gpio property in "regulator-gpio" compatible
node. The call that expects to get a TEE_ERROR_ITEM_NOT_FOUND return
value (as described in the inline comment) for an unsupported 2nd level
control GPIO can fail with TEE_ERROR_DEFER_DRIVER_INIT return value
when the 1st GPIO phandle listed in the 'gpios' DT node property relates
to a GPIO driver that is not yet probed. Fix that by first getting the
required GPIO control level and then testing presence of other GPIO
phandle in the 'gpios' DT property.

Fixes: f164f0f83420 ("drivers: regulator: GPIO controlled regulator")
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: fix warning trace on TZC configuration check

Fix build warning reported by recent toolchains when TZDRAM
memory ends at the UINT32_MAX. This happends for example when
building for the

plat-stm32mp1: fix warning trace on TZC configuration check

Fix build warning reported by recent toolchains when TZDRAM
memory ends at the UINT32_MAX. This happends for example when
building for the stm32mp1-157C_EV1 platform. In such case was GCC
to emit the following warning trace:

core/arch/arm/plat-stm32mp1/plat_tzc400.c: In function ‘init_stm32mp1_tzc’:
core/arch/arm/plat-stm32mp1/plat_tzc400.c:107:61: warning: conversion from ‘uint64_t’ {aka ‘long long unsigned int’} to ‘vaddr_t’ {aka ‘long unsigned int’} changes value from ‘4294967296’ to ‘0’ [-Woverflow]
107 | if (!tzc_region_is_non_secure(region_index, tzdram_end,
| ^~~~~~~~~~

Fixes: 59c253f92c6c ("plat-stm32mp1: check TZC400 configuration")
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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ci.yml: adds a PLATFORM=d06 command

Add a _make PLATFORM=d06 command.

Signed-off-by: loubaihui <loubaihui1@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

core: drivers: fix random number reading errors in hisi_trng

Fixes arguments passed to IO_READ32_POLL_TIMEOUT() macro
and missing local variable definition in hisi_trng driver.

Fixes: fb5592f9cfeb

core: drivers: fix random number reading errors in hisi_trng

Fixes arguments passed to IO_READ32_POLL_TIMEOUT() macro
and missing local variable definition in hisi_trng driver.

Fixes: fb5592f9cfeb ("core: drivers: add HiSilicon TRNG implementation")
Signed-off-by: loubaihui <loubaihui1@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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