drivers: clk: change parent clock rate if needed

Add clock flag CLK_SET_RATE_PARENT for clocks for which rate change
request must be propagated to the parent clock.

Reviewed-by: Gatien Chevallier <

drivers: clk: change parent clock rate if needed

Add clock flag CLK_SET_RATE_PARENT for clocks for which rate change
request must be propagated to the parent clock.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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drivers: clk: Get duty cycle from parent clock

Add CLK_DUTY_CYCLE_PARENT clock flag for clock which duty cycle
information needs to be retrieved for the clock parent.

Reviewed-by: Gatien Chevallier

drivers: clk: Get duty cycle from parent clock

Add CLK_DUTY_CYCLE_PARENT clock flag for clock which duty cycle
information needs to be retrieved for the clock parent.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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drivers: clk: Add clock duty cycle

Implement reading a clock duty cycle with new clock API function
clk_get_duty_cycle() and clock operation handle ::clk_get_duty_cycle.
When a clock does not provid

drivers: clk: Add clock duty cycle

Implement reading a clock duty cycle with new clock API function
clk_get_duty_cycle() and clock operation handle ::clk_get_duty_cycle.
When a clock does not provide the operation, it is assumed that the clock
has a 50% duty cycle.

Clock duty cycle information is used for example for some analog-digital
conversion peripheral. This new API function is also expected to be used
by SCMI clock service introduced in the SCMI specification v3.2 [1]
this allow to expose duty cycle service to SCMI clients.

Link: https://developer.arm.com/documentation/den0056/e/ [1]
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp2: add pm support on stm32mp25

Add support of low power mode on stm32mp25 and perform the needed OP-TEE
bookkeeping before PSCI executes a power management sequence, with the 3
hooks cal

plat-stm32mp2: add pm support on stm32mp25

Add support of low power mode on stm32mp25 and perform the needed OP-TEE
bookkeeping before PSCI executes a power management sequence, with the 3
hooks called by TF-A SPD :
- thread_system_off_handler()
- thread_cpu_resume_handler()
- thread_cpu_suspend_handler()

On PSCI system off request, the STPMIC25 driver need to configure the
regulators properly to handle the always on domain with the board
configuration (PMIC switch OFF, with coin cell, or standby DDR off).

For PSCI suspend requests, the STM32MP25 family supports 5 power levels
in the PSCI topology to handle the regulators configuration done in STPMIC2
for low poser modes, in particular to differentiate the tension for LP and
the LPLV modes:

power level (System mode for a0= Max power level powered down)
--------------------------------------------------------------------------
0: CPU1 core#0 or core#1 (Stop1 or LP-Stop1)
1: D1 domain (LPLV-Stop1)
2: LPLV D1 (Stop2 or LP-Stop2)
3: D2 (LPLV-Stop2)
4: LPLV D2 (Standby)
5: MAX (PowerOff: Standby or VBat)

The hook calls pm_change_state with generic HINT for inform STM32MP25
drivers to operation to performed on suspend/resume:
- PM_HINT_CLOCK_STATE
the IP clock will be deactivated, the pending operation should stop,
cleanup operation can be done on HW to prepare the clock freeze
(optional support by driver)
- PM_HINT_CONTEXT_STATE
called for System level standby when the IP configuration is lost.
The state of each device must be saved in RAM which is preserved
(DDR in self-refresh, mandatory)

Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

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core: pm: add macro for PM_HINT_STATE access

Add helper macros to read and test the power state hints provided by
the platform during power management state transitions.

Reviewed-by: Etienne Carrie

core: pm: add macro for PM_HINT_STATE access

Add helper macros to read and test the power state hints provided by
the platform during power management state transitions.

Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

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plat-sam: fix static shared memory address and size

Disable the dynamic shared memory allocation that isn't used on SAM
platforms, otherwise the following issue occurs, since the commit
8a6ca1480ddc

plat-sam: fix static shared memory address and size

Disable the dynamic shared memory allocation that isn't used on SAM
platforms, otherwise the following issue occurs, since the commit
8a6ca1480ddc ("core: arm: get DDR range from embedded DTB"):

I/TC: Embedded DTB found
E/TC:0 0 check_phys_mem_is_outside:409 Non-sec mem (0x20800000:0x1f800000) overlaps map (type 18 0x21400000:0x1000)
E/TC:0 0 Panic at core/mm/core_mmu.c:413 <check_phys_mem_is_outside>
E/TC:0 0 TEE load address @ 0x20000000
E/TC:0 0 Call stack:
E/TC:0 0 0x20005655 print_kernel_stack at core/arch/arm/kernel/unwind_arm32.c:109
E/TC:0 0 0x2001c52d __do_panic at core/kernel/panic.c:80
E/TC:0 0 0x200276c1 check_phys_mem_is_outside at core/mm/core_mmu.c:413
E/TC:0 0 0x2002780f core_mmu_set_discovered_nsec_ddr at core/mm/core_mmu.c:481
E/TC:0 0 0x200050b3 discover_nsec_memory at core/arch/arm/kernel/boot.c:1055
E/TC:0 0 0x20005247 boot_init_primary_late at core/arch/arm/kernel/boot.c:1210
E/TC:0 0 0x200001fc reset_primary at core/arch/arm/kernel/entry_a32.S:532

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-mediatek: add support for MT7988 SoC

Add OP-TEE support for the MT7988 SoC.

Signed-off-by: guan-gm.lin <guan-gm.lin@mediatek.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by:

plat-mediatek: add support for MT7988 SoC

Add OP-TEE support for the MT7988 SoC.

Signed-off-by: guan-gm.lin <guan-gm.lin@mediatek.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: add PLL clock driver for sama7g5

As PLL is compatible for sama7g5 and sam9x60, add sam9x60 PLL functions for
configuring sama7g5 PLL.

Signed-off-by: Tony Han <tony.han@microchip.

drivers: clk: sam: add PLL clock driver for sama7g5

As PLL is compatible for sama7g5 and sam9x60, add sam9x60 PLL functions for
configuring sama7g5 PLL.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: update to support generic clock for sama7g5

Add a mux table for select from different generic clock source.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Fori

drivers: clk: sam: update to support generic clock for sama7g5

Add a mux table for select from different generic clock source.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: update to support main system bus clock for sama7g5

Add functions for configuring sama7g5 main system bus clock.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome

drivers: clk: sam: update to support main system bus clock for sama7g5

Add functions for configuring sama7g5 main system bus clock.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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.gitignore: Ignore all dot files and folders except the standard ones

Improve the gitignore to handle dot files and dot folders that are
created by most of development tools, such as IDEs.

This pat

.gitignore: Ignore all dot files and folders except the standard ones

Improve the gitignore to handle dot files and dot folders that are
created by most of development tools, such as IDEs.

This patch allows OPTEE-OS developers to store their specific tool
configurations under dot files or folders and not be bothered by the output
of the git status command.

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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.gitignore: Change entries to only ignore in the source root folder

Previously, each gitignore entry was ignored all across the project.
This patch allows to ignore only entries that are in the sour

.gitignore: Change entries to only ignore in the source root folder

Previously, each gitignore entry was ignored all across the project.
This patch allows to ignore only entries that are in the source root
folder, except for editor's swap files.

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: arm: kernel: add runtime check for CE

Add runtime check during boot for supported ARMv8 Crypto Extensions.
Core will panic if configuration enables an ARMv8 CE feature
that the hardware does n

core: arm: kernel: add runtime check for CE

Add runtime check during boot for supported ARMv8 Crypto Extensions.
Core will panic if configuration enables an ARMv8 CE feature
that the hardware does not support.

Link: https://github.com/OP-TEE/optee_os/issues/6631
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: arm: add helper functions for checking CE support

Add helper functions for checking implementation of SHA1, SHA256,
SHA512, SHA3, SM3, SM4 instructions.

Acked-by: Etienne Carriere <etienne.ca

core: arm: add helper functions for checking CE support

Add helper functions for checking implementation of SHA1, SHA256,
SHA512, SHA3, SM3, SM4 instructions.

Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: arm: add check in aarch32 for feat_crc32_implemented()

Add support for checking CRC32 HW instruction in aarch32.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wik

core: arm: add check in aarch32 for feat_crc32_implemented()

Add support for checking CRC32 HW instruction in aarch32.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: arm64: remove ID_AA64ISAR0_EL1 macros

Remove old definitions for ID_AA64ISAR0_EL1 CRC32 bitmask
and shift.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander

core: arm64: remove ID_AA64ISAR0_EL1 macros

Remove old definitions for ID_AA64ISAR0_EL1 CRC32 bitmask
and shift.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: arm: rewrite feat_crc32_implemented()

Rewrite check in feat_crc32_implementedfor for ARM64.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklande

core: arm: rewrite feat_crc32_implemented()

Rewrite check in feat_crc32_implementedfor for ARM64.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: arm64: add masks for ID_AA64ISAR0_EL1 fields

Add masks for obtaining Crypto Extensions support status from
ID_AA64ISAR0_EL1 register:

Algo Bits
SM4 - [43:40]
SM3 - [39:36]
SHA

core: arm64: add masks for ID_AA64ISAR0_EL1 fields

Add masks for obtaining Crypto Extensions support status from
ID_AA64ISAR0_EL1 register:

Algo Bits
SM4 - [43:40]
SM3 - [39:36]
SHA3 - [35:32]
RDM - [31:28]
TME - [27:24]
Atomic - [23:20]
CRC32 - [19:16]
SHA2 - [15:12]
SHA1 - [11:8]
AES - [7:4]

For additional details check ARM Architecture Reference Manual
for ARMv8-A architecture profile.
ID_AA64ISAR0_EL1, AArch64 Instruction Set Attribute Register 0.

Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: arm: add masks for ID_ISAR5_EL1 fields

Add masks for obtaining Crypto Extensions support status from
ID_ISAR5_EL1 register:

Algo Bits
CRC32 - [19:16]
SHA2 - [15:12]
SHA1 - [1

core: arm: add masks for ID_ISAR5_EL1 fields

Add masks for obtaining Crypto Extensions support status from
ID_ISAR5_EL1 register:

Algo Bits
CRC32 - [19:16]
SHA2 - [15:12]
SHA1 - [11:8]
AES - [7:4]

For additional details check ARM Architecture Reference Manual
for ARMv8-A architecture profile.
D10.2.66 ID_ISAR5_EL1, AArch32 Instruction Set Attribute Register 5

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: virt, ffa: keep guest partition until resources are reclaimed

Move a struct guest_partition to prtn_destroy_list if there are
resources remaining to be reclaimed by the hypervisor. Currently t

core: virt, ffa: keep guest partition until resources are reclaimed

Move a struct guest_partition to prtn_destroy_list if there are
resources remaining to be reclaimed by the hypervisor. Currently this is
needed with FF-A and SPMC at S-EL1.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: ffa: store shm_bits in partition for SPMC at S-EL1

Store the bitmask keeping track of allocated shared memory handles in
the current partition when configured with CFG_NS_VIRTUALIZATION and
CF

core: ffa: store shm_bits in partition for SPMC at S-EL1

Store the bitmask keeping track of allocated shared memory handles in
the current partition when configured with CFG_NS_VIRTUALIZATION and
CFG_CORE_SEL1_SPMC.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: ffa: add SPMC_CORE_SEL1_MAX_SHM_COUNT

Add SPMC_CORE_SEL1_MAX_SHM_COUNT, telling how many shared memory object
are supported in a configuration with SPMC at S-EL1.

Signed-off-by: Jens Wiklande

core: ffa: add SPMC_CORE_SEL1_MAX_SHM_COUNT

Add SPMC_CORE_SEL1_MAX_SHM_COUNT, telling how many shared memory object
are supported in a configuration with SPMC at S-EL1.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: thread_spmc.c: add set_simple_ret_val()

Simplify common FFA_ERRROR/FFA_SUCCESS_32 patterns where an error code
is returned on error or FFA_SUCCESS_32 without further values are used
on success

core: thread_spmc.c: add set_simple_ret_val()

Simplify common FFA_ERRROR/FFA_SUCCESS_32 patterns where an error code
is returned on error or FFA_SUCCESS_32 without further values are used
on success.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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ci: add RISC-V build (rv64, PLATFORM=virt)

Add a 64-bit build of OP-TEE for the RISC-V architecture.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienn

ci: add RISC-V build (rv64, PLATFORM=virt)

Add a 64-bit build of OP-TEE for the RISC-V architecture.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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mk/lib.mk: add library to link line only when it does contain objects

This commit addresses a build issue when the output directory is not
cleaned from a previous build. Here is a test case:

# Sta

mk/lib.mk: add library to link line only when it does contain objects

This commit addresses a build issue when the output directory is not
cleaned from a previous build. Here is a test case:

# Start from a clean state
$ rm -rf ./out
# (1) Build for Arm, with unwinding enabled
$ make -s -j$(nproc) ARCH=arm PLATFORM=vexpress-qemu_armv8a O=out CFG_UNWIND=y && echo OK
OK
# (2) Build for RISC-V, with unwinding enabled too
$ make -s -j$(nproc) ARCH=riscv PLATFORM=virt O=out CFG_UNWIND=y && echo OK
OK
# (3) Build for Arm again but with unwinding disabled
$ make -s -j$(nproc) ARCH=arm PLATFORM=vexpress-qemu_armv8a O=out CFG_UNWIND=n
aarch64-linux-gnu-ld.bfd: skipping incompatible out/ldelf-lib/libunw/libunw.a when searching for -lunw
aarch64-linux-gnu-ld.bfd: cannot find -lunw: No such file or directory
make: *** [ldelf/link.mk:60: out/ldelf/ldelf.elf] Error 1
make: *** Waiting for unfinished jobs....

In step (3), the libunw.a file leftover from step (2) causes a problem
because it is not generated again for the current ARCH (due to
CFG_UNWIND=n, so there is effectively nothing to build). Yet it is
unconditionally added to the link line by mk/lib.mk although
CFG_UNWIND=n. Therefore change the logic in mk/lib.mk to deal with that.

Step (2) causes no error because due to CFG_UNWIND=y and due to
dependencies (different source files, different cross compiler), the
archive file is re-created.

Note that it is not OK to simply guard the inclusion of mk/lib.mk with
CFG_UNWIND in core/core.mk and ldelf/ldelf.mk because we still want
the library headers to be accessible (no conditionals on #include <...>).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...