riscv: sbi_console: remove unneeded #ifdef CFG_RISCV_SBI_CONSOLE

sbi_console.c has been assigned conditionally based on
CFG_RISCV_SBI_CONSOLE in sub.mk. Remove the #ifdef preprocessor
directive.

Si

riscv: sbi_console: remove unneeded #ifdef CFG_RISCV_SBI_CONSOLE

sbi_console.c has been assigned conditionally based on
CFG_RISCV_SBI_CONSOLE in sub.mk. Remove the #ifdef preprocessor
directive.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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riscv: sbi_console: split FID 0 from SBI_EXT_0_1_CONSOLE_PUTCHAR

Split FID 0 from SBI_EXT_0_1_CONSOLE_PUTCHAR definition for better
readability. Also, provide a function description.

Signed-off-by:

riscv: sbi_console: split FID 0 from SBI_EXT_0_1_CONSOLE_PUTCHAR

Split FID 0 from SBI_EXT_0_1_CONSOLE_PUTCHAR definition for better
readability. Also, provide a function description.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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riscv: sbi: minor cleanup for SBI HSM related definitions

Rename sbi_boot_hart() to sbi_hsm_hart_start() and use enumerated
type for function ID definition for better clarity and consistency
with th

riscv: sbi: minor cleanup for SBI HSM related definitions

Rename sbi_boot_hart() to sbi_hsm_hart_start() and use enumerated
type for function ID definition for better clarity and consistency
with the following commits.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: at91: add device trees for sama7g54_ek

Add the header file for pin definitions.
Add dtsi & dts files for sama7g54_ek.

Signed-off-by: Tony Han <tony.han@microchip.com>
[TP: Update device trees

dts: at91: add device trees for sama7g54_ek

Add the header file for pin definitions.
Add dtsi & dts files for sama7g54_ek.

Signed-off-by: Tony Han <tony.han@microchip.com>
[TP: Update device trees for sama7g54_ek according kernel dtsi and
dts files for the sama7g54_ek.]
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: clk: sam: skip the NULL clocks when getting the clock by name

Skip the NULL items in the clock array when getting the clock by its name.

Signed-off-by: Tony Han <tony.han@microchip.com>
Ac

drivers: clk: sam: skip the NULL clocks when getting the clock by name

Skip the NULL items in the clock array when getting the clock by its name.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: clk: sam: add sama7g5 clock description

Define PLL, master, system, peripheral, generic clocks for sama7g5 and
register the clocks to clock provider.

Signed-off-by: Tony Han <tony.han@micr

drivers: clk: sam: add sama7g5 clock description

Define PLL, master, system, peripheral, generic clocks for sama7g5 and
register the clocks to clock provider.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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dts: sama5d2: add huk node for the NVMEM hardware unique key

Add the definition of the NVMEM HUK controller in the sama5d2
device tree.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acke

dts: sama5d2: add huk node for the NVMEM hardware unique key

Add the definition of the NVMEM HUK controller in the sama5d2
device tree.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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dts: sama5d2: add NVMEM die_id node

Add the definition of the NVMEM die id controller in the sama5d2
device tree.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier

dts: sama5d2: add NVMEM die_id node

Add the definition of the NVMEM die id controller in the sama5d2
device tree.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-sam: enable NVMEM unique hardware key and die id support

Enable NVMEM support to allow reading hardware unique key from
the fuses.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Sign

plat-sam: enable NVMEM unique hardware key and die id support

Enable NVMEM support to allow reading hardware unique key from
the fuses.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: nvmem: add nvmem-huk driver

This driver is meant to read the OTP unique hardware key from a
NVMEM controller. It uses the nvmem framework to read the NVMEM
cells from the device tree.

Sign

drivers: nvmem: add nvmem-huk driver

This driver is meant to read the OTP unique hardware key from a
NVMEM controller. It uses the nvmem framework to read the NVMEM
cells from the device tree.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: nvmem: add nvmem-die-id driver

This driver is meant to read the die id from a NVMEM controller.
It uses the nvmem framework to read the NVMEM cells from the
device tree.

Signed-off-by: Tho

drivers: nvmem: add nvmem-die-id driver

This driver is meant to read the die id from a NVMEM controller.
It uses the nvmem framework to read the NVMEM cells from the
device tree.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: Implement semihosting based console driver for log

Implement a simple console driver which uses semihosting operations to
read/write the trace messages. There are two paths to output the tr

drivers: Implement semihosting based console driver for log

Implement a simple console driver which uses semihosting operations to
read/write the trace messages. There are two paths to output the trace
messages:
- If the caller of semihosting_console_init() provides the path of the
file, the driver will try to open that file, and output the log to
that host side file.
- If the caller of semihosting_console_init() does not provide the path
of the file, the driver will connect the console to the host debug
console directly.

If CFG_SEMIHOSTING_CONSOLE is enabled, OP-TEE will try to initialize the
semihosting console driver by given CFG_SEMIHOSTING_CONSOLE_FILE.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: Refactor console_init() and introduce plat_console_init()

Since there are some cross-platform console drivers, we let
console_init() be common code to have a chance to initialize those
console

core: Refactor console_init() and introduce plat_console_init()

Since there are some cross-platform console drivers, we let
console_init() be common code to have a chance to initialize those
console drivers (e.g., semihosting console).

If the cross-platform console drivers are not configured to be compiled,
plat_console_init() will be invoked to initialize platform-specific
console driver.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: riscv: Add semihosting.S for semihosting instructions

RISC-V architecture has defined the semihosting binary interface, which
consists of a special trap instruction sequence, in:
https://githu

core: riscv: Add semihosting.S for semihosting instructions

RISC-V architecture has defined the semihosting binary interface, which
consists of a special trap instruction sequence, in:
https://github.com/riscv-non-isa/riscv-semihosting

Add semihosting.S into RISC-V kernel folder to implement the trap
instruction sequence.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: kernel: Add semihosting functions

Semihosting is a mechanism that enables target to communicate and use
I/O facilities on a host computer which is running a debugger, such as
GDB. The I/O faci

core: kernel: Add semihosting functions

Semihosting is a mechanism that enables target to communicate and use
I/O facilities on a host computer which is running a debugger, such as
GDB. The I/O facilities include character {read|write} {from|to} the
semihosting host side console or a file. In other words, OP-TEE OS can
output log to the host side console or the host side file, if there is a
semihosting host and OP-TEE OS requests the semihosting operations to
that host.

If CFG_SEMIHOSTING is enabled, some semihosting functions will be
compiled into OP-TEE kernel, including:
- semihosting_sys_readc()
- semihosting_sys_writec()
- semihosting_open()
- semihosting_read()
- semihosting_write()
- semihosting_close()

Note that the architectures which support semihosting should provide
their implementation of __do_semihosting(), which performs semihosting
instruction to raise the semihosting request.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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libutils: Import part of sys/fcntl.h

Import part of sys/fcntl.h for necessary file flags, from newlib:
- newlib/newlib/libc/include/sys/fcntl.h

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Ac

libutils: Import part of sys/fcntl.h

Import part of sys/fcntl.h for necessary file flags, from newlib:
- newlib/newlib/libc/include/sys/fcntl.h

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-sam: implement plat_get_freq() for sama7g5

Sama7g5 platform does not have support for the ARM generic timer
extension, so plat_get_freq() needs to be updated to be able to
probe clocks early us

plat-sam: implement plat_get_freq() for sama7g5

Sama7g5 platform does not have support for the ARM generic timer
extension, so plat_get_freq() needs to be updated to be able to
probe clocks early using the device tree as for the sama5d2.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-sam: register additional sama7g5 clocks for SCMI usage

- Add the macro definitions for each SCMI clock.
- Add the table of PMC-SCMI map for sama7g5 clocks.

Signed-off-by: Thomas Perrot <thomas

plat-sam: register additional sama7g5 clocks for SCMI usage

- Add the macro definitions for each SCMI clock.
- Add the table of PMC-SCMI map for sama7g5 clocks.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-sam: register sama7g5 clocks for SCMI usage

Add the macro definitions for each SCMI clock.
Add the table of PMC-SCMI map for sama7g5 clocks.

Signed-off-by: Tony Han <tony.han@microchip.com>
Ac

plat-sam: register sama7g5 clocks for SCMI usage

Add the macro definitions for each SCMI clock.
Add the table of PMC-SCMI map for sama7g5 clocks.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: clk: make API function description more consistent

Change inline description comments of clock framework API functions,
macros and structures to be more consistent.

Reviewed-by: Gatien Che

drivers: clk: make API function description more consistent

Change inline description comments of clock framework API functions,
macros and structures to be more consistent.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: get stm32mp13 PLL output clock duty cycle

Implement get_duty_cycle clock operation for STM32MP13 PLL output clocks.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Sign

drivers: clk: get stm32mp13 PLL output clock duty cycle

Implement get_duty_cycle clock operation for STM32MP13 PLL output clocks.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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drivers: clk: set stm32mp13 clock flags

On STM32MP13 SoC, setting PLL1P, PLL1P_DIV, MPU, AXI and MLAHB clocks
rate must be handled from their respective parent clock. Set flag
CLK_SET_RATE_PARENT fo

drivers: clk: set stm32mp13 clock flags

On STM32MP13 SoC, setting PLL1P, PLL1P_DIV, MPU, AXI and MLAHB clocks
rate must be handled from their respective parent clock. Set flag
CLK_SET_RATE_PARENT for these clocks.

On STM32MP13 SoC, MPU, AXI and MLAHB clocks are internal bus clocks
that must not be disabled even when we re-parent them. Set flag
CLK_SET_PARENT_PRE_ENABLE for these clocks.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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drivers: clk: pre-enable new parent on clock re-parent

Add new clock flag CLK_SET_PARENT_PRE_ENABLE for when an already
enabled clock is re-parented and the new parent clock must be enabled
before w

drivers: clk: pre-enable new parent on clock re-parent

Add new clock flag CLK_SET_PARENT_PRE_ENABLE for when an already
enabled clock is re-parented and the new parent clock must be enabled
before we switch of parents.

This is needed for some system clocks that cannot be disabled, for
example an interconnect AXI bus clock or a CPU clock.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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drivers: clk: get linear rates description

Implement clk_get_rates_steps() clock API function to get the supported
clock rates description as a triplet min/max/step. This function can be
used in the

drivers: clk: get linear rates description

Implement clk_get_rates_steps() clock API function to get the supported
clock rates description as a triplet min/max/step. This function can be
used in the scope of SCMI communication where a clock can report a
linear rate list without listing all supported clock is an array
which size could be quite big.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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drivers: clk: enable clock on rate change

Add new clock flag CLK_SET_RATE_UNGATE for clocks that must be
enabled in order to change their rate.

Reviewed-by: Gatien Chevallier <gatien.chevallier@fos

drivers: clk: enable clock on rate change

Add new clock flag CLK_SET_RATE_UNGATE for clocks that must be
enabled in order to change their rate.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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