| #
f8388fdc |
| 19-Sep-2023 |
Clement Faure <clement.faure@nxp.com> |
core: move CFG_CORE_BIGNUM_MAX_BITS default definition
Move CFG_CORE_BIGNUM_MAX_BITS definition to mk/crypto.mk to allow crypto drivers to override the default value.
Signed-off-by: Clement Faure <
core: move CFG_CORE_BIGNUM_MAX_BITS default definition
Move CFG_CORE_BIGNUM_MAX_BITS definition to mk/crypto.mk to allow crypto drivers to override the default value.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
ad194957 |
| 13-Oct-2023 |
Yi Chou <yich@google.com> |
core: pta: widevine: Add the init implementation
On the new ChromeOS mediatek platform, we will use the device tree to pass hardware unique key and the parameters for widevine TAs.
Signed-off-by: Y
core: pta: widevine: Add the init implementation
On the new ChromeOS mediatek platform, we will use the device tree to pass hardware unique key and the parameters for widevine TAs.
Signed-off-by: Yi Chou <yich@google.com> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
show more ...
|
| #
18b424c2 |
| 19-Jan-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
Update CHANGELOG for 4.1.0
Update CHANGELOG for 4.1.0 and collect Tested-by tags.
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (rockchip-rk3399) (Rockpi4B) Tested-by: Jerome Forissier
Update CHANGELOG for 4.1.0
Update CHANGELOG for 4.1.0 and collect Tested-by tags.
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (rockchip-rk3399) (Rockpi4B) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_virt) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_armv8a) Tested-by: Joakim Bech <joakim.bech@linaro.org> (RPi 3B v1.2) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (imx-mx8mqevk) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey + GP) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP) Tested-by: Igor Opaniuk <igor.opaniuk@foundries.io> (Poplar) Tested-by: Jorge Ramirez-Ortiz <jorge@foundries.io> (versal) Tested-by: Sumit Garg <sumit.garg@linaro.org> (vexpress-qemu_armv8a) (Rust 64-bit TAs) Tested-by: Sumit Garg <sumit.garg@linaro.org> (vexpress-qemu_armv8a) (Rust 32-bit TAs) Tested-by: Ricardo Salveti <ricardo@foundries.io> (ZynqMP) Tested-by: Ricardo Salveti <ricardo@foundries.io> (k3-am62x) Tested-by: Ricardo Salveti <ricardo@foundries.io> (k3-am64x) Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (rcar-salvator_m3_2x4g / virt) Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (rcar-salvator_m3_2x4g) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sxsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx93evk) Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-135F_DK) Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_DK2_SCMI) Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_EV1_SCMI) Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_DK2) Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_EV1) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
515c1ba9 |
| 22-Mar-2023 |
Clément Léger <clement.leger@bootlin.com> |
drivers: nvmem: add API for nvmem controllers
Add a nvmem API to access nvmem cells using device-tree description. This API allows to register nvmeme provider and obtain nvmem cells for consumer. Mu
drivers: nvmem: add API for nvmem controllers
Add a nvmem API to access nvmem cells using device-tree description. This API allows to register nvmeme provider and obtain nvmem cells for consumer. Much like other subsystem, this one relies on the generic dt_driver mechanism.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
f6c57ea4 |
| 06-Jul-2022 |
Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> |
pta: stm32mp: add new remoteproc PTA
Add remoteproc PTA for the stm32mp1 platform. The PTA relies on the stm32_remoteproc driver for the remoteproc management. It is charge of providing interface fo
pta: stm32mp: add new remoteproc PTA
Add remoteproc PTA for the stm32mp1 platform. The PTA relies on the stm32_remoteproc driver for the remoteproc management. It is charge of providing interface for authenticating firmware images and managing the remote processor live cycle.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
show more ...
|
| #
5a2d2237 |
| 07-Sep-2023 |
Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> |
drivers: Add stm32mp1 remoteproc driver
This driver is responsible for configuring the registers and memories of the remote processor. - It stores information about memories assigned to the remote p
drivers: Add stm32mp1 remoteproc driver
This driver is responsible for configuring the registers and memories of the remote processor. - It stores information about memories assigned to the remote processor based on the device tree. - It ensures consistency between the registered memory and the addresses of the firmware segments to be loaded. - Additionally, it is responsible for starting and stopping the remote processor core.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
show more ...
|
| #
1d129697 |
| 13-Dec-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add CFG_AUTO_MAX_PA_BITS
Add the configuration variable CFG_AUTO_MAX_PA_BITS that enables automatic discovery of maximal PA supported by the hardware.
Signed-off-by: Jens Wiklander <jens.wikl
core: add CFG_AUTO_MAX_PA_BITS
Add the configuration variable CFG_AUTO_MAX_PA_BITS that enables automatic discovery of maximal PA supported by the hardware.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
397d66f8 |
| 30-Nov-2023 |
Raymond Mao <raymond.mao@linaro.org> |
mk: config: add comment for CFG_TRANSFER_LIST
Mark CFG_TRANSFER_LIST as an experimental feature until Firmware Handoff specification has a stable release.
Signed-off-by: Raymond Mao <raymond.mao@li
mk: config: add comment for CFG_TRANSFER_LIST
Mark CFG_TRANSFER_LIST as an experimental feature until Firmware Handoff specification has a stable release.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
2e02a737 |
| 23-Oct-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: add notifications with SPMC at S-EL1
Adds support for asynchronous notifications via FF-A with SPMC at S-EL1.
The OP-TEE FF-A ABI is extended to report support for asynchronous notificat
core: ffa: add notifications with SPMC at S-EL1
Adds support for asynchronous notifications via FF-A with SPMC at S-EL1.
The OP-TEE FF-A ABI is extended to report support for asynchronous notifications during OPTEE_FFA_EXCHANGE_CAPABILITIES.
The SPMC at S-EL1 is extended to provide the FF-A notifications ABI to a normal world VM.
The notifications depends on having a non-secure SGI interrupt ID available to notify normal world that a notification is pending. Notifications becomes available once platform code has called thread_spmc_set_async_notif_intid() with a designed SGI ID.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
c4292779 |
| 21-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: regulator: print regulator tree summary
Changes implementation of regulator_print_state() to better show the regulator tree hierarchy and renames the function to regulator_print_tree().
Th
drivers: regulator: print regulator tree summary
Changes implementation of regulator_print_state() to better show the regulator tree hierarchy and renames the function to regulator_print_tree().
The function now depends on CFG_DRIVERS_REGULATOR_PRINT_TREE being enabled.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Co-developed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
cd04d138 |
| 17-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: clk: print clock tree summary
Adds clk_print_summary() to print the clock tree current state on core console using the info trace level. Clock framework spinlock is help while clock tree is
drivers: clk: print clock tree summary
Adds clk_print_summary() to print the clock tree current state on core console using the info trace level. Clock framework spinlock is help while clock tree is printed.
The feature depends on CFG_DRIVERS_CLK_PRINT_TREE being enabled.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Co-developed-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
9bc42f66 |
| 17-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
mk: config: clarify CFG_VIRTUALIZATION is deprecated
Ensures that CFG_VIRTUALIZATION and CFG_NS_VIRTUALIZATION configuration settings do not conflict. If both are set, they shall have the same value
mk: config: clarify CFG_VIRTUALIZATION is deprecated
Ensures that CFG_VIRTUALIZATION and CFG_NS_VIRTUALIZATION configuration settings do not conflict. If both are set, they shall have the same value.
Clarifies CFG_VIRTUALIZATION is deprecated in mk/config.mk inline comments.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
3251835d |
| 17-Nov-2023 |
Sumit Garg <sumit.garg@linaro.org> |
mk: config.mk: Explicitly warn about CFG_REE_FS_ALLOW_RESET
CFG_REE_FS_ALLOW_RESET weakens rollback protection of REE FS secure storage and in turns breaks use-cases like rollback protection of TAs
mk: config.mk: Explicitly warn about CFG_REE_FS_ALLOW_RESET
CFG_REE_FS_ALLOW_RESET weakens rollback protection of REE FS secure storage and in turns breaks use-cases like rollback protection of TAs etc. So make it explicit that CFG_REE_FS_ALLOW_RESET is intended for test purposes only. Also, warn user about the additional threat vectors if this option is enabled for release build.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
show more ...
|
| #
f164f0f8 |
| 11-Sep-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: regulator: GPIO controlled regulator
Implements a GPIO controlled regulators driver compliant with DT nodes compatible with regulator-gpio. These regulators use GPIO pins to select the volt
drivers: regulator: GPIO controlled regulator
Implements a GPIO controlled regulators driver compliant with DT nodes compatible with regulator-gpio. These regulators use GPIO pins to select the voltage level. The implementation supports only dual voltage level selection using a single pin. The DT bindings allows more pins to select between more voltages but no known platform currently requires that so we preferred the simplified case.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
9ea709a7 |
| 14-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
tree wide: CFG_INSECURE deprecates CFG_WARN_INSECURE
Replaces configuration switch CFG_WARN_INSECURE with CFG_INSECURE The new name is better because the switch not only warns but also change the OP
tree wide: CFG_INSECURE deprecates CFG_WARN_INSECURE
Replaces configuration switch CFG_WARN_INSECURE with CFG_INSECURE The new name is better because the switch not only warns but also change the OP-TEE core behavior as, for example, allowing absence of secure storage rollback protection.
Suggested-by: Jérôme Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
2b719df0 |
| 07-Nov-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
core: interrupt: halt other cores when one is panicking
When one core panics, send an SGI (CFG_CORE_HALT_CORES_ON_PANIC_SGI) to halt other cores if CFG_CORE_HALT_CORES_ON_PANIC is enabled.
Signed-o
core: interrupt: halt other cores when one is panicking
When one core panics, send an SGI (CFG_CORE_HALT_CORES_ON_PANIC_SGI) to halt other cores if CFG_CORE_HALT_CORES_ON_PANIC is enabled.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
49d026a9 |
| 03-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
mk: config.mk: describe CFG_WITH_STATS
Adds a description for CFG_WITH_STATS and explicitly states that the config switch is default disabled.
Acked-by: Jerome Forissier <jerome.forissier@linaro.or
mk: config.mk: describe CFG_WITH_STATS
Adds a description for CFG_WITH_STATS and explicitly states that the config switch is default disabled.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
a1222502 |
| 20-Sep-2023 |
Raymond Mao <raymond.mao@linaro.org> |
core: add transfer list API
Introduce Transfer List API into kernel to implement Firmware Handoff specification
Link: https://github.com/FirmwareHandoff/firmware_handoff Signed-off-by: Raymond Mao
core: add transfer list API
Introduce Transfer List API into kernel to implement Firmware Handoff specification
Link: https://github.com/FirmwareHandoff/firmware_handoff Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
2a5b1d12 |
| 04-Oct-2023 |
Jerome Forissier <jerome.forissier@linaro.org> |
Update CHANGELOG for 4.0.0
Update CHANGELOG for 4.0.0 and collect Tested-by tags.
Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com> (stm32mp1-157C_DHCOM_PDK2) Tested-by: Jorge Ramirez-Or
Update CHANGELOG for 4.0.0
Update CHANGELOG for 4.0.0 and collect Tested-by tags.
Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com> (stm32mp1-157C_DHCOM_PDK2) Tested-by: Jorge Ramirez-Ortiz <jorge@foundries.io> (versal) Tested-by: Ilies CHERGUI <ilies.chergui@gmail.com> (QEMUv8) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sxsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx93evk) Tested-by: György Szing <gyorgy.szing@arm.com> (FVP_Base_RevC-2xAEMvA) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_armv8a) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (rockchip-rk3399) (Rockpi4B) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_virt) Tested-by: Ricardo Salveti <ricardo@foundries.io> (ZynqMP) Tested-by: Ricardo Salveti <ricardo@foundries.io> (k3-am62x) Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-135F_DK) Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_DK2) Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_EV1) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (imx-mx8mqevk) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey) Tested-by: Joakim Bech <joakim.bech@linaro.org> (Rpi3B) Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
show more ...
|
| #
652d2ce7 |
| 12-Sep-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: regulator: fixed regulator
Implements fixed voltage level regulator driver to register DT compatible "regulator-fixed" devices into the regulator framework. These regulators may be enabled/
drivers: regulator: fixed regulator
Implements fixed voltage level regulator driver to register DT compatible "regulator-fixed" devices into the regulator framework. These regulators may be enabled/disabled using a GPIO pin in which cases CFG_DRIVERS_GPIO shall be enabled.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Co-developed-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
show more ...
|
| #
6558b565 |
| 14-Sep-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: regulator: register to dt_driver
Adds regulator_dt_register() for regulator drivers to register regulator instances based on the DT description of the platform.
Regulator instances may not
drivers: regulator: register to dt_driver
Adds regulator_dt_register() for regulator drivers to register regulator instances based on the DT description of the platform.
Regulator instances may not be created and initialized when regulator_dt_register() returns. When a regulator depends on a supply this latter may not yet be registered and initialized. The framework will resolve the regulator dependencies later.
At OP-TEE core last initcall stage, a debug message informs in case of remaining unresolved regulator dependency. Used resources are released and no error status is returns to the system.
regulator_dt_register() uses a dedicated struct regu_dt_desc ABI to get the description of the regulator to be registered.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Co-developed-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
7d3ac186 |
| 06-Apr-2023 |
Lionel Debieve <lionel.debieve@foss.st.com> |
core: add CFG_WDT_SM_HANDLER_ID in TOS fast call list
Add CFG_WDT_SM_HANDLER_ID as a TOS fast call entry to manage the ARM watchdog service in 64 bit mode. Add also the associated ABI description. D
core: add CFG_WDT_SM_HANDLER_ID in TOS fast call list
Add CFG_WDT_SM_HANDLER_ID as a TOS fast call entry to manage the ARM watchdog service in 64 bit mode. Add also the associated ABI description. Define the CFG_WDT_SM_HANDLER_ID with a default value.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
1a3d3273 |
| 12-Sep-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: regulator framework
Introduces a voltage regulator driver framework for management of regulators and supply dependencies. The framework permits 1 regulator supply per regulator.
API functi
drivers: regulator framework
Introduces a voltage regulator driver framework for management of regulators and supply dependencies. The framework permits 1 regulator supply per regulator.
API function regulator_register() allows a regulator driver to register a regulator in the regulator framework.
Supported operation here are to enable, disable, get and set voltage level. They are all optional.
Registered regulators are referenced in a list for initialization resource release and debug purpose.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Co-developed-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
623b9bd4 |
| 23-Aug-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: use monotonic counter for secure storage without RPMB
If OP-TEE is configured without RPMB (CFG_REE_FS_INTEGRITY_RPMB=n), use the non-volatile monotonic counter interface instead to protect ag
core: use monotonic counter for secure storage without RPMB
If OP-TEE is configured without RPMB (CFG_REE_FS_INTEGRITY_RPMB=n), use the non-volatile monotonic counter interface instead to protect against rollback of the REE FS base secure storage.
If configured without CFG_WARN_INSECURE=y, accept TEE_ERROR_NOT_IMPLEMENTED error from nv_counter_get_ree_fs() and nv_counter_incr_ree_fs_to() and warn once to make clear that the configuration isn't secure.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Tested-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
3050ae8a |
| 08-Sep-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: unconditionally support manifest DT with FF-A
When configured for FF-A (CFG_CORE_FFA=y) unconditionally support receiving at manifest device tree. This also makes CFG_DT=y mandatory with FF-A.
core: unconditionally support manifest DT with FF-A
When configured for FF-A (CFG_CORE_FFA=y) unconditionally support receiving at manifest device tree. This also makes CFG_DT=y mandatory with FF-A.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Leisen <leisen1@huawei.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|