mk: config.mk: describe CFG_DRIVERS_DT_RECURSIVE_PROBE

Adds a description for CFG_DRIVERS_DT_RECURSIVE_PROBE.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <e

mk: config.mk: describe CFG_DRIVERS_DT_RECURSIVE_PROBE

Adds a description for CFG_DRIVERS_DT_RECURSIVE_PROBE.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

show more ...

core: dt_driver: drivers to test probe deferral

Implements driver providers for some emulated resource (clocks and reset
controllers), consumer drivers and a embedded test DTSI file to
test the DT_D

core: dt_driver: drivers to test probe deferral

Implements driver providers for some emulated resource (clocks and reset
controllers), consumer drivers and a embedded test DTSI file to
test the DT_DRIVER probe sequence.

The driver consumer run few tests and logs results locally. The
result participates in core self test result reported by the
PTA test interface.

One can test with vexpress platform flavor qemu_virt and qemu_v8 using,
for example, the build instruction below:
make PLATFORM=vexpress-qemu_virt \
CFG_DT_DRIVER_EMBEDDED_TEST=y \
CFG_EMBED_DTB_SOURCE_FILE=embedded_dtb_test.dts

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

drivers: clk: add CFG_DRIVERS_CLK_EARLY_PROBE

Adds configuration switch to allow clocks to be probed as any driver,
possibly deferring initialization. This is needed when a clock driver
has dependen

drivers: clk: add CFG_DRIVERS_CLK_EARLY_PROBE

Adds configuration switch to allow clocks to be probed as any driver,
possibly deferring initialization. This is needed when a clock driver
has dependencies on another resource.

The configuration is default enabled (CFG_DRIVERS_CLK_EARLY_PROBE=y)
that is probing clock drivers before other drivers using the early_init
initcall level as done prior this change.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

show more ...

core: pta: add remote attestation PTA

Add a PTA to perform remote attestation of user space TAs and TEE core
memory. Enabled with CFG_ATTESTATION_PTA=y. Four commands are defined:

- PTA_ATTESTATION

core: pta: add remote attestation PTA

Add a PTA to perform remote attestation of user space TAs and TEE core
memory. Enabled with CFG_ATTESTATION_PTA=y. Four commands are defined:

- PTA_ATTESTATION_GET_PUBKEY

Returns the public RSA key used to sign the measurements generated by
the other commands. The key pair is generated on first call (any
command) and saved to secure storage. It is therefore device-specific.

- PTA_ATTESTATION_GET_TA_SHDR_DIGEST

Returns the digest found in the secure header (struct shdr) of a TA
or trusted shared library given its UUID.

- PTA_ATTESTATION_HASH_TA_MEMORY

This command must be called by a user space TA (not a CA). It computes
a hash of the memory pages that belong to the caller and contain code
or read-only data. This hash is therefore a runtime measurement of the
TA execution environment, including shared libraries (if any). It can be
used to remotely attest that the device is running untampered TA code.

- PTA_ATTESTATION_HASH_TEE_MEMORY

Returns a hash of the TEE OS core (.text and .rodata sections, less the
small part of .text that may be modified at boot). Similar to
PTA_ATTESTATION_HASH_TA_MEMORY, the hash is computed each time the
command is called, so that the result reflects the actual memory
content.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

pta: add PTA for RTC

On some systems, when the RTC is secured, there is no way for the
normal world to access it. This PTA uses the RTC API to allow a
Linux OP-TEE based RTC driver to communicate wi

pta: add PTA for RTC

On some systems, when the RTC is secured, there is no way for the
normal world to access it. This PTA uses the RTC API to allow a
Linux OP-TEE based RTC driver to communicate with the RTC that is
secured.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

show more ...

drivers: rtc: add RTC API

This API allows to interact with a RTC registered as the system RTC.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@l

drivers: rtc: add RTC API

This API allows to interact with a RTC registered as the system RTC.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

show more ...

delay: allow udelay() function to work without generic timers

sama5d2 processor is missing the optional ARM generic timers extension.
In order to allow using the udelay function, add a function base

delay: allow udelay() function to work without generic timers

sama5d2 processor is missing the optional ARM generic timers extension.
In order to allow using the udelay function, add a function based on
a wait loop. This support needs plat_get_freq() to be implemented by
the platform code and CFG_CORE_HAS_GENERIC_TIMER should be set to 'n'.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

show more ...

drivers: wdt: add SMC handler for arm-smc-wdt Linux driver

Add SMC handler to handle SMC coming from Linux arm-smc-wdt driver.
This function is meant to be called in sm_platform_handler() since
CFG_

drivers: wdt: add SMC handler for arm-smc-wdt Linux driver

Add SMC handler to handle SMC coming from Linux arm-smc-wdt driver.
This function is meant to be called in sm_platform_handler() since
CFG_WDT_SM_HANDLER_ID is going to be defined by the platforms.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

show more ...

drivers: wdt: add watchdog interface

Add necessary code to register a system watchdog. This watchdog will
then used for generic watchdog usage using a new simple watchdog interface.
This interface w

drivers: wdt: add watchdog interface

Add necessary code to register a system watchdog. This watchdog will
then used for generic watchdog usage using a new simple watchdog interface.
This interface will be used by SMC handler which will allow handling SMC
coming from the arm-smc-wdt compatible driver present in Linux.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

show more ...

cfg: Add restrictions with CFG_TA_PAUTH

Linux boot fails with XEN on CPU's with FEAT_PAUTH. So,
CFG_TA_PAUTH currently has not been tested and is incompatible
with CFG_VIRTUALIZATION.

It is also in

cfg: Add restrictions with CFG_TA_PAUTH

Linux boot fails with XEN on CPU's with FEAT_PAUTH. So,
CFG_TA_PAUTH currently has not been tested and is incompatible
with CFG_VIRTUALIZATION.

It is also incompatible with debug options like FTRACE and GPROF.

If these incompatible options are selected together by a platform,
compilation will stop and user will be warned with an error
message.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

show more ...

cfg: Add option to enable PAUTH for TA's

Add config option to enable Pointer authentication support for
TA's.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <eti

cfg: Add option to enable PAUTH for TA's

Add config option to enable Pointer authentication support for
TA's.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

Update CHANGELOG for 3.16.0

Update CHANGELOG for 3.16.0 and collect Tested-by tags.

Tested-by: Jerome Forissier <jerome@forissier.org> (vexpress-qemu_armv8a)
Tested-by: Jerome Forissier <jerome@for

Update CHANGELOG for 3.16.0

Update CHANGELOG for 3.16.0 and collect Tested-by tags.

Tested-by: Jerome Forissier <jerome@forissier.org> (vexpress-qemu_armv8a)
Tested-by: Jerome Forissier <jerome@forissier.org> (vexpress-qemu_armv8a, aarch64 host)
Tested-by: Jerome Forissier <jerome@forissier.org> (hikey-hikey)
Tested-by: Jerome Forissier <jerome@forissier.org> (hikey-hikey960)
Tested-by: Igor Opaniuk <igor.opaniuk@gmail.com> (Poplar)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (imx-mx8mqevk)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1012A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1028A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1043A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1046A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1088A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS2088A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LX2160A-RDB)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sxsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8dxlevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8ulpevk)
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1, gp pkcs11)
Tested-by: Ricardo Salveti <ricardo@foundries.io> (ZynqMP)
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (vexpress-qemu_virt, gp pkcs11)
Tested-by: Sumit Garg <sumit.garg@linaro.org> (Developerbox)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

drivers: add reset controller framework

Adds a common reset controller framework rstctrl for interfacing
reset controllers exposed by a platform.

Reset controller consumers can act on relate reset

drivers: add reset controller framework

Adds a common reset controller framework rstctrl for interfacing
reset controllers exposed by a platform.

Reset controller consumers can act on relate reset level with
rstctrl_assert(), rstctrl_deassert() and friends.

Reset controller consumers can claim exclusive access to the reset
level woth rstctrl_get_exclusive(), rstctrl_put_exclusive().

Reset controller provider drivers call rstctrl_register_provider()
to allow other drivers to get a reset control reference from
a devicetree reference. Reset controller driver are identified with
type DT_DRIVER_RSTCTRL.

A reset controller provider exposes struct rstctrl instances made of
an opaque private reference (a private data pointer or an unsigned
integer identifier), an reset controller operators reference and
the exclusive claim state.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

show more ...

mk/config.mk: fix layout

Moves tests on CFG_DRIVERS_CLK_* config switches next to where
these are assigned a default configuration value.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed

mk/config.mk: fix layout

Moves tests on CFG_DRIVERS_CLK_* config switches next to where
these are assigned a default configuration value.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

show more ...

libutils: mempool based raw malloc functions

Instead of the old stack like internal memory allocator, use the raw
malloc functions instead for more efficient memory usage.

CFG_WITH_STATS is enabled

libutils: mempool based raw malloc functions

Instead of the old stack like internal memory allocator, use the raw
malloc functions instead for more efficient memory usage.

CFG_WITH_STATS is enabled automatically if
CFG_MEMPOOL_REPORT_LAST_OFFSET is enabled to secure a new dependency in
the code.

Acked-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: add asynchronous notifications

Adds support for asynchronous notifications from secure world to normal
world. This allows a design with a top half and bottom half type of
driver where the top

core: add asynchronous notifications

Adds support for asynchronous notifications from secure world to normal
world. This allows a design with a top half and bottom half type of
driver where the top half runs in secure interrupt context and a
notifications tells normal world to schedule a yielding call to do the
bottom half processing.

The protocol is defined in optee_msg.h optee_rpc_cmd.h and optee_smc.h.

A notification consists of a 32-bit value which normal world can
retrieve using a fastcall into secure world. OP-TEE is currently only
supporting the value 0-63 where 0 has a special meaning. When 0 is sent
it means that normal world is supposed to make a yielding call
OPTEE_MSG_CMD_DO_BOTTOM_HALF.

The notification framework in OP-TEE defines an interface where drivers
can register a callback which is called on each yielding bottom half
call.

Notification capability is negotiated with the normal world while it
initializes its driver. If both sides supports these notifications then
they are enabled.

CFG_CORE_ASYNC_NOTIF_GIC_INTID is added to define the hardware interrupt
used to notify normal world. This is added to the DTB in case OP-TEE can
is configured with CFG_DT=y. Other cases requires the normal world DTB
to be kept in sync with this.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

config: Add config options to enable BTI for TEE core and TA's

Branch Target Identification (part of the ARMv8.5 Extensions)
provides a mechanism to limit the set of locations to which
computed bran

config: Add config options to enable BTI for TEE core and TA's

Branch Target Identification (part of the ARMv8.5 Extensions)
provides a mechanism to limit the set of locations to which
computed branch instructions such as BR or BLR can jump.
To make use of BTI in TEE cores and ldelf on CPU's that
support it, enable the option CFG_CORE_BTI. The option is only
supported for ARM64 cores.

To enable BTI support for TA's and user mode libraries,
enable the option CFG_TA_BTI.

The BTI support is currently not compatible with options
CFG_VIRTUALIZATION and CFG_WITH_PAGER.

To use the option CFG_CORE_BTI, GCC toolchain built with
--enable-standard-branch-protection is needed.

To test with QEMU, use option -cpu max,sve=off.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jerome Forissier <jerome@forissier.org> (vexpress-qemu_armv8a)

show more ...

build: introduce _CFG_WITH_SECURE_STORAGE

Adds _CFG_WITH_SECURE_STORAGE set to 'y' when at least one secure
storage backend is enabled.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Review

build: introduce _CFG_WITH_SECURE_STORAGE

Adds _CFG_WITH_SECURE_STORAGE set to 'y' when at least one secure
storage backend is enabled.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: introduce CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID

Adds CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID which if set to 'y' makes
huk_subkey_derive() generate SSK using tee_otp_get_die_id().

Old s

core: introduce CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID

Adds CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID which if set to 'y' makes
huk_subkey_derive() generate SSK using tee_otp_get_die_id().

Old scheme for SSK generation:
SSK = HMAC_SHA256(HUK, Chip_ID || "ONLY_FOR_tee_fs_ssk")
This config changes Chip_ID from the default BEEF-like value to the
result of tee_otp_get_die_id().

Note that this option works only if
CFG_CORE_HUK_SUBKEY_COMPAT=y.

Acked-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Ruslan Piasetskyi <ruslan.piasetskyi@gmail.com>

show more ...

Add config option CFG_WARN_DECL_AFTER_STATEMENT

Adds configuration option CFG_WARN_DECL_AFTER_STATEMENT which adds the
warning -Wdeclaration-after-statement.

The coding style doesn't allow declarat

Add config option CFG_WARN_DECL_AFTER_STATEMENT

Adds configuration option CFG_WARN_DECL_AFTER_STATEMENT which adds the
warning -Wdeclaration-after-statement.

The coding style doesn't allow declarations after statements in the
code. So add a warning for this to let the compiler catch this before
the review.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

config: add flag CFG_WARN_INSECURE

OP-TEE is a reference implementation for developers and device
manufacturers, which implies that there always is a need to fill in
missing pieces that cannot be do

config: add flag CFG_WARN_INSECURE

OP-TEE is a reference implementation for developers and device
manufacturers, which implies that there always is a need to fill in
missing pieces that cannot be done generically. The chipmakers often
have additional security configurations those needs to be configured
according to the chipmakers security guidelines and security
specifications.

To reduce the likelihood of running a vanilla configured OP-TEE we
introduce the flag CFG_WARN_INSECURE that will give warning messages in
the boot saying that the OP-TEE runs a configuration that might be
insecure. The intention is that the device manufacturer making the end
products should change the flag to "n" after implementing stubbed
functionality in OP-TEE and configuring their device according to the
chipmakers security guidelines and security specifications.

Signed-off-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Acked-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

drivers: clk: add fixed-clock driver

fixed-clock are a really common clock types used in device tree and
when there is a clock hierarchy, they are needed to query the clock
rate. This driver is buil

drivers: clk: add fixed-clock driver

fixed-clock are a really common clock types used in device tree and
when there is a clock hierarchy, they are needed to query the clock
rate. This driver is build by default when CFG_DRIVERS_CLK_DT is
enabled.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

show more ...

drivers: clk: add devicetree support

When using a devicetree, it is often useful to have clocks parsing.
This support adds clocks properties parsing and allow having clock
providers and users. Clock

drivers: clk: add devicetree support

When using a devicetree, it is often useful to have clocks parsing.
This support adds clocks properties parsing and allow having clock
providers and users. Clocks drivers can also be declared with
CLK_DT_DECLARE. They will be probed automatically by the clock core.
On the user side, function clk_dt_get_by_name and clk_dt_get_by_idx
allows to retrieve a clock from the device tree description and match
it with the provider clocks. The core ensure the clocks are probed
hierarchically.
This support is enabled using CFG_DRIVERS_CLK_DT.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

show more ...

drivers: clk: add generic clock framework

In order to ease clock support in OP-TEE, add a generic clock framework
which allows to add clocks driver and handle clock hierarchy.
This clock framework p

drivers: clk: add generic clock framework

In order to ease clock support in OP-TEE, add a generic clock framework
which allows to add clocks driver and handle clock hierarchy.
This clock framework provides various functions to enable/disable clock
and to get their rate. Some basic behavior are supported such as gating
when parent or rate is set. This option is enabled using
CFG_DRIVERS_CLK which is disabled by default.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

show more ...

Update CHANGELOG for 3.15.0

Update CHANGELOG for 3.15.0 and collect Tested-by tags.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6

Update CHANGELOG for 3.15.0

Update CHANGELOG for 3.15.0 and collect Tested-by tags.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sxsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek)
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2 gp pkcs11)
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_EV1 gp pkcs11 StMM)
Tested-by: Igor Opaniuk <igor.opaniuk@foundries.io> (Poplar)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (imx-mx8mqevk)
Tested-by: Jerome Forissier <jerome@forissier.org> (hikey-hikey)
Tested-by: Jerome Forissier <jerome@forissier.org> (hikey-hikey960)
Tested-by: Jerome Forissier <jerome@forissier.org> (vexpress-qemu_armv8a)
Tested-by: Jerome Forissier <jerome@forissier.org> (vexpress-qemu_virt)
Tested-by: Joakim Bech <joakim.bech@linaro.org> (RPi3B)
Tested-by: Ricardo Salveti <ricardo@foundries.io> (ZynqMP)
Tested-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> (imx-mx6qsabrelite barebox kernel 5.14.9)
Tested-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> (imx-mx6ulccimx6ulsbcpro barebox kernel 5.14.9)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1012A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1028A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1043A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1046A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1088A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS2088A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LX2160A-RDB)
Tested-by: Sumit Garg <sumit.garg@linaro.org> (Developerbox)
Tested-by: Victor Chong <victor.chong@linaro.org> (QEMUv8 AOSP)
Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (rcar-salvator_m3_2x4g / virt)
Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (rcar-salvator_m3_2x4g)
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> (bpi0)
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> (mx8mm_cl_iot_gate)

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