| #
5cc08985 |
| 29-Apr-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
libutee: arm64: add read_dczid_el0()
Adds read_dczid_el0() to read Data Cache Zero ID register.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wikla
libutee: arm64: add read_dczid_el0()
Adds read_dczid_el0() to read Data Cache Zero ID register.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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|
| #
568fc276 |
| 25-Feb-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
arm64: add read_cntvct()
Adds read_cntvct() to read Counter-timer Virtual Count register.
Note that arm32 already have this function.
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-of
arm64: add read_cntvct()
Adds read_cntvct() to read Counter-timer Virtual Count register.
Note that arm32 already have this function.
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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|
| #
e9c00824 |
| 21-Jul-2020 |
Jerome Forissier <jerome@forissier.org> |
libutee: arm64: add read_tpidr_el0() and write_tpidr_el0() macros
Preparing for C++ support in TAs.
Adds macros to <arm64_user_sysreg.h> to access TPIDR_EL0, the EL0 Read/
Write Software Thread ID
libutee: arm64: add read_tpidr_el0() and write_tpidr_el0() macros
Preparing for C++ support in TAs.
Adds macros to <arm64_user_sysreg.h> to access TPIDR_EL0, the EL0 Read/
Write Software Thread ID Register.
Signed-off-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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|
| #
70ed8fd5 |
| 06-Mar-2020 |
Jerome Forissier <jerome@forissier.org> |
libutee: arm64: update register accessor macros to support Clang
When building a 64-bit TA that includes <arm64_user_sysreg.h>, Clang
complains about ASM operand width:
lib/libutee/include/arm64_u
libutee: arm64: update register accessor macros to support Clang
When building a 64-bit TA that includes <arm64_user_sysreg.h>, Clang
complains about ASM operand width:
lib/libutee/include/arm64_user_sysreg.h:31:1: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths]
DEFINE_REG_READ_FUNC_(cntfrq, uint32_t, cntfrq_el0)
^
lib/libutee/include/arm64_user_sysreg.h:20:42: note: expanded from macro 'DEFINE_REG_READ_FUNC_'
asm volatile("mrs %0, " #asmreg : "=r" (val)); \
^
lib/libutee/include/arm64_user_sysreg.h:31:1: note: use constraint modifier "w"
lib/libutee/include/arm64_user_sysreg.h:20:20: note: expanded from macro 'DEFINE_REG_READ_FUNC_'
asm volatile("mrs %0, " #asmreg : "=r" (val)); \
^
Let's apply the same fix as in commit 16e2153c57f0 ("core: arm64:
update register accessor macros to support Clang").
Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
4486d586 |
| 04-Jul-2019 |
Sumit Garg <sumit.garg@linaro.org> |
libutee: add headers for user-space to access sysregs
User space may require to access system registers like generic timer
registers in case function tracing is enabled etc. So provide headers
for u
libutee: add headers for user-space to access sysregs
User space may require to access system registers like generic timer
registers in case function tracing is enabled etc. So provide headers
for user space to access sysregs.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|