| a7a9e3ba | 02-Dec-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers/scmi-msg: support for clock protocol
Adds SCMI clock protocol support in the SCMI message drivers as defined in SCMI specification v2.0 [1]. Not all the messages defined in the specification
drivers/scmi-msg: support for clock protocol
Adds SCMI clock protocol support in the SCMI message drivers as defined in SCMI specification v2.0 [1]. Not all the messages defined in the specification are supported.
Embedded upon CFG_SCMI_MSG_CLOCK=y.
Platform can provide one of the plat_scmi_clock_*() handler for the supported operations set/get state/rate and others.
scmi_msg_get_clock_handler() sanitizes the message_id value against any speculative use of clock ID as a index since by SCMI specification, IDs are indices.
SCMI resource in this implementation are dumped or inspired by the SCP-firmware implementation [2] of the SCMI protocol, server side.
Link: [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf Link: [2] https://github.com/ARM-software/SCP-firmware.git
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ae8c8068 | 01-Dec-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers/scmi-msg: driver for processing scmi messages
This change introduces drivers to allow a platform to create a SCMI service and register handlers for client request (SCMI agent) on system reso
drivers/scmi-msg: driver for processing scmi messages
This change introduces drivers to allow a platform to create a SCMI service and register handlers for client request (SCMI agent) on system resources. This is the first piece of the drivers: an entry function, the SCMI base protocol support and helpers for create the response message.
With this change, scmi_process_message() is the entry function to process an incoming SCMI message. The function expect the message is already copied from shared memory into secure memory. The message structure stores message reference and output buffer reference where response message shall be stored.
scmi_process_message() calls the SCMI protocol driver according to the protocol ID in the message. The SCMI protocol driver will call defined platform handlers according to the message content.
This change introduces only the SCMI base protocol as defined in SCMI specification v2.0 [1]. Not all the messages defined in the specification are supported.
SCMI resource in this implementation are dumped or inspired by the SCP-firmware implementation [2] of the SCMI protocol, server side.
Link: [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf Link: [2] https://github.com/ARM-software/SCP-firmware.git
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 7c767434 | 02-Apr-2020 |
Albert Schwarzkopf <a.schwarzkopf@phytec.de> |
core: merge tee_*_get_digest_size() into a single function
Rename tee_hash_get_digest_size() to tee_alg_get_digest_size().
Change tee_alg_get_digest_size() to use new libutee macro TEE_ALG_GET_DIGE
core: merge tee_*_get_digest_size() into a single function
Rename tee_hash_get_digest_size() to tee_alg_get_digest_size().
Change tee_alg_get_digest_size() to use new libutee macro TEE_ALG_GET_DIGEST_SIZE.
Remove tee_mac_get_digest_size() as its functionality is handled by tee_alg_get_digest_size() now.
Signed-off-by: Albert Schwarzkopf <a.schwarzkopf@phytec.de> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e43ab7a8 | 07-Aug-2019 |
Cedric Neveux <cedric.neveux@nxp.com> |
core: driver: generic resources for crypto cipher driver
Add a generic cryptographic Cipher driver interface connecting TEE Crypto generic APIs to HW driver interface
To make Cipher HW driver gener
core: driver: generic resources for crypto cipher driver
Add a generic cryptographic Cipher driver interface connecting TEE Crypto generic APIs to HW driver interface
To make Cipher HW driver generic and to reduce the amount of function parameters, add structure data for the initialization and update function driver call. Checks the Cipher operation's parameter in the generic part before calling the HW driver.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 40bb4a98 | 19-Mar-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add overflow check in SHDR_GET_SIZE()
Adds overflow check in SHDR_GET_SIZE(), 0 which never can be a correct size is returned in case of overflow.
Reviewed-by: Joakim Bech <joakim.bech@linaro
core: add overflow check in SHDR_GET_SIZE()
Adds overflow check in SHDR_GET_SIZE(), 0 which never can be a correct size is returned in case of overflow.
Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reported-by: Bastien Simondi <bsimondi@netflix.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b1042535 | 29-Nov-2019 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
rpmb: function to block rpmb write per platform
Often the RPMB should only be written if the platform is in the correct state where the Hardware Unique Key (HUK) for the platform works correctly. As
rpmb: function to block rpmb write per platform
Often the RPMB should only be written if the platform is in the correct state where the Hardware Unique Key (HUK) for the platform works correctly. As an example on imx platforms with HUK derivation from the OTPMK, the OTPMK is only accessible from the secure or trusted state. Add a function and weak implementation for platforms to indicate that the device is in the correct state to allow RPMB key writes.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Cedric Neveux <cedric.neveux@nxp.com>
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| 599784c7 | 29-Nov-2019 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
imx: snvs: rework snvs driver
Remove the unused SRTC functionality which is not wired up anywhere. Instead add a function to read the device configuration and system security monitor instead.
Signe
imx: snvs: rework snvs driver
Remove the unused SRTC functionality which is not wired up anywhere. Instead add a function to read the device configuration and system security monitor instead.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Cedric Neveux <cedric.neveux@nxp.com>
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| dd333f03 | 20-Jan-2020 |
Javier Almansa Sobrino <javier.almansasobrino@arm.com> |
core: Add support to access a TPM event log in secure memory.
Support for OPTEE to be able to receive a TPM event log through a DTB so it can forward it to a TA (such as a TPM service) in order to e
core: Add support to access a TPM event log in secure memory.
Support for OPTEE to be able to receive a TPM event log through a DTB so it can forward it to a TA (such as a TPM service) in order to extend the measurements.
CFG_CORE_TPM_EVENT_LOG enables this feature. CFG_TPM_LOG_BASE_ADDR hardcodes the phys address of the event log in case CFG_DT is not set. CFG_TPM_MAX_LOG_SIZE harcodes the size of the event log in case CFG_DT is not set.
When this feature is enabled, the PTA_SYSTEM_GET_TPM_EVENT_LOG command is available to any TA.
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5544b89d | 06-Feb-2020 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
tzc380: add function to lockdown regions
The TZC380 allows a lockdown of the region configuration to prevent unintended or malicious configuration changes. Add a function which locks down all region
tzc380: add function to lockdown regions
The TZC380 allows a lockdown of the region configuration to prevent unintended or malicious configuration changes. Add a function which locks down all regions of the current configuration
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Reviewed-by: Clement Faure <clement.faure@nxp.com>
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| e55ef7c3 | 17-Feb-2020 |
Jerome Forissier <jerome@forissier.org> |
core: panic(): don't lose the message in non-debug mode
When CFG_TEE_CORE_DEBUG != y, panic("Some text") prints no file/line/ function information (which is expected in non-debug mode) but it also i
core: panic(): don't lose the message in non-debug mode
When CFG_TEE_CORE_DEBUG != y, panic("Some text") prints no file/line/ function information (which is expected in non-debug mode) but it also ignores its parameter. As a result, the console simply shows "Panic" which is not very helpful.
There is no reason not to print the panic message, so add it. Note that it is still possible to build a fully silent OP-TEE by setting the log level to zero.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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| dd13645c | 30-Jan-2020 |
Clement Faure <clement.faure@nxp.com> |
drivers: tzc: set maximum region size for tzc_auto_configure()
According to the TZC380 documentation, the AXI address width controls the upper limit value of the region size. This fix makes sure tha
drivers: tzc: set maximum region size for tzc_auto_configure()
According to the TZC380 documentation, the AXI address width controls the upper limit value of the region size. This fix makes sure that tzc_auto_configure() function will not allocated a region bigger that the AXI address width.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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| b6afa13a | 27-Jan-2020 |
Carlo Caione <ccaione@baylibre.com> |
plat-amlogic: Add initial support for Amlogic platforms
This is the initial support for the Amlogic platforms.
Tested 64-bin mode on A113D (AXG) board using upstream TF-A BL31.
* xtest results (-l
plat-amlogic: Add initial support for Amlogic platforms
This is the initial support for the Amlogic platforms.
Tested 64-bin mode on A113D (AXG) board using upstream TF-A BL31.
* xtest results (-l 15): | 44074 subtests of which 0 failed | 96 test cases of which 0 failed | 0 test cases were skipped | TEE test application done!
* Compiled with: | make PLATFORM=amlogic
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
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| a66805b1 | 29-Jan-2020 |
Jerome Forissier <jerome@forissier.org> |
Move core/include/config.h to lib/libutils/ext/include
In order to be able to use the IS_ENABLED() macro in user space libraries, move config.h from core to libutils.
Signed-off-by: Jerome Forissie
Move core/include/config.h to lib/libutils/ext/include
In order to be able to use the IS_ENABLED() macro in user space libraries, move config.h from core to libutils.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5b385b3f | 06-Jan-2020 |
Jerome Forissier <jerome@forissier.org> |
core: crypto: add support for SM2 KEP
Adds SM2 Key Exchange Protocol [1] using LibTomCrypt. The TA interface complies with the GlobalPlatform TEE Internal Core API version 1.2.
SM2 KEP is enabled w
core: crypto: add support for SM2 KEP
Adds SM2 Key Exchange Protocol [1] using LibTomCrypt. The TA interface complies with the GlobalPlatform TEE Internal Core API version 1.2.
SM2 KEP is enabled with CFG_CRYPTO_SM2_KEP=y (default y) wich currently requires that CFG_CRYPTOLIB_NAME=tomcrypt. An Mbed TLS implementation could be added later if needed.
[1] http://www.gmbz.org.cn/main/postDetail.html?id=20180724110812
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1c832d7c | 17-Dec-2019 |
davidwang <davidwang@realtek.com> |
core: support shared irq
With some platforms would have multiplexed interrupts and software implement difference interrupt handler. Currently the interrupt mechanism only handle the first matched ha
core: support shared irq
With some platforms would have multiplexed interrupts and software implement difference interrupt handler. Currently the interrupt mechanism only handle the first matched handler, and can not support shared irq.
New change to keep find another matched handler if the previous handler return none.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: davidwang <davidwang@realtek.com>
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| 0f151943 | 17-Dec-2019 |
Jerome Forissier <jerome@forissier.org> |
core: crypto add support for SM2 DSA
Adds SM2 Digital Signature Algorithm [1] using LibTomCrypt. The TA interface complies with the GlobalPlatform TEE Internal Core API version 1.2.
SM2 DSA is enab
core: crypto add support for SM2 DSA
Adds SM2 Digital Signature Algorithm [1] using LibTomCrypt. The TA interface complies with the GlobalPlatform TEE Internal Core API version 1.2.
SM2 DSA is enabled with CFG_CRYPTO_SM2_DSA=y (default y) which currently requires that CFG_CRYPTOLIB_NAME=tomcrypt. An Mbed TLS implementation could be added later if needed.
[1] http://www.gmbz.org.cn/main/postDetail.html?id=20180724110812
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 91fc6bd8 | 17-Dec-2019 |
Jerome Forissier <jerome@forissier.org> |
core: crypto: add support for SM2 PKE
Adds SM2 Public Key Encryption [1] using LibTomCrypt. The TA interface complies with the GlobalPlatform TEE Internal Core API version 1.2.
SM2 is enabled with
core: crypto: add support for SM2 PKE
Adds SM2 Public Key Encryption [1] using LibTomCrypt. The TA interface complies with the GlobalPlatform TEE Internal Core API version 1.2.
SM2 is enabled with CFG_CRYPTO_SM2_PKE=y (default y) which currently requires that CFG_CRYPTOLIB_NAME=tomcrypt. An Mbed TLS implementation could be added later if needed.
[1] http://www.gmbz.org.cn/main/postDetail.html?id=20180724110812
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 47645577 | 13-Dec-2019 |
Jerome Forissier <jerome@forissier.org> |
core: crypto: add support for SM3
Adds support for the SM3 cryptographic hash function [1] using the API defined in the GlobalPlatform TEE Internal Core API v1.2, as well as the HMAC based on this h
core: crypto: add support for SM3
Adds support for the SM3 cryptographic hash function [1] using the API defined in the GlobalPlatform TEE Internal Core API v1.2, as well as the HMAC based on this hash.
This implementation is based on code published on Gitlab [2]. See commit ade6f848e084 ("core: crypto: add support for SM4") for details.
[1] https://tools.ietf.org/html/draft-sca-cfrg-sm3-02 [2] https://gitlab.com/otpfree/sm234
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| ade6f848 | 12-Dec-2019 |
Jerome Forissier <jerome@forissier.org> |
core: crypto: add support for SM4
Adds support for the SM4 cipher [1] using the API defined in the GlobalPlatform TEE Internal Core API v1.2.
ECB, CBC and CTR modes are implemented. Other modes are
core: crypto: add support for SM4
Adds support for the SM4 cipher [1] using the API defined in the GlobalPlatform TEE Internal Core API v1.2.
ECB, CBC and CTR modes are implemented. Other modes are valid but are not included in the GP specification, so they are not considered here.
This implementation is based on code published on Gitlab [2]. The project contains no licensing terms, so I contacted the author (goldboar@163.com), asking for permission to re-use the code in OP-TEE under a BSD-2-Clause license. I received the following reply:
"[...] If you like you can use it [...]"
I have reworked the source to better fit the OP-TEE coding style. I have also added the CTR mode of operation.
I do not think we will need to merge any change from upstream in the future.
[1] https://tools.ietf.org/html/draft-ribose-cfrg-sm4-10 [2] https://gitlab.com/otpfree/sm234
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| c6744caa | 22-Nov-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add fobj_ro_reloc_paged_alloc()
Adds a new type of fobj, struct fobj_ro_reloc_paged, which is created with fobj_ro_reloc_paged_alloc(). It's like struct fobj_rop but with support for relocatio
core: add fobj_ro_reloc_paged_alloc()
Adds a new type of fobj, struct fobj_ro_reloc_paged, which is created with fobj_ro_reloc_paged_alloc(). It's like struct fobj_rop but with support for relocation too.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 15ba8c1f | 15-Nov-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: move VFP state into struct user_ta_ctx
Moves the VFP state from struct user_ta_ctx to struct user_mode_ctx to make user mode handling a bit more generic.
Acked-by: Pipat Methavanitpong <pipat
core: move VFP state into struct user_ta_ctx
Moves the VFP state from struct user_ta_ctx to struct user_mode_ctx to make user mode handling a bit more generic.
Acked-by: Pipat Methavanitpong <pipat.methavanitpong@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 7c732ee4 | 07-Oct-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: get svc handler from the context of current session
Instead of a single global syscalls definition, get the syscall handler function from the context of current active session.
An extra optio
core: get svc handler from the context of current session
Instead of a single global syscalls definition, get the syscall handler function from the context of current active session.
An extra optional (mandatory for user mode TAs) function pointer is added to struct tee_ta_ops, handle_svc, which handles the syscall.
tee_svc_handler() is split into a generic thread_svc_handler() which is put in kernel/thread.c. The user TA specific part is put in user_ta_handle_svc() which is kept in tee/arch_svc.c but made available via the new .handle_svc function pointer of struct tee_ta_ops.
Acked-by: Pipat Methavanitpong <pipat.methavanitpong@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5343f09f | 07-Oct-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add common user_mode_ctx_print_mappings()
Adds a common user_mode_ctx_print_mappings() which prints the current user mode mappings.
Acked-by: Pipat Methavanitpong <pipat.methavanitpong@linaro
core: add common user_mode_ctx_print_mappings()
Adds a common user_mode_ctx_print_mappings() which prints the current user mode mappings.
Acked-by: Pipat Methavanitpong <pipat.methavanitpong@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1936dfc7 | 07-Oct-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add struct user_mode_ctx
Adds struct user_mode_ctx which replaces user mode specific fields used for memory mapping.
Acked-by: Pipat Methavanitpong <pipat.methavanitpong@linaro.org> Acked-by:
core: add struct user_mode_ctx
Adds struct user_mode_ctx which replaces user mode specific fields used for memory mapping.
Acked-by: Pipat Methavanitpong <pipat.methavanitpong@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b19db423 | 18-Nov-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add description of struct shdr_bootstrap_ta
Adds a description of the fields in struct shdr_bootstrap_ta.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <j
core: add description of struct shdr_bootstrap_ta
Adds a description of the fields in struct shdr_bootstrap_ta.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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