| e55ef7c3 | 17-Feb-2020 |
Jerome Forissier <jerome@forissier.org> |
core: panic(): don't lose the message in non-debug mode
When CFG_TEE_CORE_DEBUG != y, panic("Some text") prints no file/line/ function information (which is expected in non-debug mode) but it also i
core: panic(): don't lose the message in non-debug mode
When CFG_TEE_CORE_DEBUG != y, panic("Some text") prints no file/line/ function information (which is expected in non-debug mode) but it also ignores its parameter. As a result, the console simply shows "Panic" which is not very helpful.
There is no reason not to print the panic message, so add it. Note that it is still possible to build a fully silent OP-TEE by setting the log level to zero.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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| dd13645c | 30-Jan-2020 |
Clement Faure <clement.faure@nxp.com> |
drivers: tzc: set maximum region size for tzc_auto_configure()
According to the TZC380 documentation, the AXI address width controls the upper limit value of the region size. This fix makes sure tha
drivers: tzc: set maximum region size for tzc_auto_configure()
According to the TZC380 documentation, the AXI address width controls the upper limit value of the region size. This fix makes sure that tzc_auto_configure() function will not allocated a region bigger that the AXI address width.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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| b6afa13a | 27-Jan-2020 |
Carlo Caione <ccaione@baylibre.com> |
plat-amlogic: Add initial support for Amlogic platforms
This is the initial support for the Amlogic platforms.
Tested 64-bin mode on A113D (AXG) board using upstream TF-A BL31.
* xtest results (-l
plat-amlogic: Add initial support for Amlogic platforms
This is the initial support for the Amlogic platforms.
Tested 64-bin mode on A113D (AXG) board using upstream TF-A BL31.
* xtest results (-l 15): | 44074 subtests of which 0 failed | 96 test cases of which 0 failed | 0 test cases were skipped | TEE test application done!
* Compiled with: | make PLATFORM=amlogic
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
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| a66805b1 | 29-Jan-2020 |
Jerome Forissier <jerome@forissier.org> |
Move core/include/config.h to lib/libutils/ext/include
In order to be able to use the IS_ENABLED() macro in user space libraries, move config.h from core to libutils.
Signed-off-by: Jerome Forissie
Move core/include/config.h to lib/libutils/ext/include
In order to be able to use the IS_ENABLED() macro in user space libraries, move config.h from core to libutils.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5b385b3f | 06-Jan-2020 |
Jerome Forissier <jerome@forissier.org> |
core: crypto: add support for SM2 KEP
Adds SM2 Key Exchange Protocol [1] using LibTomCrypt. The TA interface complies with the GlobalPlatform TEE Internal Core API version 1.2.
SM2 KEP is enabled w
core: crypto: add support for SM2 KEP
Adds SM2 Key Exchange Protocol [1] using LibTomCrypt. The TA interface complies with the GlobalPlatform TEE Internal Core API version 1.2.
SM2 KEP is enabled with CFG_CRYPTO_SM2_KEP=y (default y) wich currently requires that CFG_CRYPTOLIB_NAME=tomcrypt. An Mbed TLS implementation could be added later if needed.
[1] http://www.gmbz.org.cn/main/postDetail.html?id=20180724110812
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1c832d7c | 17-Dec-2019 |
davidwang <davidwang@realtek.com> |
core: support shared irq
With some platforms would have multiplexed interrupts and software implement difference interrupt handler. Currently the interrupt mechanism only handle the first matched ha
core: support shared irq
With some platforms would have multiplexed interrupts and software implement difference interrupt handler. Currently the interrupt mechanism only handle the first matched handler, and can not support shared irq.
New change to keep find another matched handler if the previous handler return none.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: davidwang <davidwang@realtek.com>
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| 0f151943 | 17-Dec-2019 |
Jerome Forissier <jerome@forissier.org> |
core: crypto add support for SM2 DSA
Adds SM2 Digital Signature Algorithm [1] using LibTomCrypt. The TA interface complies with the GlobalPlatform TEE Internal Core API version 1.2.
SM2 DSA is enab
core: crypto add support for SM2 DSA
Adds SM2 Digital Signature Algorithm [1] using LibTomCrypt. The TA interface complies with the GlobalPlatform TEE Internal Core API version 1.2.
SM2 DSA is enabled with CFG_CRYPTO_SM2_DSA=y (default y) which currently requires that CFG_CRYPTOLIB_NAME=tomcrypt. An Mbed TLS implementation could be added later if needed.
[1] http://www.gmbz.org.cn/main/postDetail.html?id=20180724110812
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 91fc6bd8 | 17-Dec-2019 |
Jerome Forissier <jerome@forissier.org> |
core: crypto: add support for SM2 PKE
Adds SM2 Public Key Encryption [1] using LibTomCrypt. The TA interface complies with the GlobalPlatform TEE Internal Core API version 1.2.
SM2 is enabled with
core: crypto: add support for SM2 PKE
Adds SM2 Public Key Encryption [1] using LibTomCrypt. The TA interface complies with the GlobalPlatform TEE Internal Core API version 1.2.
SM2 is enabled with CFG_CRYPTO_SM2_PKE=y (default y) which currently requires that CFG_CRYPTOLIB_NAME=tomcrypt. An Mbed TLS implementation could be added later if needed.
[1] http://www.gmbz.org.cn/main/postDetail.html?id=20180724110812
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 47645577 | 13-Dec-2019 |
Jerome Forissier <jerome@forissier.org> |
core: crypto: add support for SM3
Adds support for the SM3 cryptographic hash function [1] using the API defined in the GlobalPlatform TEE Internal Core API v1.2, as well as the HMAC based on this h
core: crypto: add support for SM3
Adds support for the SM3 cryptographic hash function [1] using the API defined in the GlobalPlatform TEE Internal Core API v1.2, as well as the HMAC based on this hash.
This implementation is based on code published on Gitlab [2]. See commit ade6f848e084 ("core: crypto: add support for SM4") for details.
[1] https://tools.ietf.org/html/draft-sca-cfrg-sm3-02 [2] https://gitlab.com/otpfree/sm234
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| ade6f848 | 12-Dec-2019 |
Jerome Forissier <jerome@forissier.org> |
core: crypto: add support for SM4
Adds support for the SM4 cipher [1] using the API defined in the GlobalPlatform TEE Internal Core API v1.2.
ECB, CBC and CTR modes are implemented. Other modes are
core: crypto: add support for SM4
Adds support for the SM4 cipher [1] using the API defined in the GlobalPlatform TEE Internal Core API v1.2.
ECB, CBC and CTR modes are implemented. Other modes are valid but are not included in the GP specification, so they are not considered here.
This implementation is based on code published on Gitlab [2]. The project contains no licensing terms, so I contacted the author (goldboar@163.com), asking for permission to re-use the code in OP-TEE under a BSD-2-Clause license. I received the following reply:
"[...] If you like you can use it [...]"
I have reworked the source to better fit the OP-TEE coding style. I have also added the CTR mode of operation.
I do not think we will need to merge any change from upstream in the future.
[1] https://tools.ietf.org/html/draft-ribose-cfrg-sm4-10 [2] https://gitlab.com/otpfree/sm234
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| c6744caa | 22-Nov-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add fobj_ro_reloc_paged_alloc()
Adds a new type of fobj, struct fobj_ro_reloc_paged, which is created with fobj_ro_reloc_paged_alloc(). It's like struct fobj_rop but with support for relocatio
core: add fobj_ro_reloc_paged_alloc()
Adds a new type of fobj, struct fobj_ro_reloc_paged, which is created with fobj_ro_reloc_paged_alloc(). It's like struct fobj_rop but with support for relocation too.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 15ba8c1f | 15-Nov-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: move VFP state into struct user_ta_ctx
Moves the VFP state from struct user_ta_ctx to struct user_mode_ctx to make user mode handling a bit more generic.
Acked-by: Pipat Methavanitpong <pipat
core: move VFP state into struct user_ta_ctx
Moves the VFP state from struct user_ta_ctx to struct user_mode_ctx to make user mode handling a bit more generic.
Acked-by: Pipat Methavanitpong <pipat.methavanitpong@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 7c732ee4 | 07-Oct-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: get svc handler from the context of current session
Instead of a single global syscalls definition, get the syscall handler function from the context of current active session.
An extra optio
core: get svc handler from the context of current session
Instead of a single global syscalls definition, get the syscall handler function from the context of current active session.
An extra optional (mandatory for user mode TAs) function pointer is added to struct tee_ta_ops, handle_svc, which handles the syscall.
tee_svc_handler() is split into a generic thread_svc_handler() which is put in kernel/thread.c. The user TA specific part is put in user_ta_handle_svc() which is kept in tee/arch_svc.c but made available via the new .handle_svc function pointer of struct tee_ta_ops.
Acked-by: Pipat Methavanitpong <pipat.methavanitpong@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5343f09f | 07-Oct-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add common user_mode_ctx_print_mappings()
Adds a common user_mode_ctx_print_mappings() which prints the current user mode mappings.
Acked-by: Pipat Methavanitpong <pipat.methavanitpong@linaro
core: add common user_mode_ctx_print_mappings()
Adds a common user_mode_ctx_print_mappings() which prints the current user mode mappings.
Acked-by: Pipat Methavanitpong <pipat.methavanitpong@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1936dfc7 | 07-Oct-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add struct user_mode_ctx
Adds struct user_mode_ctx which replaces user mode specific fields used for memory mapping.
Acked-by: Pipat Methavanitpong <pipat.methavanitpong@linaro.org> Acked-by:
core: add struct user_mode_ctx
Adds struct user_mode_ctx which replaces user mode specific fields used for memory mapping.
Acked-by: Pipat Methavanitpong <pipat.methavanitpong@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b19db423 | 18-Nov-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add description of struct shdr_bootstrap_ta
Adds a description of the fields in struct shdr_bootstrap_ta.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <j
core: add description of struct shdr_bootstrap_ta
Adds a description of the fields in struct shdr_bootstrap_ta.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 9246c1f6 | 25-Nov-2019 |
Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> |
drivers: Add func to config gpio pin for secure access
Add func to config gpio pin for secure access
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Acked-by: Jerome Forissier <jero
drivers: Add func to config gpio pin for secure access
Add func to config gpio pin for secure access
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| e1afc439 | 18-Nov-2019 |
Sumit Garg <sumit.garg@linaro.org> |
core: add framework to load REE-FS encrypted TAs
Add framework to support loading of encrypted TAs from REE-FS using symmetric authenticated encryption scheme supported by OP-TEE.
The default encry
core: add framework to load REE-FS encrypted TAs
Add framework to support loading of encrypted TAs from REE-FS using symmetric authenticated encryption scheme supported by OP-TEE.
The default encryption key is derived from hardware unique key which can be overridden via platform specific encryption key.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 9b726349 | 11-Nov-2019 |
Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> |
drivers: bnxt: Add driver support for additional bnxt cmds
Add driver support for following bnxt commands: - HEALTH_STATUS - HANDSHAKE_STATUS - CRASH_DUMP_COPY
Signed-off-by: Vikas Gupta <vikas.
drivers: bnxt: Add driver support for additional bnxt cmds
Add driver support for following bnxt commands: - HEALTH_STATUS - HANDSHAKE_STATUS - CRASH_DUMP_COPY
Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com> Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 5f2bc144 | 19-Aug-2019 |
Vikas Gupta <vikas.gupta@broadcom.com> |
drivers: bnxt: Load bnxt images from secure memory
Load bnxt images from the secure memory at 1K offset, If found on the secure memory instead of flash. We copy the images from flash to secure memor
drivers: bnxt: Load bnxt images from secure memory
Load bnxt images from the secure memory at 1K offset, If found on the secure memory instead of flash. We copy the images from flash to secure memory for the very first time
Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com> Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| b9651492 | 11-Nov-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: reference count struct mobj
The mobj interface is changed to use reference counting of mobjs, the direct mobj_free() call is replaced by mobj_put(). As expected a mobj_get() is also added to h
core: reference count struct mobj
The mobj interface is changed to use reference counting of mobjs, the direct mobj_free() call is replaced by mobj_put(). As expected a mobj_get() is also added to handle multiple references to the same mobj.
This also changes already present reference counting in struct mobj_reg_shm to use the reference counting mechanism now available in struct mobj.
The VM_FLAG_EXCLUSIVE_MOBJ flag is removed since the referenced mobj is put instead when a struct vm_region is removed.
Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey960) Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e4632aa2 | 29-May-2019 |
Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> |
drivers: gic: Add GIC_SPI/SGI/PPI helper macros
Add GIC_SPI/SGI/PPI helper macros
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Sheetal Tigadoli <sheetal.tiga
drivers: gic: Add GIC_SPI/SGI/PPI helper macros
Add GIC_SPI/SGI/PPI helper macros
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Reviewed-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 52ee414b | 04-Mar-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove algo from crypto_authenc_*()
Removes the algo parameters from all crypto_authenc_*() functions except crypto_authenc_alloc_ctx().
Reviewed-by: Etienne Carriere <etienne.carriere@linaro
core: remove algo from crypto_authenc_*()
Removes the algo parameters from all crypto_authenc_*() functions except crypto_authenc_alloc_ctx().
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c69bc615 | 02-Mar-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove algo from crypto_mac_*()
Removes the algo parameters from all crypto_mac_*() functions except crypto_mac_alloc_ctx().
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-
core: remove algo from crypto_mac_*()
Removes the algo parameters from all crypto_mac_*() functions except crypto_mac_alloc_ctx().
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cbda7091 | 02-Mar-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove algo from crypto_cipher_*()
Removes the algo parameters from all crypto_cipher_*() functions except crypto_cipher_alloc_ctx().
tee_aes_cbc_cts_update() is moved into aes-cts.c and rena
core: remove algo from crypto_cipher_*()
Removes the algo parameters from all crypto_cipher_*() functions except crypto_cipher_alloc_ctx().
tee_aes_cbc_cts_update() is moved into aes-cts.c and renamed to cbc_cts_update().
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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