arm32: Adds LPAE support

Enables use of Large Physical Address Extension (LPAE) with
CFG_WITH_LPAE=y

To facilitate both the old V7 and the new LPAE translation tables an
abstraction layer has been

arm32: Adds LPAE support

Enables use of Large Physical Address Extension (LPAE) with
CFG_WITH_LPAE=y

To facilitate both the old V7 and the new LPAE translation tables an
abstraction layer has been added to avoid direct manipulations of the
translation tables.

Both V7 and LPAE implementation uses TEX remapping (SCTLR.TRE = 1) and
enables access flags (SCTLR.AFE = 1). This is a change in the V7 code
base as those bits where 0 before. There are two reason for this change:
1."From the introduction of the Large Physical Address Extension, ARM
deprecates any use of the AP[2:0] scheme for defining MMU access
permissions. This deprecation applies to software for all ARMv7-A
implementations, regardless of whether they include the Large
Physical Address Extension."
2. With SCTLR.TRE = 1 and SCTLR.AFE = 1 V7 and LPAE implementations uses
the same way of specifying access permissions and memory attributes.

Currently only supported on plat-vexpress.

Bugfix v7 config: sets NOS bit in TTBRx registers

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP Base model)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

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tee_mm: remove legacy TEE_MM_POOL_PAGED define

Removes the legacy TEE_MM_POOL_PAGED define and unsused code
associated with it.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by

tee_mm: remove legacy TEE_MM_POOL_PAGED define

Removes the legacy TEE_MM_POOL_PAGED define and unsused code
associated with it.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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core: generic buffer inside/outside/intersect routine

Remove multiple implementation of "is buffer inside a buffer" and
friends and rely on a generic core_is_buffer_inside/outside/intersect().

Revi

core: generic buffer inside/outside/intersect routine

Remove multiple implementation of "is buffer inside a buffer" and
friends and rely on a generic core_is_buffer_inside/outside/intersect().

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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Remove some assembly files

Removes kta_table_unpg_asm.S,
Remove tee_pager_unpg_asm.S
Removes tee_mmu_unpg_asm.S
* Replaces assembly implementation of tee_mmu_switch()
with a C version
* Replaces c

Remove some assembly files

Removes kta_table_unpg_asm.S,
Remove tee_pager_unpg_asm.S
Removes tee_mmu_unpg_asm.S
* Replaces assembly implementation of tee_mmu_switch()
with a C version
* Replaces calls to tee_mmu_invtlb_asid with
secure_mmu_unifiedtlbinv_byasid

Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Optimize mmu handling

Previously there was two complete L1 mmu tables where one was only
used when kernel mapping was active and the other when user mapping
was active too. In addition to that there

Optimize mmu handling

Previously there was two complete L1 mmu tables where one was only
used when kernel mapping was active and the other when user mapping
was active too. In addition to that there was several sets of L2 mmu
tables which where unused.

Now there's only one complete L1 mmu table shared by all CPUs. There's
one small L1 mmu table for each thread used to keep user mappings. The
small L1 mmu tables takes each 128 bytes and can spans 32 MiB of
virtual memory.

This change saves memory ~32 KiB, but also prepares for multiprocessing
since each thread has its own user mapping.

Due to the change of mmu table handling many low level assembly and C
functions are changed, and some even removed.

Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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tee_mmu_is_mapped cleanup

Fix strict-aliasing for DEBUG=0

Open-source the TEE Core

Signed-off-by: Pascal Brand <pascal.brand@st.com>