History log of /optee_os/core/drivers/ (Results 976 – 1000 of 1288)
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c673834016-Oct-2020 Cedric Neveux <cedric.neveux@nxp.com>

drivers: caam: increases RSA prime retry

Change the RSA Primes generation retry loops:
- Reduce number of loops set in the job ring descriptor.
- Add software loop to not lock the system.

Total ret

drivers: caam: increases RSA prime retry

Change the RSA Primes generation retry loops:
- Reduce number of loops set in the job ring descriptor.
- Add software loop to not lock the system.

Total retry loop has been increased because RSA 4096 generation
key test might fail sometimes.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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9007275317-Feb-2021 Clement Faure <clement.faure@nxp.com>

drivers: caam: remove unused SGT functions

Remove not longer used SGT functions.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

6997f69808-Apr-2020 Cedric Neveux <cedric.neveux@nxp.com>

drivers: caam: use CAAM DMA object in math driver

Update the math driver to use the CAAM DMA object

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@lin

drivers: caam: use CAAM DMA object in math driver

Update the math driver to use the CAAM DMA object

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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a9591ed506-Apr-2020 Cedric Neveux <cedric.neveux@nxp.com>

drivers: caam: use CAAM DMA object in RSA

Update the RSA driver to use the CAAM DMA object

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

eafbaf2c31-Mar-2020 Cedric Neveux <cedric.neveux@nxp.com>

drivers: caam: use CAAM DMA object in Cipher

Update Cipher driver to use the CAAM DMA object
- Cipher AES/DES/DES3 all modes
- Cipher MAC

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Sign

drivers: caam: use CAAM DMA object in Cipher

Update Cipher driver to use the CAAM DMA object
- Cipher AES/DES/DES3 all modes
- Cipher MAC

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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3dface8c27-Mar-2020 Cedric Neveux <cedric.neveux@nxp.com>

drivers: caam: use CAAM DMA object in HMAC

Update HMAC driver to use the CAAM DMA object

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Ac

drivers: caam: use CAAM DMA object in HMAC

Update HMAC driver to use the CAAM DMA object

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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865a579225-Mar-2020 Cedric Neveux <cedric.neveux@nxp.com>

drivers: caam: use CAAM DMA object in Hash

Update Hash driver to use the CAAM DMA object

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Ac

drivers: caam: use CAAM DMA object in Hash

Update Hash driver to use the CAAM DMA object

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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53d714df27-Mar-2020 Cedric Neveux <cedric.neveux@nxp.com>

drivers: caam: add dmaobj descriptor functions

Add descriptor operation to handle caamdmaobj to set:
- SGT data type
- Extension length

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by

drivers: caam: add dmaobj descriptor functions

Add descriptor operation to handle caamdmaobj to set:
- SGT data type
- Extension length

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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38923d4827-Mar-2020 Cedric Neveux <cedric.neveux@nxp.com>

drivers: caam: implement CAAM DMA Object

Implementation of a CAAM DMA object to:
- create a DMA object (SGT/buffer) based on input/output buffers
- reallocate a new buffer accessible from the CA

drivers: caam: implement CAAM DMA Object

Implementation of a CAAM DMA object to:
- create a DMA object (SGT/buffer) based on input/output buffers
- reallocate a new buffer accessible from the CAAM address space
- ensure buffer is cache aligned (for the output)

Implementation of CAAM DMA object functions to:
- cache maintenance
- free CAAM DMA object

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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e0e51e3f05-Mar-2021 Franck LENORMAND <franck.lenormand@nxp.com>

drivers: caam: fix read of length of D component

Read the RSA D component with caam_read_val32() which handles
endianness.
The CAAM endianness might differ between IMX and LS platforms.

Signed-off-

drivers: caam: fix read of length of D component

Read the RSA D component with caam_read_val32() which handles
endianness.
The CAAM endianness might differ between IMX and LS platforms.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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659a1f8809-Mar-2021 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: rename agent_id to channel_id

Rename agent_id reference to channel_id to avoid confusion with the
agent identifiers used in SCMI protocol to identify agent, whereas
the drivers on

drivers: scmi-msg: rename agent_id to channel_id

Rename agent_id reference to channel_id to avoid confusion with the
agent identifiers used in SCMI protocol to identify agent, whereas
the drivers only reference an SCMI channel, whatever the agent ID
associated with the channel and knowing that an SCMI agent can have
several channels to communicate with the SCMI platform/server.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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de266e2723-Feb-2021 Jorge Ramirez-Ortiz <jorge@foundries.io>

drivers: imx_rngb: random number generator

Add support for the RNG(B) as described in the i.MX 6ULL Applications
Processor Reference Manual, Rev 1, 11/2017.

Tested on an imx6ull based board.

Signe

drivers: imx_rngb: random number generator

Add support for the RNG(B) as described in the i.MX 6ULL Applications
Processor Reference Manual, Rev 1, 11/2017.

Tested on an imx6ull based board.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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65b5ada402-Mar-2021 Marouene Boubakri <marouene.boubakri@nxp.com>

core: drivers: stm32_rng.c: include thread.h

The implementation makes use of thread_mask_exceptions() and
thread_unmask_exceptions() functions, therefore, include thread.h to avoid
compilation error

core: drivers: stm32_rng.c: include thread.h

The implementation makes use of thread_mask_exceptions() and
thread_unmask_exceptions() functions, therefore, include thread.h to avoid
compilation errors.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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8537f7eb02-Mar-2021 Marouene Boubakri <marouene.boubakri@nxp.com>

core: driver: stpmic1: do not use TEE_Result as return type

stpmic1_regulator_levels_mv() uses TEE_Result as return type.
The caller on core/arch/arm/plat-stm32mp1/scmi_server.c does
not check the r

core: driver: stpmic1: do not use TEE_Result as return type

stpmic1_regulator_levels_mv() uses TEE_Result as return type.
The caller on core/arch/arm/plat-stm32mp1/scmi_server.c does
not check the return value, therefore, change it to void.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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4a9ea08c08-Mar-2021 Fangsuo Wu <fangsuowu@asrmicro.com>

drivers: gic: fix the off-by-one error

The gd->max_it should refer to the largest support interrupt id.
Fix the off-by-one errors so that the interrupt with the largest
id can be correctly handled.

drivers: gic: fix the off-by-one error

The gd->max_it should refer to the largest support interrupt id.
Fix the off-by-one errors so that the interrupt with the largest
id can be correctly handled.

Acked-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Fangsuo Wu <fangsuowu@asrmicro.com>

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3513f26903-Mar-2021 Manish Tomar <manish.tomar@nxp.com>

plat-ls: Add DSPI driver for NXP LS Platforms

This patch adds DSPI driver for Layerscape Platforms.
DSPI compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.

Signed-off-by: Carl Lamb

plat-ls: Add DSPI driver for NXP LS Platforms

This patch adds DSPI driver for Layerscape Platforms.
DSPI compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.

Signed-off-by: Carl Lamb <calamb@microsoft.com>
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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/optee_os/.azure-pipelines.yml
/optee_os/.shippable.yml
/optee_os/MAINTAINERS
/optee_os/core/arch/arm/include/ffa.h
/optee_os/core/arch/arm/include/kernel/abort.h
/optee_os/core/arch/arm/include/kernel/secure_partition.h
/optee_os/core/arch/arm/include/kernel/spmc_sp_handler.h
/optee_os/core/arch/arm/include/kernel/thread.h
/optee_os/core/arch/arm/include/kernel/thread_spmc.h
/optee_os/core/arch/arm/kernel/abort.c
/optee_os/core/arch/arm/kernel/ldelf_loader.c
/optee_os/core/arch/arm/kernel/otp_stubs.c
/optee_os/core/arch/arm/kernel/secure_partition.c
/optee_os/core/arch/arm/kernel/spmc_sp_handler.c
/optee_os/core/arch/arm/kernel/stmm_sp.c
/optee_os/core/arch/arm/kernel/sub.mk
/optee_os/core/arch/arm/kernel/thread.c
/optee_os/core/arch/arm/kernel/thread_private.h
/optee_os/core/arch/arm/kernel/thread_spmc.c
/optee_os/core/arch/arm/kernel/thread_spmc_a64.S
/optee_os/core/arch/arm/kernel/user_ta.c
/optee_os/core/arch/arm/plat-ls/conf.mk
ls_dspi.c
sub.mk
/optee_os/core/include/drivers/ls_dspi.h
/optee_os/core/include/kernel/ldelf_loader.h
/optee_os/core/include/kernel/linker.h
/optee_os/core/include/kernel/pseudo_ta.h
/optee_os/core/include/kernel/time_source.h
/optee_os/core/include/kernel/timer.h
/optee_os/core/include/kernel/unwind.h
/optee_os/core/include/kernel/user_mode_ctx.h
/optee_os/core/include/kernel/user_ta.h
/optee_os/core/kernel/ldelf_syscalls.c
/optee_os/core/kernel/sub.mk
/optee_os/core/kernel/user_access.c
/optee_os/core/tee/sub.mk
/optee_os/ldelf/main.c
/optee_os/ta/pkcs11/src/entry.c
/optee_os/ta/pkcs11/src/object.c
/optee_os/ta/pkcs11/src/object.h
/optee_os/ta/pkcs11/src/persistent_token.c
/optee_os/ta/pkcs11/src/pkcs11_attributes.c
/optee_os/ta/pkcs11/src/pkcs11_attributes.h
/optee_os/ta/pkcs11/src/pkcs11_token.c
/optee_os/ta/pkcs11/src/pkcs11_token.h
/optee_os/ta/pkcs11/src/processing.c
/optee_os/ta/pkcs11/src/processing.h
/optee_os/ta/pkcs11/src/processing_symm.c
/optee_os/ta/trusted_keys/entry.c
16c13b4d23-Feb-2021 Manish Tomar <manish.tomar@nxp.com>

plat-ls: Add GPIO driver for NXP LS Platforms

This patch adds GPIO driver for Layerscape Platforms.
GPIO compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.

Signed-off-by: Manish Tom

plat-ls: Add GPIO driver for NXP LS Platforms

This patch adds GPIO driver for Layerscape Platforms.
GPIO compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.

Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Acked-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>

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fc5d98e823-Feb-2021 Manish Tomar <manish.tomar@nxp.com>

core: gpio.h: Add 'struct gpio_chip *chip' in 'struct gpio_ops'

To get the GPIO controller base address, 'struct gpio_chip *chip' is passed
as a member in the container 'struct gpio_ops'

Also updat

core: gpio.h: Add 'struct gpio_chip *chip' in 'struct gpio_ops'

To get the GPIO controller base address, 'struct gpio_chip *chip' is passed
as a member in the container 'struct gpio_ops'

Also updated bcm_gpio and pl061_gpio as per modified gpio.h definition.

Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Reviewed-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>

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6c2162fa12-Feb-2021 Clement Faure <clement.faure@nxp.com>

drivers: caam: fix allocated buffer size

When a buffer is allocated for output CAAM operations,
the output buffer cache is invalidated beforehand.

To avoid data loss, an allocated buffer size shoul

drivers: caam: fix allocated buffer size

When a buffer is allocated for output CAAM operations,
the output buffer cache is invalidated beforehand.

To avoid data loss, an allocated buffer size should be a
multiple data cacheline size.

Fixes: b22795b ("drivers: caam: make use of generic memalign() implementation")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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a392e11212-Feb-2021 Clement Faure <clement.faure@nxp.com>

drivers: caam: use dcache_get_line_size()

Remove CAAM function to get the data cache line size and
use the generic function.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jens W

drivers: caam: use dcache_get_line_size()

Remove CAAM function to get the data cache line size and
use the generic function.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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819d014120-Nov-2020 Sahil Malhotra <sahil.malhotra@nxp.com>

plat-ls: add i2c driver for NXP LS Platforms

I2C Driver compilation is enabled by default for LX2160A-RDB
and LX2160A-QDS.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Jens W

plat-ls: add i2c driver for NXP LS Platforms

I2C Driver compilation is enabled by default for LX2160A-RDB
and LX2160A-QDS.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Clement Faure <clement.faure@nxp.com>

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41494d1812-Feb-2021 Jorge Ramirez-Ortiz <jorge@foundries.io>

crypto: se050: Foundries Plug-and-Trust Release 0.0.2

The Foundries Plug-and-Trust library tracks NXP Plug-and-Trust
quaterly releases.

Modifications in the NXP library sources require a new prepro

crypto: se050: Foundries Plug-and-Trust Release 0.0.2

The Foundries Plug-and-Trust library tracks NXP Plug-and-Trust
quaterly releases.

Modifications in the NXP library sources require a new preprocessor
macro to be defined.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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530faff212-Feb-2021 Jorge Ramirez-Ortiz <jorge@foundries.io>

drivers: crypto: se050: improve maintainability

Replace explicit c-flags duplication across makefiles with single
shared definition.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed

drivers: crypto: se050: improve maintainability

Replace explicit c-flags duplication across makefiles with single
shared definition.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

show more ...

b22795b722-Jan-2021 Clement Faure <clement.faure@nxp.com>

drivers: caam: make use of generic memalign() implementation

Make use of the newly implemented memalign() function for the CAAM
driver.
Remove the previous CAAM memalign() implementation and its ass

drivers: caam: make use of generic memalign() implementation

Make use of the newly implemented memalign() function for the CAAM
driver.
Remove the previous CAAM memalign() implementation and its associated
debugging structures.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

93e678ed24-Sep-2020 Clement Faure <clement.faure@nxp.com>

drivers: dcp: add DCP support

The Data Co-Processor (DCP) provides hardware acceleraiton for
cryptographic algorithms. The features of DCP are:
- AES128 ECB and CBC
- SHA1, SHA256
- AES128-CMAC a

drivers: dcp: add DCP support

The Data Co-Processor (DCP) provides hardware acceleraiton for
cryptographic algorithms. The features of DCP are:
- AES128 ECB and CBC
- SHA1, SHA256
- AES128-CMAC algorithm
- SRAM key storage
- HUK generation

This driver adds DCP support for the following platforms:
- imx6slevk
- imx6sllevk
- imx6ullevk
- imx6ulzevk

Signed-off-by: Remi Koman <remi.koman@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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