drivers: caam: fix potential memory leak

Free CAAM buffer pabufs before exiting the function in case of an error.

Fixes: 38923d487 ("drivers: caam: implement CAAM DMA Object")
Signed-off-by: Clemen

drivers: caam: fix potential memory leak

Free CAAM buffer pabufs before exiting the function in case of an error.

Fixes: 38923d487 ("drivers: caam: implement CAAM DMA Object")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: avoid arithmetic operation for pointer assignment

To parse the pointer array priv->sgtdata[], use this syntax array[idx]
instead of array + idx.
The new syntax is easier to read and l

drivers: caam: avoid arithmetic operation for pointer assignment

To parse the pointer array priv->sgtdata[], use this syntax array[idx]
instead of array + idx.
The new syntax is easier to read and less prone to errors.

Fixes: 38923d48 ("drivers: caam: implement CAAM DMA Object")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: crypto: aspeed: hace: fix digest incorrect problem

1. The processing status variable is not set to TEE_SUCCESS if
everything works fine.
2. DMA memory needs physically contiguous memory. Al

drivers: crypto: aspeed: hace: fix digest incorrect problem

1. The processing status variable is not set to TEE_SUCCESS if
everything works fine.
2. DMA memory needs physically contiguous memory. Allocate aligned
DMA memory and copy data from/to DMA memory to make sure consistency
of data.

Signed-off-by: Neal Liu <neal_liu@aspeedtech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: crypto: aspeed: hace: resolve build issues

Resolve various build and typo issues.

Fixes: commit e752c173aa0f ("crypto/aspeed: ast2600: Add HACE HW hash support")
Signed-off-by: Neal Liu <n

drivers: crypto: aspeed: hace: resolve build issues

Resolve various build and typo issues.

Fixes: commit e752c173aa0f ("crypto/aspeed: ast2600: Add HACE HW hash support")
Signed-off-by: Neal Liu <neal_liu@aspeedtech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: caam: add JR interrupt only if CFG_CAAM_ITR=y

Adding the JR interrupt in the OPTEE CAAM driver, even if not used in
OPTEE, prevents the Linux CAAM driver from using the JR interrupt on
plat

drivers: caam: add JR interrupt only if CFG_CAAM_ITR=y

Adding the JR interrupt in the OPTEE CAAM driver, even if not used in
OPTEE, prevents the Linux CAAM driver from using the JR interrupt on
platforms sharing the same line of interruption for all job rings.

To dequeue job from the job ring, the Linux CAAM driver would pull the
number of jobs done from the output ring slot full register.

The fix is to add the JR interrupt only if CFG_CAAM_ITR=y. This
allows the Linux CAAM driver to dequeue jobs faster than polling from
a register.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: caam: fix function definition when CFG_CAAM_NO_ITR=y

There is a bug in the CAAM JR interruption enablement logic. When
CFG_CAAM_NO_ITR=y, the JR interruptions are used and when
CFG_CAAM_NO_

drivers: caam: fix function definition when CFG_CAAM_NO_ITR=y

There is a bug in the CAAM JR interruption enablement logic. When
CFG_CAAM_NO_ITR=y, the JR interruptions are used and when
CFG_CAAM_NO_ITR=n, the JR interruptions are not used.

Even with this wrong logic, the CAAM is still able to enqueue jobs.
When no JR interruptions are received, the CAAM will manually dequeue
jobs from the jobring by checking the number of jobs done in the output
ring slots full register.

CAAM JR interruptions are not mandatory for the CAAM to work properly
but it makes the dequeuing faster than polling the output ring slot full
register.

To avoid confusion, replace CFG_CAAM_NO_ITR with CFG_CAAM_ITR. The
CFG_CAAM_ITR is enabled by default and platforms not using the JR
interruptions would have this flag disabled instead.

Fixes: 3f45afc31 ("drivers: caam: disable the use of interrupts for some platforms")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: clk: Fix check for assigned-clock-rates index

Index should actually be strictly less than rate_len. Fix this which
might happen with the following description:

assigned-clock = <foo>, <bar

drivers: clk: Fix check for assigned-clock-rates index

Index should actually be strictly less than rate_len. Fix this which
might happen with the following description:

assigned-clock = <foo>, <bar>;
assigned-clock-parents = <foo_parent>, <bar_parent>;
assigned-clock-rates = <1000>;

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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drivers: tzc380: fix the lockdown range register value

This register controls the range of regions that are locked down.
The number of regions to lockdown are defined in [1]:
lockdown_range[3:0] and

drivers: tzc380: fix the lockdown range register value

This register controls the range of regions that are locked down.
The number of regions to lockdown are defined in [1]:
lockdown_range[3:0] and its value goes from b0000 to b1111.

If the goal of tzc_regions_lockdown() is to lock all regions supported
by the platforms, then the value of lockdown_range[3:0] should be equal
to no_of_regions[3:0] of the configuration register [2].

Currently, tzc.num_regions is used to defined the lockdown range which
is incorrect because it has been incremented during initialization.
Fix the issue by decrementing tzc.num_regions before the configuration
of lockdown_range[3:0].

Link: [1] https://developer.arm.com/documentation/ddi0431/c/programmers-model/register-descriptions/lockdown-range-register
Link: [2] https://developer.arm.com/documentation/ddi0431/c/programmers-model/register-descriptions/configuration-register
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: stpmic1: export regulators API in a specific header file

Split stpmic1.h in 2 parts, one specifically for STPMIC1 regulator
interface.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

drivers: stpmic1: export regulators API in a specific header file

Split stpmic1.h in 2 parts, one specifically for STPMIC1 regulator
interface.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: imx_i2c: add support for MX8MP

Add I2C driver support for iMX8MP.

Signed-off-by: Vanessa Maegima <vanessa.maegima@foundries.io>
Acked-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jo

drivers: imx_i2c: add support for MX8MP

Add I2C driver support for iMX8MP.

Signed-off-by: Vanessa Maegima <vanessa.maegima@foundries.io>
Acked-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.io>

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drivers/tpm2: Startup TPM when chip is registered

When tpm2 chip is registered, call the initialization
sequence of tpm to do self test and startup the tpm chip.

Signed-off-by: Ruchika Gupta <ruchi

drivers/tpm2: Startup TPM when chip is registered

When tpm2 chip is registered, call the initialization
sequence of tpm to do self test and startup the tpm chip.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers/tpm2: Add basic structure for commands

Add infrastructure for TPM2 commands based on [1].

Few basic commands like TPM2 Startup and Selftest. These
will be used by device driver during initi

drivers/tpm2: Add basic structure for commands

Add infrastructure for TPM2 commands based on [1].

Few basic commands like TPM2 Startup and Selftest. These
will be used by device driver during initialization.

[1] Trusted Platform Module Library Part 3: Commands
Family “2.0” Level 00 Revision 01.59

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers/tpm2: Add TPM2 MMIO driver

Add support for platforms that interface with TPM2 via
MMIO using FIFO protocol.

Co-developed-by: Victor Chong <victor.chong@linaro.org>
Signed-off-by: Victor Cho

drivers/tpm2: Add TPM2 MMIO driver

Add support for platforms that interface with TPM2 via
MMIO using FIFO protocol.

Co-developed-by: Victor Chong <victor.chong@linaro.org>
Signed-off-by: Victor Chong <victor.chong@linaro.org>
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers/tpm2: Add basic TPM2 support in OP-TEE

TPM2 driver introduced in this commit is based on TPM TCG
specification [1] & [2].

The APIs exposed allows to send commands and receive response
from

drivers/tpm2: Add basic TPM2 support in OP-TEE

TPM2 driver introduced in this commit is based on TPM TCG
specification [1] & [2].

The APIs exposed allows to send commands and receive response
from a TPM2 chip.

[1] TCG PC Client Platform TPM Profile Specification for TPM 2.0
Vesrion 1.0.5 Revision 14
[2] TCG PC Client Device Driver Design Principles for TPM 2.0
Version 1.1 Revision 0.04

Co-developed-by: Victor Chong <victor.chong@linaro.org>
Signed-off-by: Victor Chong <victor.chong@linaro.org>
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: add CFG_DRIVERS_CLK_EARLY_PROBE

Adds configuration switch to allow clocks to be probed as any driver,
possibly deferring initialization. This is needed when a clock driver
has dependen

drivers: clk: add CFG_DRIVERS_CLK_EARLY_PROBE

Adds configuration switch to allow clocks to be probed as any driver,
possibly deferring initialization. This is needed when a clock driver
has dependencies on another resource.

The configuration is default enabled (CFG_DRIVERS_CLK_EARLY_PROBE=y)
that is probing clock drivers before other drivers using the early_init
initcall level as done prior this change.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: stm32_iwdg: implementation of independent watchdog

Implements independent watchdog (IWDG) driver to help detecting
malfunctions due to software or hardware failures. IWDG instances
are cloc

drivers: stm32_iwdg: implementation of independent watchdog

Implements independent watchdog (IWDG) driver to help detecting
malfunctions due to software or hardware failures. IWDG instances
are clocked by an independent clock and stays active if the main
clock fails.

The driver mandates IWDG instances configuration from an embedded DTB.

For the list of features, refer to the reference manuals at:
https://wiki.st.com/stm32mpu/wiki/STM32MP15_resources

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

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drivers: add stm32 tamper domain driver

Adds stm32_tamp driver for stm32mp1 TAMP sub-system. The implementation
only covers probing of the driver upon embedded DTB content and enabling
some secure c

drivers: add stm32 tamper domain driver

Adds stm32_tamp driver for stm32mp1 TAMP sub-system. The implementation
only covers probing of the driver upon embedded DTB content and enabling
some secure configuration.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: crypto: stm32_cryp: fix coding style issues

Removes spurious space characters in stm32_cryp driver implementation
to conform with optee_os coding style.

Reviewed-by: Jerome Forissier <jero

drivers: crypto: stm32_cryp: fix coding style issues

Removes spurious space characters in stm32_cryp driver implementation
to conform with optee_os coding style.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: crypto: stm32_cryp: probe as a dt_driver

Changes stm32_cryp driver to register as a DT driver and support
probe deferral on clock and reset controller resources.

Acked-by: Jerome Forissier

drivers: crypto: stm32_cryp: probe as a dt_driver

Changes stm32_cryp driver to register as a DT driver and support
probe deferral on clock and reset controller resources.

Acked-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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clk: stm32mp13: add all clocks for STM32MP13

Registers all STM32PM13 clock with the clock framework.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Gabriel Fernandez <gabri

clk: stm32mp13: add all clocks for STM32MP13

Registers all STM32PM13 clock with the clock framework.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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clk: stm32mp13: Introduce STM32MP13 clocks platform

This driver uses a clk-stm32-core API to manage STM32 gates, dividers
and muxes.
The goal of this first patch is to parse the device tree and init

clk: stm32mp13: Introduce STM32MP13 clocks platform

This driver uses a clk-stm32-core API to manage STM32 gates, dividers
and muxes.
The goal of this first patch is to parse the device tree and initialize
a platform data to configure the clock tree.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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core: tag ops structures with __relrodata_unpaged

Global structures currently tagged with __rodata_unpaged need to use
__relrodata_unpaged instead because they contain pointers which are
subject to

core: tag ops structures with __relrodata_unpaged

Global structures currently tagged with __rodata_unpaged need to use
__relrodata_unpaged instead because they contain pointers which are
subject to relocation when CFG_CORE_ASLR=y. Doing so moves them out of
.rodata which will now stay unmodified even with ASLR turned on.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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driver: atmel_rtc: add driver for atmel RTC

On sama5d2, the RTC is included in a larger block of devices that can
only be secured as a whole (RSTC, WDT, etc). Since these other
peripherals needs to

driver: atmel_rtc: add driver for atmel RTC

On sama5d2, the RTC is included in a larger block of devices that can
only be secured as a whole (RSTC, WDT, etc). Since these other
peripherals needs to be secured, in order to still allow the RTC to be
used from non-secure world, add a driver for the RTC which will be
registered as the system RTC. The RTc PTA will then used this RTC to
set/get time from Linux using a RTC driver that uses the TEE subsystem.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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drivers: rtc: add RTC API

This API allows to interact with a RTC registered as the system RTC.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@l

drivers: rtc: add RTC API

This API allows to interact with a RTC registered as the system RTC.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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drivers: rstctrl: remove stm32_rstctrl legacy API functions

Removes stm32mp1 reset controllers legacy platform API functions and
moves declaration of stm32mp_rcc_reset_id_to_rstctrl() next to the
de

drivers: rstctrl: remove stm32_rstctrl legacy API functions

Removes stm32mp1 reset controllers legacy platform API functions and
moves declaration of stm32mp_rcc_reset_id_to_rstctrl() next to the
declaration of the remaining platform helper function related to reset
controllers: stm32mp_nsec_can_access_reset().

Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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