clk: stm32mp25: configure STGEN flexgen in .enable ops

STGEN flexgen is skipped during RCC probe to prevent misalignment
between stgen_clk frequency and STGEN register. Configure the STGEN
flexgen i

clk: stm32mp25: configure STGEN flexgen in .enable ops

STGEN flexgen is skipped during RCC probe to prevent misalignment
between stgen_clk frequency and STGEN register. Configure the STGEN
flexgen in the .enable ops so that it is configured after the STGEN
itself is configured and started.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_rtc: introduce STM32 RTC driver

Driver interface allows to read date&time from RTC device, generate
RTC timestamps and compute time delta between RTC date & time values.

The RTC is a

drivers: stm32_rtc: introduce STM32 RTC driver

Driver interface allows to read date&time from RTC device, generate
RTC timestamps and compute time delta between RTC date & time values.

The RTC is a firewall-aware peripheral. It means that the RTC driver is
in charge of configuring its own firewall restrictions and that the RTC
has dedicated firewall configuration registers.

The RTC provide APIs with time structure compatible with linux kernel
driver.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: atmel_rtc: fix and update RTC ranges

Use RTC_TIME() helper macro to initialize Atmel RTC ranges and fix its
month and weekday values. Also add the milliseconds field even though it's
not us

drivers: atmel_rtc: fix and update RTC ranges

Use RTC_TIME() helper macro to initialize Atmel RTC ranges and fix its
month and weekday values. Also add the milliseconds field even though it's
not used.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: rtc: add RTC functions and millisecond field

Add a millisecond field in the optee_rtc_time structure.

Add different APIs to manipulate optee_rtc_time structures:
rtc_is_a_leap_year(): Dete

drivers: rtc: add RTC functions and millisecond field

Add a millisecond field in the optee_rtc_time structure.

Add different APIs to manipulate optee_rtc_time structures:
rtc_is_a_leap_year(): Detects if the given year is a leap year
rtc_get_month_days(): Returns the number of day in the given month
rtc_timecmp(): Compare two time captures
rtc_diff_calendar_ms(): Returns the difference in milliseconds between
two time captures
rtc_diff_calendar_tick(): Returns the difference in number of ticks
between two time captures

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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clk: fix clk_get_rate() when parent clock rate was changed

clk_get_rate() returns a cached value of the clock rate.

If the rate of the parent clock changed, then the rate is not
synchronized. Chan

clk: fix clk_get_rate() when parent clock rate was changed

clk_get_rate() returns a cached value of the clock rate.

If the rate of the parent clock changed, then the rate is not
synchronized. Change the function to compute all clock parents' rates
and return the synchronized value.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Fixes: 2305544b3b9b ("drivers: clk: add generic clock framework")

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drivers: gic: Dynamically assign interrupts to non-secure world

Add gic_spi_release_to_ns() API function in GIC driver to release an
interrupt to Non secure settings. This functionality is essential

drivers: gic: Dynamically assign interrupts to non-secure world

Add gic_spi_release_to_ns() API function in GIC driver to release an
interrupt to Non secure settings. This functionality is essential for
scenarios where a specific interrupt needs to be dynamically set to
either Group 1 Secure (G1S) or Group 1 Non-Secure (G1NS) at different
times.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: microchip_pit: fix the length used for comparing the clock names

sizeof("syspll") equals to 7 with a character '\0' in count, adjust the
length used for the comparison to obtain the expecte

drivers: microchip_pit: fix the length used for comparing the clock names

sizeof("syspll") equals to 7 with a character '\0' in count, adjust the
length used for the comparison to obtain the expected result.
Move the test of "parent" into the while loop to improve debug convenience.

Fixes: 8796ab4a984f ("drivers: microchip_pit: add driver for sama7g54's pit64b")
Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: microchip_pit: fix the path of "dt_driver.h" included

change "#include <dt_driver.h>" to "#include <kernel/dt_driver.h>" due to
"dt_driver.h" is located at "core/include/kernel/" and the pa

drivers: microchip_pit: fix the path of "dt_driver.h" included

change "#include <dt_driver.h>" to "#include <kernel/dt_driver.h>" due to
"dt_driver.h" is located at "core/include/kernel/" and the path is not in
the include paths which would cause compile errors.

Fixes: 8796ab4a984f ("drivers: microchip_pit: add driver for sama7g54's pit64b")
Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: atmel_rstc: probe RSTC with reset controller and reset lines

Update the type of RSTC driver to DT_DRIVER_RSTCTRL and probe RSTC with
the concept of controller and lines.

Signed-off-by: Ton

drivers: atmel_rstc: probe RSTC with reset controller and reset lines

Update the type of RSTC driver to DT_DRIVER_RSTCTRL and probe RSTC with
the concept of controller and lines.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: atmel_rstc: add functions to allocate/get reset controller/lines

Define new functions for getting the reset controller, find or allocate
the reset lines.

Signed-off-by: Tony Han <tony.han@

drivers: atmel_rstc: add functions to allocate/get reset controller/lines

Define new functions for getting the reset controller, find or allocate
the reset lines.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: atmel_rstc: new data and functions to handle reset assert/deassert

Define new struct and functions for handling the reset controller, reset
lines and the reset operations (assert, deassert)

drivers: atmel_rstc: new data and functions to handle reset assert/deassert

Define new struct and functions for handling the reset controller, reset
lines and the reset operations (assert, deassert).

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: rename the sama7g5 UTMI clocks for USB PHY

The UTMI clocks for USB PHY are handled in OP-TEE due to they are
controlled by the registers from RSTC (reset controller) which is
alwa

drivers: clk: sam: rename the sama7g5 UTMI clocks for USB PHY

The UTMI clocks for USB PHY are handled in OP-TEE due to they are
controlled by the registers from RSTC (reset controller) which is
always-secured.
SCMI "reset domain management protocol" makes it prossible to handle the
resets from the kernel running in normal world. So the code in kernel for
these clocks need to be enabled. Here renaming the clocks to avoid
registering them failed from the kernel.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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clk: clk-stm32-core: fix use of ROUNDUP2_DIV() in stm32_div_get_rate()

Replace the use of ROUNDUP2_DIV() by ROUNDUP_DIV() in stm32_div_get_rate()
as some dividers may not be a power of two. In this

clk: clk-stm32-core: fix use of ROUNDUP2_DIV() in stm32_div_get_rate()

Replace the use of ROUNDUP2_DIV() by ROUNDUP_DIV() in stm32_div_get_rate()
as some dividers may not be a power of two. In this case, the platform
panics.

Fixes: 76d6685e5f3b ("tree-wide: use power-of-2 rounding macros where applicable")
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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tree-wide: use ROUNDUP_DIV() where applicable

Use ROUNDUP_DIV() instead of ROUNDUP(..., size) / size where applicable.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Je

tree-wide: use ROUNDUP_DIV() where applicable

Use ROUNDUP_DIV() instead of ROUNDUP(..., size) / size where applicable.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-telechips: Add initial support for Telechips platform (TCC805x)

This is the initial support for Telechips Platform (TCC805x).

* xtest results (-l 15):
| 334474 subtests of which 0 failed
| 108

plat-telechips: Add initial support for Telechips platform (TCC805x)

This is the initial support for Telechips Platform (TCC805x).

* xtest results (-l 15):
| 334474 subtests of which 0 failed
| 108 test cases of which 0 failed
| 0 test cases were skipped
| TEE test application done!

* Compiled with:
| make PLATFORM=telechips-tcc805x

Signed-off-by: Sungmin Han <sungminhan@telechips.com>
Signed-off-by: GY Hwang <gy.hwang@telechips.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: hisilicon: add pbkdf2 algorithm

Add pbkdf2 algorithm for hisilicon SEC driver.

Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

drivers: caam: introduce AE_CCM and AE_GCM compilation flags

imx6dl-sabresd, imx6q-sabresd, imx6sx-sdb does not support AES GCM

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: S

drivers: caam: introduce AE_CCM and AE_GCM compilation flags

imx6dl-sabresd, imx6q-sabresd, imx6sx-sdb does not support AES GCM

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: Add AES CCM

Implement CAAM AES CCM

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklande

drivers: caam: Add AES CCM

Implement CAAM AES CCM

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: Add AES GCM

Implement CAAM AES GCM

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklande

drivers: caam: Add AES GCM

Implement CAAM AES GCM

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: Add caam_cpy_buf_src()

Add caam_cpy_buf_src() function that copy a data buffer into a caam buffer.

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra

drivers: caam: Add caam_cpy_buf_src()

Add caam_cpy_buf_src() function that copy a data buffer into a caam buffer.

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: Update CCB Clear Written Register

Introduce more CCB CLR WR register

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked

drivers: caam: Update CCB Clear Written Register

Introduce more CCB CLR WR register

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: Add SEQ FIFO Load

Introduce Sequence Fifo load command

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wikl

drivers: caam: Add SEQ FIFO Load

Introduce Sequence Fifo load command

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: microchip_pit: add driver for sama7g54's pit64b

Add support for the peripheral PIT64B in sama7g54. In the driver the clocks
are initialized for PIT64B.

Signed-off-by: Tony Han <tony.han@mi

drivers: microchip_pit: add driver for sama7g54's pit64b

Add support for the peripheral PIT64B in sama7g54. In the driver the clocks
are initialized for PIT64B.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: extend the time for waiting PLL ready

The start-up time (simulation data) of sama7g5 PLL is 50us in condition
reaching 95% of target frequency. The PLL lock status bit is not set

drivers: clk: sam: extend the time for waiting PLL ready

The start-up time (simulation data) of sama7g5 PLL is 50us in condition
reaching 95% of target frequency. The PLL lock status bit is not set a few
times with current timeout setting. Extend the time to make sure the check
is successful for any cases.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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tree-wide: use power-of-2 rounding macros where applicable

Use ROUNDUP2(), ROUNDUP2_OVERFLOW(), ROUNDUP2_DIV() and ROUNDDOWN2() at
places where the rounding argument is a variable value and we want

tree-wide: use power-of-2 rounding macros where applicable

Use ROUNDUP2(), ROUNDUP2_OVERFLOW(), ROUNDUP2_DIV() and ROUNDDOWN2() at
places where the rounding argument is a variable value and we want to
leverage the implementation of these routines optimized for a
power-of-2 rounding argument.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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