| 65b5ada4 | 02-Mar-2021 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: drivers: stm32_rng.c: include thread.h
The implementation makes use of thread_mask_exceptions() and thread_unmask_exceptions() functions, therefore, include thread.h to avoid compilation error
core: drivers: stm32_rng.c: include thread.h
The implementation makes use of thread_mask_exceptions() and thread_unmask_exceptions() functions, therefore, include thread.h to avoid compilation errors.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 8537f7eb | 02-Mar-2021 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: driver: stpmic1: do not use TEE_Result as return type
stpmic1_regulator_levels_mv() uses TEE_Result as return type. The caller on core/arch/arm/plat-stm32mp1/scmi_server.c does not check the r
core: driver: stpmic1: do not use TEE_Result as return type
stpmic1_regulator_levels_mv() uses TEE_Result as return type. The caller on core/arch/arm/plat-stm32mp1/scmi_server.c does not check the return value, therefore, change it to void.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 4a9ea08c | 08-Mar-2021 |
Fangsuo Wu <fangsuowu@asrmicro.com> |
drivers: gic: fix the off-by-one error
The gd->max_it should refer to the largest support interrupt id. Fix the off-by-one errors so that the interrupt with the largest id can be correctly handled.
drivers: gic: fix the off-by-one error
The gd->max_it should refer to the largest support interrupt id. Fix the off-by-one errors so that the interrupt with the largest id can be correctly handled.
Acked-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Fangsuo Wu <fangsuowu@asrmicro.com>
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| 3513f269 | 03-Mar-2021 |
Manish Tomar <manish.tomar@nxp.com> |
plat-ls: Add DSPI driver for NXP LS Platforms
This patch adds DSPI driver for Layerscape Platforms. DSPI compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.
Signed-off-by: Carl Lamb
plat-ls: Add DSPI driver for NXP LS Platforms
This patch adds DSPI driver for Layerscape Platforms. DSPI compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.
Signed-off-by: Carl Lamb <calamb@microsoft.com> Signed-off-by: Manish Tomar <manish.tomar@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 16c13b4d | 23-Feb-2021 |
Manish Tomar <manish.tomar@nxp.com> |
plat-ls: Add GPIO driver for NXP LS Platforms
This patch adds GPIO driver for Layerscape Platforms. GPIO compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.
Signed-off-by: Manish Tom
plat-ls: Add GPIO driver for NXP LS Platforms
This patch adds GPIO driver for Layerscape Platforms. GPIO compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.
Signed-off-by: Manish Tomar <manish.tomar@nxp.com> Acked-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
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| fc5d98e8 | 23-Feb-2021 |
Manish Tomar <manish.tomar@nxp.com> |
core: gpio.h: Add 'struct gpio_chip *chip' in 'struct gpio_ops'
To get the GPIO controller base address, 'struct gpio_chip *chip' is passed as a member in the container 'struct gpio_ops'
Also updat
core: gpio.h: Add 'struct gpio_chip *chip' in 'struct gpio_ops'
To get the GPIO controller base address, 'struct gpio_chip *chip' is passed as a member in the container 'struct gpio_ops'
Also updated bcm_gpio and pl061_gpio as per modified gpio.h definition.
Signed-off-by: Manish Tomar <manish.tomar@nxp.com> Reviewed-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
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| 6c2162fa | 12-Feb-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: fix allocated buffer size
When a buffer is allocated for output CAAM operations, the output buffer cache is invalidated beforehand.
To avoid data loss, an allocated buffer size shoul
drivers: caam: fix allocated buffer size
When a buffer is allocated for output CAAM operations, the output buffer cache is invalidated beforehand.
To avoid data loss, an allocated buffer size should be a multiple data cacheline size.
Fixes: b22795b ("drivers: caam: make use of generic memalign() implementation") Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a392e112 | 12-Feb-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: use dcache_get_line_size()
Remove CAAM function to get the data cache line size and use the generic function.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Jens W
drivers: caam: use dcache_get_line_size()
Remove CAAM function to get the data cache line size and use the generic function.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 819d0141 | 20-Nov-2020 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
plat-ls: add i2c driver for NXP LS Platforms
I2C Driver compilation is enabled by default for LX2160A-RDB and LX2160A-QDS.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Reviewed-by: Jens W
plat-ls: add i2c driver for NXP LS Platforms
I2C Driver compilation is enabled by default for LX2160A-RDB and LX2160A-QDS.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Clement Faure <clement.faure@nxp.com>
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| 41494d18 | 12-Feb-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: se050: Foundries Plug-and-Trust Release 0.0.2
The Foundries Plug-and-Trust library tracks NXP Plug-and-Trust quaterly releases.
Modifications in the NXP library sources require a new prepro
crypto: se050: Foundries Plug-and-Trust Release 0.0.2
The Foundries Plug-and-Trust library tracks NXP Plug-and-Trust quaterly releases.
Modifications in the NXP library sources require a new preprocessor macro to be defined.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 530faff2 | 12-Feb-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: crypto: se050: improve maintainability
Replace explicit c-flags duplication across makefiles with single shared definition.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed
drivers: crypto: se050: improve maintainability
Replace explicit c-flags duplication across makefiles with single shared definition.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| b22795b7 | 22-Jan-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: make use of generic memalign() implementation
Make use of the newly implemented memalign() function for the CAAM driver. Remove the previous CAAM memalign() implementation and its ass
drivers: caam: make use of generic memalign() implementation
Make use of the newly implemented memalign() function for the CAAM driver. Remove the previous CAAM memalign() implementation and its associated debugging structures.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 93e678ed | 24-Sep-2020 |
Clement Faure <clement.faure@nxp.com> |
drivers: dcp: add DCP support
The Data Co-Processor (DCP) provides hardware acceleraiton for cryptographic algorithms. The features of DCP are: - AES128 ECB and CBC - SHA1, SHA256 - AES128-CMAC a
drivers: dcp: add DCP support
The Data Co-Processor (DCP) provides hardware acceleraiton for cryptographic algorithms. The features of DCP are: - AES128 ECB and CBC - SHA1, SHA256 - AES128-CMAC algorithm - SRAM key storage - HUK generation
This driver adds DCP support for the following platforms: - imx6slevk - imx6sllevk - imx6ullevk - imx6ulzevk
Signed-off-by: Remi Koman <remi.koman@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 0f04594c | 05-Feb-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: crypto: se050: Global Platform SCP03 key provisioning
Remove the need to store the SCP03 keys by deriving them from the HUK and the SE050 unique hardware identifier.
Works under the assump
drivers: crypto: se050: Global Platform SCP03 key provisioning
Remove the need to store the SCP03 keys by deriving them from the HUK and the SE050 unique hardware identifier.
Works under the assumption that the HUK is unknown and never exposed outside the TEE.
CFG_CORE_SE05X_SCP03_PROVISION Needs to be configured to exec the feature.
CFG_CORE_SE05X_DISPLAY_SCP03_KEYS: Outputs the current and the new SCP03 keys to the console during provisioning.
Note that to provision new SCP03 keys, SCP03 must already be in operation (ie, have an encrypted communication channel between the processor and the SE050).
Tested on imx8mm EVK.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2c62c5dc | 02-Feb-2021 |
Jerome Forissier <jerome@forissier.org> |
drivers: se050: drop useless & before function names
There is no need to use & on a function name to obtain the function address. Drop the useless & characters.
Signed-off-by: Jerome Forissier <jer
drivers: se050: drop useless & before function names
There is no need to use & on a function name to obtain the function address. Drop the useless & characters.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2570cd0b | 02-Feb-2021 |
Jerome Forissier <jerome@forissier.org> |
drivers: crypto: drop useless & before function names
There is no need to use & on a function name to obtain the function address. Drop the useless & characters.
Signed-off-by: Jerome Forissier <je
drivers: crypto: drop useless & before function names
There is no need to use & on a function name to obtain the function address. Drop the useless & characters.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 44bc8ae9 | 02-Feb-2021 |
Jerome Forissier <jerome@forissier.org> |
drivers: caam: drop useless & before function names
There is no need to use & on a function name to obtain the function address. Drop the useless & characters.
Signed-off-by: Jerome Forissier <jero
drivers: caam: drop useless & before function names
There is no need to use & on a function name to obtain the function address. Drop the useless & characters.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b6ca39d5 | 11-Oct-2020 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
driver: imx_wdog: search node by compatible
Instead of searching the node by hard-coded paths, search the node by the compatible, which should be more robust against upstream device tree changes. Up
driver: imx_wdog: search node by compatible
Instead of searching the node by hard-coded paths, search the node by the compatible, which should be more robust against upstream device tree changes. Upstream recently changed the naming of "aips-bus" to "bus", breaking the OP-TEE i.MX Watchdog driver in the process, since the path can no longer be found within the tree.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Tested-by: Ricardo Salveti <ricardo@foundries.io> (imx6ull evk, imx6q apalis-imx6, imx8mm evk, imx8mq evk) Acked-by: Clement Faure <clement.faure@nxp.com>
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| 223f9e05 | 11-Oct-2020 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
drivers: imx_wdog: default initialize variables
Set all function variables to sensible defaults.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> |
| 4c69b1f1 | 15-Dec-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: se050: build: elliptic curve
Makefile changes to compile-in and enable elliptic curve support.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wikland
crypto: se050: build: elliptic curve
Makefile changes to compile-in and enable elliptic curve support.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 9b5917c9 | 15-Dec-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: se050: core: elliptic curve implementation
Elliptic curve driver.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etie
crypto: se050: core: elliptic curve implementation
Elliptic curve driver.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| d419b2b2 | 15-Dec-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: se050: adaptors: elliptic curve
APDU and utility functions required to support elliptic curve cryptography.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander
crypto: se050: adaptors: elliptic curve
APDU and utility functions required to support elliptic curve cryptography.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 8563cdc5 | 13-Dec-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: crypto: se050: limitations to RSA crypto
The supported algorithms for encryption/decryption are: PKCS1_OAEP PKCS1_V1_5
When using PKCS1_PSS_MGF1 the se050 also has some restrictions on
drivers: crypto: se050: limitations to RSA crypto
The supported algorithms for encryption/decryption are: PKCS1_OAEP PKCS1_V1_5
When using PKCS1_PSS_MGF1 the se050 also has some restrictions on the hash algorithms that can be used depending on the RSA key size.
Source: Plug And Trust MW documentation, Release v02,14,00 (Apr 03, 2020)
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 5ae1f02a | 10-Dec-2020 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
core: tzc380: restart search at full size
Restart the search at the biggest region size after finding a region. This way we can use subregions for the first offset and use full regions afterwards.
core: tzc380: restart search at full size
Restart the search at the biggest region size after finding a region. This way we can use subregions for the first offset and use full regions afterwards.
Fixes https://github.com/OP-TEE/optee_os/issues/4252
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Tested-by: Robin van der Gracht <robin@protonic.nl> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| afd861ca | 14-Dec-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: crypto: se050: die_id generation
Guarantee the uniqueness of the die_id even when the requested length is smaller than the se050 unique identifier.
Currently, tee_otp_get_die_id requests 1
drivers: crypto: se050: die_id generation
Guarantee the uniqueness of the die_id even when the requested length is smaller than the se050 unique identifier.
Currently, tee_otp_get_die_id requests 12 bytes while the se050 unique identifier is 18 bytes which is an issue as the uniqueness of the device can be lost due to the truncation of the identifier.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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