| 5cab250e | 08-Aug-2024 |
Zexi Yu <yuzexi@hisilicon.com> |
driver: crypto: hisilicon: delete msg->result which is not used
delete msg->result which is not used
Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jerome Forissier <jerome.forissier@linar
driver: crypto: hisilicon: delete msg->result which is not used
delete msg->result which is not used
Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
show more ...
|
| b5203cb1 | 17-Jul-2024 |
yuzexi <yuzexi@hisilicon.com> |
driver: crypto: hisilicon: add ECC sign and verify
add ECC sign and verify
Signed-off-by: yuzexi <yuzexi@hisilicon.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> |
| e885351c | 04-Jul-2024 |
leisen <leisen1@huawei.com> |
drivers: crypto: hisilicon: fix incorrect use of error code
Fix incorrect use of memory-related error code in hash algorithm.
Fixes: 94c8a3397ec4 ("drivers: crypto: hisilicon:Add HASH and HMAC algo
drivers: crypto: hisilicon: fix incorrect use of error code
Fix incorrect use of memory-related error code in hash algorithm.
Fixes: 94c8a3397ec4 ("drivers: crypto: hisilicon:Add HASH and HMAC algorithm")
Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 562874be | 26-May-2024 |
leisen <leisen1@huawei.com> |
drivers: crypto: hisilicon: Add cipher algorithm
Add DES, 3DES, AES and SM4 cipher algorithm
Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by
drivers: crypto: hisilicon: Add cipher algorithm
Add DES, 3DES, AES and SM4 cipher algorithm
Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| e5500ff7 | 02-Jul-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
drivers: crypto: stm32: add an error trace when registering CRYP and SAES
Drvcrypt framework can only register one symmetric cipher driver.
Add an explicit error trace in function stm32_register_cip
drivers: crypto: stm32: add an error trace when registering CRYP and SAES
Drvcrypt framework can only register one symmetric cipher driver.
Add an explicit error trace in function stm32_register_cipher() when
several cipher drivers are registered.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 34c834fd | 22-Feb-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
drivers: crypto: stm32_saes: SAES depends on RNG clock
Fixes missing dependency of SAES device on RNG clock.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Thomas Bou
drivers: crypto: stm32_saes: SAES depends on RNG clock
Fixes missing dependency of SAES device on RNG clock.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
show more ...
|
| 45fef32a | 31-Aug-2023 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
drivers: crypto: stm32_saes: add PM to SAES driver
Add power management support to the SAES driver through suspend/resume
callbacks.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
S
drivers: crypto: stm32_saes: add PM to SAES driver
Add power management support to the SAES driver through suspend/resume
callbacks.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
show more ...
|
| b32598bf | 29-Jun-2024 |
Zexi Yu <yuzexi@hisilicon.com> |
driver: crypto: hisilicon: add ECC gen_keypair and ECDH
add ECC gen_keypair and ECDH
Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> |
| 86ee543b | 07-Mar-2024 |
Sami Tolvanen <samitolvanen@google.com> |
core: pass TEE_ATTR_RSA_OAEP_MGF_HASH to RSA-OAEP implementations
OP-TEE currently doesn't support using a different hash for MGF1
with RSA-OAEP. However, this is required for AOSP compatibility
(e.
core: pass TEE_ATTR_RSA_OAEP_MGF_HASH to RSA-OAEP implementations
OP-TEE currently doesn't support using a different hash for MGF1
with RSA-OAEP. However, this is required for AOSP compatibility
(e.g. in EncryptionOperationsTest.RsaOaepWithMGFDigestSuccess [1]).
Pass the MGF1 attribute to crypto implementations. Note that
only libtomcrypt supports this feature at the moment, so other
implementations will either fail or fall back to libtomcrypt when
passed a different MGF1 hash.
Link: https://android.googlesource.com/platform/hardware/interfaces/+/refs/heads/main/security/keymint/aidl/vts/functional/KeyMintTest.cpp#5552 [1]
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| 2cde2dcc | 16-May-2024 |
Chandni Sabharwal <chandni.sabharwal@gallagher.com> |
drivers: crypto: se05x: Add SCP03 keys for SE052F2
Add SCP03 default keys for SE052F2 to support OEFID 0xB501
Variant Identifier (OEF ID): B501
12NC : 9354 551 73118
Type Numb
drivers: crypto: se05x: Add SCP03 keys for SE052F2
Add SCP03 default keys for SE052F2 to support OEFID 0xB501
Variant Identifier (OEF ID): B501
12NC : 9354 551 73118
Type Number : SE052F2HN2/Z019H
Orderable Part Number : SE052F2HN2/Z019HJ
Signed-off-by: Chandni Sabharwal <chandni.sabharwal@gallagher.com>
Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
show more ...
|
| b6a44cc5 | 21-May-2024 |
leisen <leisen1@huawei.com> |
drivers: crypto: hisilicon: Update header files location
The header files in core/drivers/crypto/hisilicon/includes
are only used by the source files in core/drivers/crypto/hisilicon,
so move the he
drivers: crypto: hisilicon: Update header files location
The header files in core/drivers/crypto/hisilicon/includes
are only used by the source files in core/drivers/crypto/hisilicon,
so move the header file from core/drivers/crypto/hisilicon/include
to core/drivers/crypto/hisilicon/.
Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| 94c8a339 | 07-May-2024 |
leisen <leisen1@huawei.com> |
drivers: crypto: hisilicon:Add HASH and HMAC algorithm
Add HASH and HMAC algorithm by SEC, and support SHA1,
SHA224, SHA256, SHA384, SHA512, MD5, SM3, and HMAC
algorithms based on these algorithms.
drivers: crypto: hisilicon:Add HASH and HMAC algorithm
Add HASH and HMAC algorithm by SEC, and support SHA1,
SHA224, SHA256, SHA384, SHA512, MD5, SM3, and HMAC
algorithms based on these algorithms.
Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| 899362a0 | 10-Apr-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: crypto: remove assertions on device handlers
Remove assertions added by the commit referred below. They are useless
since the handlers are registered only if the related device (stm32_cryp
drivers: crypto: remove assertions on device handlers
Remove assertions added by the commit referred below. They are useless
since the handlers are registered only if the related device (stm32_cryp
or stm32_saes) has its driver successfully probed. These assertion also
prevent enabling both CFG_STM32_SAES and CFG_STM32_CRYP for a platform
which is a valid configuration for when we rely on the DT to state
which of both is enabled.
Fixes: 03de2c7bb316 ("drivers: crypto: stm32_saes: fallback to software on 192bit AES keys")
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
show more ...
|
| 9b6221ae | 27-Mar-2024 |
leisen <leisen1@huawei.com> |
drivers:implement HiSilicon Security Engine(SEC) module.
HiSilicon SEC is used in security applications such as
authentication and data encryption and decryption. This
module implement the hardware
drivers:implement HiSilicon Security Engine(SEC) module.
HiSilicon SEC is used in security applications such as
authentication and data encryption and decryption. This
module implement the hardware initialization of the SEC.
Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 79502744 | 10-Apr-2024 |
yuzexi <yuzexi@hisilicon.com> |
drivers: crypto: hisilicon: add DH algorithm
add operation of DH algorithm, including alloc_keypair,
gen_keypair and shared_secret
Signed-off-by: yuzexi <yuzexi@hisilicon.com>
Acked-by: Etienne Car
drivers: crypto: hisilicon: add DH algorithm
add operation of DH algorithm, including alloc_keypair,
gen_keypair and shared_secret
Signed-off-by: yuzexi <yuzexi@hisilicon.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| 299f9bc1 | 08-Mar-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
drivers: crypto: stm32_cryp: add pm to CRYP driver
Add power management support to the CRYP driver through suspend/resume
callbacks.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Sig
drivers: crypto: stm32_cryp: add pm to CRYP driver
Add power management support to the CRYP driver through suspend/resume
callbacks.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 14d68630 | 08-Mar-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
drivers: crypto: stm32_cryp: add delay when resetting CRYP peripheral.
Add 2 us of delay between reset assert and reset deassert to ensure the
peripheral is properly reset.
Signed-off-by: Thomas Bo
drivers: crypto: stm32_cryp: add delay when resetting CRYP peripheral.
Add 2 us of delay between reset assert and reset deassert to ensure the
peripheral is properly reset.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 1d8b1184 | 23-Feb-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
drivers: crypto: stm32_cryp: remove reset binding requirements
Remove panic during probe when "resets" property is not found because
it's optional in most cases.
Signed-off-by: Thomas Bourgoin <tho
drivers: crypto: stm32_cryp: remove reset binding requirements
Remove panic during probe when "resets" property is not found because
it's optional in most cases.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 9e255282 | 24-Mar-2024 |
loubaihui <loubaihui1@huawei.com> |
drivers: crypto: hisilicon: init HPRE hardware block
The HiSilicon HPRE is a High Performance RSA Engine.
This module implement the hardware initialization of
the HPRE.
Signed-off-by: loubaihui <lo
drivers: crypto: hisilicon: init HPRE hardware block
The HiSilicon HPRE is a High Performance RSA Engine.
This module implement the hardware initialization of
the HPRE.
Signed-off-by: loubaihui <loubaihui1@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| 35a9139e | 20-Mar-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add CAAM key support for DH
Add CAAM key support for DH.
Add DH black key support for shared secret generation.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Sa
drivers: caam: add CAAM key support for DH
Add CAAM key support for DH.
Add DH black key support for shared secret generation.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| 8993bfd8 | 20-Mar-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add CAAM key support for ECC
Add CAAM key support for ECC.
Add RSA black key support for key pair generation and sign/decrypt
functions.
Signed-off-by: Clement Faure <clement.faure@n
drivers: caam: add CAAM key support for ECC
Add CAAM key support for ECC.
Add RSA black key support for key pair generation and sign/decrypt
functions.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| 01449447 | 20-Mar-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add CAAM key support for DSA
Add CAAM key support for DSA.
Add DSA black key support for key pair generation and sign/decrypt
functions.
Signed-off-by: Clement Faure <clement.faure@n
drivers: caam: add CAAM key support for DSA
Add CAAM key support for DSA.
Add DSA black key support for key pair generation and sign/decrypt
functions.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| ccbcceeb | 20-Mar-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add CAAM key support for RSA
Add CAAM key support for RSA.
Add RSA black key support for key pair generation and sign/decrypt
functions.
Signed-off-by: Clement Faure <clement.faure@n
drivers: caam: add CAAM key support for RSA
Add CAAM key support for RSA.
Add RSA black key support for key pair generation and sign/decrypt
functions.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| 1495f6c4 | 20-Mar-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add CAAM key driver
Add CAAM key driver and CAAM key object.
Add key blob encapsulation methods.
Add key serialize and deserialize functions for bignum encapsulation.
Signed-off-by:
drivers: caam: add CAAM key driver
Add CAAM key driver and CAAM key object.
Add key blob encapsulation methods.
Add key serialize and deserialize functions for bignum encapsulation.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| 9d38cd91 | 10-Feb-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: fix DSA_DUMPDESC macro
Fix typo in DSA_DUMPDESC and replace MP_TRACE with DSA_TRACE.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier
drivers: caam: fix DSA_DUMPDESC macro
Fix typo in DSA_DUMPDESC and replace MP_TRACE with DSA_TRACE.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
show more ...
|