| 38dde91e | 17-Apr-2020 |
Ruchika Gupta <ruchika.gupta@nxp.com> |
drivers: caam: Add register map changes for Era 10
Era 10 changes the register map.
The updates that affect the drivers: -new version registers are added
Signed-off-by: Ruchika Gupta <ruchika.gupt
drivers: caam: Add register map changes for Era 10
Era 10 changes the register map.
The updates that affect the drivers: -new version registers are added
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com> Reviewed-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 919323d9 | 20-Feb-2020 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
caam: add BLOB module for MKVB retrieval
The BLOB module currently only implements the retrieval of the MKVB to provide a HUK implementation for i.MX platforms. The tee_otp_get_hw_unique_key() funct
caam: add BLOB module for MKVB retrieval
The BLOB module currently only implements the retrieval of the MKVB to provide a HUK implementation for i.MX platforms. The tee_otp_get_hw_unique_key() function is also implemented in this module and caches the key, since it can't be generated again at runtime.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Clement Faure <clement.faure@nxp.com>
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| 8e97f8b6 | 15-Apr-2020 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
caam: hal: add function to increment priblob
Add a common hal function to increment the priblob. This can conditionally be enabled with CFG_CAAM_INC_PRIBLOB to use this as a workaround on SoCs which
caam: hal: add function to increment priblob
Add a common hal function to increment the priblob. This can conditionally be enabled with CFG_CAAM_INC_PRIBLOB to use this as a workaround on SoCs which can't distinguish secure and normal world in the CAAM, i.e. i.MX6Q.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Clement Faure <clement.faure@nxp.com>
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| 9d09e917 | 05-Feb-2020 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
caam: move to early init calls
Initialize the CAAM early to enable the retrieval of the MKVB.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Acked-by: Jerome Forissier <jerome@foris
caam: move to early init calls
Initialize the CAAM early to enable the retrieval of the MKVB.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Clement Faure <clement.faure@nxp.com>
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| 81ab436b | 06-Dec-2019 |
Cedric Neveux <cedric.neveux@nxp.com> |
drivers: caam: implement NXP CAAM Driver - HMAC
Add the NXP CAAM driver: - HMAC
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by:
drivers: caam: implement NXP CAAM Driver - HMAC
Add the NXP CAAM driver: - HMAC
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| ea9ac29c | 13-Aug-2019 |
Cedric Neveux <cedric.neveux@nxp.com> |
drivers: crypto: generic resources for crypto MAC driver - MAC
Add a generic cryptographic driver MAC interface connecting TEE Crypto generic APIs to HW driver interface
Signed-off-by: Cedric Neveu
drivers: crypto: generic resources for crypto MAC driver - MAC
Add a generic cryptographic driver MAC interface connecting TEE Crypto generic APIs to HW driver interface
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 5c3559dc | 03-Apr-2020 |
Ruchika Gupta <ruchika.gupta@nxp.com> |
drivers: caam: Allow platforms to configure num of JR entries
Currently JR entries is fixed to 10 in common file. Allow this to be over-ridden by platform's conf.mk
Signed-off-by: Ruchika Gupta <r
drivers: caam: Allow platforms to configure num of JR entries
Currently JR entries is fixed to 10 in common file. Allow this to be over-ridden by platform's conf.mk
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Acked-by: Clement Faure <clement.faure@nxp.com>
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| 6819f38f | 03-Apr-2020 |
Ruchika Gupta <ruchika.gupta@nxp.com> |
drivers: caam: Fix bug in caam_hal_jr_flush()
After requesting the CAAM block for flushing the JR, the function should wait till the halt is complete (i.e HALT_ONGOING). The code currently erroneous
drivers: caam: Fix bug in caam_hal_jr_flush()
After requesting the CAAM block for flushing the JR, the function should wait till the halt is complete (i.e HALT_ONGOING). The code currently erroneously checks this on HALT_COMPLETE which can result in infinite loops on platforms where the halt gets completed before this check exceutes for first time.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Acked-by: Clement Faure <clement.faure@nxp.com>
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| 971110af | 03-Apr-2020 |
Ruchika Gupta <ruchika.gupta@nxp.com> |
drivers: caam: Modify access of 64 bit registers
The Address of Input/output Job ring and scatter gather table are handled differently depending on platform
1. All BE CAAM platforms (LS1043, LS1012
drivers: caam: Modify access of 64 bit registers
The Address of Input/output Job ring and scatter gather table are handled differently depending on platform
1. All BE CAAM platforms (LS1043, LS1012, LS1046) and i.MX platforms (LE CAAM): base + 0x0000 : most-significant 32 bits base + 0x0004 : least-significant 32 bits
The 32-bit version of this core therefore has to write to base + 0x0004 to set the 32-bit wide DMA address.
2. All other LE CAAM platforms (LS2088, LS1088, LX2160 etc.) base + 0x0000 : least-significant 32 bits base + 0x0004 : most-significant 32 bits
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Acked-by: Clement Faure <clement.faure@nxp.com>
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| 6a16bb35 | 03-Apr-2020 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: use pointers to out/inring_entry for CAAM
Use pointers to outring_entry and inring_entry as input for caam_desc_pop(), caam_desc_push() and caam_desc_jobstatus() functions.
This quic
drivers: caam: use pointers to out/inring_entry for CAAM
Use pointers to outring_entry and inring_entry as input for caam_desc_pop(), caam_desc_push() and caam_desc_jobstatus() functions.
This quick re-work originaly comes from the initiative to get rid of a GGC 9.2 warning -Waddress-of-packed-member
core/drivers/crypto/caam/caam_jr.c: In function ‘do_jr_dequeue’: core/drivers/crypto/caam/caam_jr.c:262:22: warning: taking address of packed member of ‘struct outring_entry’ may result in an unaligned pointer value [-Waddress-of-packed-member] 262 | if (caam_desc_pop(&jr_out->desc) == caller->pdesc) { | ^~~~~~~~~~~~~ core/drivers/crypto/caam/caam_jr.c:265:26: warning: taking address of packed member of ‘struct outring_entry’ may result in an unaligned pointer value [-Waddress-of-packed-member] 265 | caam_read_jobstatus(&jr_out->status); | ^~~~~~~~~~~~~~~
By doing this, we let the function safely extracting the field.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 7c767434 | 02-Apr-2020 |
Albert Schwarzkopf <a.schwarzkopf@phytec.de> |
core: merge tee_*_get_digest_size() into a single function
Rename tee_hash_get_digest_size() to tee_alg_get_digest_size().
Change tee_alg_get_digest_size() to use new libutee macro TEE_ALG_GET_DIGE
core: merge tee_*_get_digest_size() into a single function
Rename tee_hash_get_digest_size() to tee_alg_get_digest_size().
Change tee_alg_get_digest_size() to use new libutee macro TEE_ALG_GET_DIGEST_SIZE.
Remove tee_mac_get_digest_size() as its functionality is handled by tee_alg_get_digest_size() now.
Signed-off-by: Albert Schwarzkopf <a.schwarzkopf@phytec.de> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| dfb57b8b | 07-Aug-2019 |
Cedric Neveux <cedric.neveux@nxp.com> |
drivers: caam: implement NXP CAAM driver - Cipher
Add the NXP CAAM drivers: - Cipher (AES/DES/DES3)
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faur
drivers: caam: implement NXP CAAM driver - Cipher
Add the NXP CAAM drivers: - Cipher (AES/DES/DES3)
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| e43ab7a8 | 07-Aug-2019 |
Cedric Neveux <cedric.neveux@nxp.com> |
core: driver: generic resources for crypto cipher driver
Add a generic cryptographic Cipher driver interface connecting TEE Crypto generic APIs to HW driver interface
To make Cipher HW driver gener
core: driver: generic resources for crypto cipher driver
Add a generic cryptographic Cipher driver interface connecting TEE Crypto generic APIs to HW driver interface
To make Cipher HW driver generic and to reduce the amount of function parameters, add structure data for the initialization and update function driver call. Checks the Cipher operation's parameter in the generic part before calling the HW driver.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 9a8fe07e | 06-Mar-2020 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add descriptive defines for RSA key formats
Add descriptive defines for RSA private key formats for a better readability.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-b
drivers: caam: add descriptive defines for RSA key formats
Add descriptive defines for RSA private key formats for a better readability.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 288fdb8f | 06-Mar-2020 |
Clement Faure <clement.faure@nxp.com> |
core: driver: fix RSA encoded message length computation
Fix the RSA encoded message length computation when verifying the message. This fixes inconsistent xtest 4006.20 and 4006.32 fails.
Signed-o
core: driver: fix RSA encoded message length computation
Fix the RSA encoded message length computation when verifying the message. This fixes inconsistent xtest 4006.20 and 4006.32 fails.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b6ceb65c | 06-Mar-2020 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: fix RSA key format number 3
Fix the RSA private key format number 3.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> |
| 9dd32a72 | 28-Feb-2020 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: fix compilation warning hal_jr.c
Fix compilation warning when CFG_NXP_CAAM=y and CFG_CRYPTO_DRIVER=n
core/drivers/crypto/caam/hal/common/hal_jr.c:19:29: warning: ‘jr_backup’ defined
drivers: caam: fix compilation warning hal_jr.c
Fix compilation warning when CFG_NXP_CAAM=y and CFG_CRYPTO_DRIVER=n
core/drivers/crypto/caam/hal/common/hal_jr.c:19:29: warning: ‘jr_backup’ defined but not used [-Wunused-const-variable=] static const struct reglist jr_backup[] = {
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 18301805 | 28-Feb-2020 |
Clement Faure <clement.faure@nxp.com> |
drivers: crypto: fix compilation warning hash_oid.c
core/drivers/crypto/crypto_api/oid/hash_oid.c:37:10: warning: return discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
drivers: crypto: fix compilation warning hash_oid.c
core/drivers/crypto/crypto_api/oid/hash_oid.c:37:10: warning: return discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] return &drvcrypt_hash_oid[main_alg];
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 37c67234 | 28-Feb-2020 |
Clement Faure <clement.faure@nxp.com> |
drivers: crypto: fix missing header hash_oid.c
Fix compilation error when CFG_NXP_CAAM=y
core/drivers/crypto/crypto_api/oid/hash_oid.c:34:22: error: implicit declaration of function ‘TEE_ALG_GET_MA
drivers: crypto: fix missing header hash_oid.c
Fix compilation error when CFG_NXP_CAAM=y
core/drivers/crypto/crypto_api/oid/hash_oid.c:34:22: error: implicit declaration of function ‘TEE_ALG_GET_MAIN_ALG’; did you mean ‘TEE_ALG_HMAC_SM3’? [-Werror=implicit-function-declaration] uint32_t main_alg = TEE_ALG_GET_MAIN_ALG(algo);
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| f5342ba3 | 24-Feb-2020 |
Cedric Neveux <cedric.neveux@nxp.com> |
drivers: caam: fix suspend/resume issue
Add missing save/restore of the Secure JR configuration (all devices). On i.MX6Q/D fix the job ring resume to reconfigure the Software JR queues and re-instan
drivers: caam: fix suspend/resume issue
Add missing save/restore of the Secure JR configuration (all devices). On i.MX6Q/D fix the job ring resume to reconfigure the Software JR queues and re-instantiate the RNG if needed.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 796ea6d8 | 04-Feb-2020 |
Cedric Neveux <cedric.neveux@nxp.com> |
drivers: caam: implement NXP CAAM Driver - RSA
Add the NXP CAAM drivers: - Asymmetric RSA: - Encrypt/Decrypt - Sign/Verify - Mathematical operation XOR (mod N)
Signed-off-by: Cedric Neveux <cedric.
drivers: caam: implement NXP CAAM Driver - RSA
Add the NXP CAAM drivers: - Asymmetric RSA: - Encrypt/Decrypt - Sign/Verify - Mathematical operation XOR (mod N)
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f5a70e3e | 04-Feb-2020 |
Cedric Neveux <cedric.neveux@nxp.com> |
drivers: crypto: generic resources for crypto device driver - RSA
TEE Crypto generic APIs to HW driver interface
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Acked-by: Jens Wiklander <jens.
drivers: crypto: generic resources for crypto device driver - RSA
TEE Crypto generic APIs to HW driver interface
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8d02ec6d | 04-Feb-2020 |
Cedric Neveux <cedric.neveux@nxp.com> |
drivers: caam: change CAAM debug trace method
Change the method to enable the CAAM debug. Split the debug compilation 32 bits word to 3x32 bits words, one for the trace, one for the descriptor dump
drivers: caam: change CAAM debug trace method
Change the method to enable the CAAM debug. Split the debug compilation 32 bits word to 3x32 bits words, one for the trace, one for the descriptor dump and one for the buffer dump.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b4814b22 | 24-Feb-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: caam: RNG: provide plat_rng_init symbol
Not doing so calls the default implementation which generates misleading RNG trace information (sample below)
E/TC:0 0 plat_rng_init:354 Warning: se
drivers: caam: RNG: provide plat_rng_init symbol
Not doing so calls the default implementation which generates misleading RNG trace information (sample below)
E/TC:0 0 plat_rng_init:354 Warning: seeding RNG with zeroes
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Joakim Bech <joakim.bech@linaro.org> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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| 65d9b708 | 11-Feb-2020 |
Priyanka Singh <priyanka.singh@nxp.com> |
drivers: CAAM: Fix caam_desc_pop() function for 64bit platforms
Fix caam_desc_pop() function for reading the output CAAM job ring entry for 64-bit platforms.
Signed-off-by: Priyanka Singh <priyanka
drivers: CAAM: Fix caam_desc_pop() function for 64bit platforms
Fix caam_desc_pop() function for reading the output CAAM job ring entry for 64-bit platforms.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Cedric Neveux <cedric.neveux@nxp.com>
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