drivers: crypto: hisilicon: add pbkdf2 algorithm

Add pbkdf2 algorithm for hisilicon SEC driver.

Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

driver: crypto: hisilicon: add RSA algorithm

Add RSA support in Hisilicon crypto drivers.

Signed-off-by: yuzexi <yuzexi@hisilicon.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acke

driver: crypto: hisilicon: add RSA algorithm

Add RSA support in Hisilicon crypto drivers.

Signed-off-by: yuzexi <yuzexi@hisilicon.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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driver: crypto: hisilicon: add montgomery algorithm

add operation of X25519 and X448 algorithm, including alloc_keypair,
gen_keypar and shared_secret

Signed-off-by: yuzexi <yuzexi@hisilicon.com>
Ac

driver: crypto: hisilicon: add montgomery algorithm

add operation of X25519 and X448 algorithm, including alloc_keypair,
gen_keypar and shared_secret

Signed-off-by: yuzexi <yuzexi@hisilicon.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: hisilicon: add authenc algorithm

Add authenc algorithm for hisilicon SEC driver

Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

driver: crypto: hisilicon: replace free() and memzero() by free_wipe()

replace free() and memzero() by free_wipe()

Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jerome Forissier <jerome.f

driver: crypto: hisilicon: replace free() and memzero() by free_wipe()

replace free() and memzero() by free_wipe()

Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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driver: crypto: hisilicon: delete msg->result which is not used

delete msg->result which is not used

Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jerome Forissier <jerome.forissier@linar

driver: crypto: hisilicon: delete msg->result which is not used

delete msg->result which is not used

Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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driver: crypto: hisilicon: add ECC sign and verify

add ECC sign and verify

Signed-off-by: yuzexi <yuzexi@hisilicon.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

drivers: crypto: hisilicon: fix incorrect use of error code

Fix incorrect use of memory-related error code in hash algorithm.

Fixes: 94c8a3397ec4 ("drivers: crypto: hisilicon:Add HASH and HMAC algo

drivers: crypto: hisilicon: fix incorrect use of error code

Fix incorrect use of memory-related error code in hash algorithm.

Fixes: 94c8a3397ec4 ("drivers: crypto: hisilicon:Add HASH and HMAC algorithm")
Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: hisilicon: Add cipher algorithm

Add DES, 3DES, AES and SM4 cipher algorithm

Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by

drivers: crypto: hisilicon: Add cipher algorithm

Add DES, 3DES, AES and SM4 cipher algorithm

Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

show more ...

driver: crypto: hisilicon: add ECC gen_keypair and ECDH

add ECC gen_keypair and ECDH

Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

drivers: crypto: hisilicon: Update header files location

The header files in core/drivers/crypto/hisilicon/includes
are only used by the source files in core/drivers/crypto/hisilicon,
so move the he

drivers: crypto: hisilicon: Update header files location

The header files in core/drivers/crypto/hisilicon/includes
are only used by the source files in core/drivers/crypto/hisilicon,
so move the header file from core/drivers/crypto/hisilicon/include
to core/drivers/crypto/hisilicon/.

Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: crypto: hisilicon:Add HASH and HMAC algorithm

Add HASH and HMAC algorithm by SEC, and support SHA1,
SHA224, SHA256, SHA384, SHA512, MD5, SM3, and HMAC
algorithms based on these algorithms.

drivers: crypto: hisilicon:Add HASH and HMAC algorithm

Add HASH and HMAC algorithm by SEC, and support SHA1,
SHA224, SHA256, SHA384, SHA512, MD5, SM3, and HMAC
algorithms based on these algorithms.

Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

drivers:implement HiSilicon Security Engine(SEC) module.

HiSilicon SEC is used in security applications such as
authentication and data encryption and decryption. This
module implement the hardware

drivers:implement HiSilicon Security Engine(SEC) module.

HiSilicon SEC is used in security applications such as
authentication and data encryption and decryption. This
module implement the hardware initialization of the SEC.

Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

show more ...

drivers: crypto: hisilicon: add DH algorithm

add operation of DH algorithm, including alloc_keypair,
gen_keypair and shared_secret

Signed-off-by: yuzexi <yuzexi@hisilicon.com>
Acked-by: Etienne Car

drivers: crypto: hisilicon: add DH algorithm

add operation of DH algorithm, including alloc_keypair,
gen_keypair and shared_secret

Signed-off-by: yuzexi <yuzexi@hisilicon.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: crypto: hisilicon: init HPRE hardware block

The HiSilicon HPRE is a High Performance RSA Engine.
This module implement the hardware initialization of
the HPRE.

Signed-off-by: loubaihui <lo

drivers: crypto: hisilicon: init HPRE hardware block

The HiSilicon HPRE is a High Performance RSA Engine.
This module implement the hardware initialization of
the HPRE.

Signed-off-by: loubaihui <loubaihui1@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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driver: crypto: hisilicon: fix error handling

When qm_set_vft_common() fails to configure, qm_set_xqc_vft() is
called with the num argument as zero to disable the device. Update
qm_set_xqc_vft() to

driver: crypto: hisilicon: fix error handling

When qm_set_vft_common() fails to configure, qm_set_xqc_vft() is
called with the num argument as zero to disable the device. Update
qm_set_xqc_vft() to handle this error path.

Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jens wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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driver: crypto: hisilicon: update qm init configs

1. add qm_disable_clock_gate for QM_HW_V3
2. set doorbell timeout to QM_DB_TIMEOUT_SET ns

Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: J

driver: crypto: hisilicon: update qm init configs

1. add qm_disable_clock_gate for QM_HW_V3
2. set doorbell timeout to QM_DB_TIMEOUT_SET ns

Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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driver: crypto: hisilicon: Fix temporary memory risk

When the mailbox operation times out, the software will
free the temporary memory. The hardware does not cancel
the mailbox operation and may con

driver: crypto: hisilicon: Fix temporary memory risk

When the mailbox operation times out, the software will
free the temporary memory. The hardware does not cancel
the mailbox operation and may continue to read and write
the free memory.
To solve the problem, we alloc buffer which has the same
lifecycle with qm.

Fixes: c7f9abcee87f ("drivers: implement HiSilicon Queue Management (QM) module")
Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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driver: crypto: hisilicon: Add the mailbox operation lock

refactor function of mailbox operation to ensure atomaticity

Fixes: c7f9abcee87f ("drivers: implement HiSilicon Queue Management (QM) modul

driver: crypto: hisilicon: Add the mailbox operation lock

refactor function of mailbox operation to ensure atomaticity

Fixes: c7f9abcee87f ("drivers: implement HiSilicon Queue Management (QM) module")
Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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driver: crypto: hisilicon: fix an issue of multiple tasks using the same qp

Flag in the qp structure is used to indicate whether
the qp is occupied.The new task can find an unused qp
and use it.

Fi

driver: crypto: hisilicon: fix an issue of multiple tasks using the same qp

Flag in the qp structure is used to indicate whether
the qp is occupied.The new task can find an unused qp
and use it.

Fixes: c7f9abcee87f ("drivers: implement HiSilicon Queue Management (QM) module")
Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

show more ...

drivers: crypto: hisilicon: fix QM cache start and done define

Address offset of qm_cache_wb_start and qm_cache_wb_done
is wrong.

Fixes: c7f9abcee87f ("drivers: implement HiSilicon Queue Management

drivers: crypto: hisilicon: fix QM cache start and done define

Address offset of qm_cache_wb_start and qm_cache_wb_done
is wrong.

Fixes: c7f9abcee87f ("drivers: implement HiSilicon Queue Management (QM) module")
Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
[Edit commit subject]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: implement HiSilicon Queue Management (QM) module

The Hisilicon QM is a Queue Management module.
In order to unify the interface between accelerator and software,
a unified queue management

drivers: implement HiSilicon Queue Management (QM) module

The Hisilicon QM is a Queue Management module.
In order to unify the interface between accelerator and software,
a unified queue management module QM is used to interact with software.
Each accelerator module integrates a QM. Software issues tasks to the SQ
(Submmision Queue),and the QM obtains the address of the SQE (Submmision
Queue Element). The BD (Buffer Description, same as SQE) information is
sent to the accelerator. After the task processing is complete, the
accelerator applies for a write-back address from the QM to write back
the SQ.

Signed-off-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

show more ...