| 49c69443 | 15-May-2025 |
Pavel Löbl <pavel@loebl.cz> |
caam: fix compilation when CFG_NXP_CAAM_AE_* are disabled
Similarly to other CAAM modules, define empty function if CAAM AE is not used, to avoid undefined reference to caam_ae_init().
Signed-off-b
caam: fix compilation when CFG_NXP_CAAM_AE_* are disabled
Similarly to other CAAM modules, define empty function if CAAM AE is not used, to avoid undefined reference to caam_ae_init().
Signed-off-by: Pavel Löbl <pavel@loebl.cz> Acked-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 95eea104 | 04-Apr-2024 |
Olivier Masse <olivier.masse@nxp.com> |
drivers: caam: introduce AE_CCM and AE_GCM compilation flags
imx6dl-sabresd, imx6q-sabresd, imx6sx-sdb does not support AES GCM
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: S
drivers: caam: introduce AE_CCM and AE_GCM compilation flags
imx6dl-sabresd, imx6q-sabresd, imx6sx-sdb does not support AES GCM
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a75d305d | 11-Jan-2024 |
Olivier Masse <olivier.masse@nxp.com> |
drivers: caam: Add AES CCM
Implement CAAM AES CCM
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklande
drivers: caam: Add AES CCM
Implement CAAM AES CCM
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| faaf0c59 | 01-Jan-2024 |
Olivier Masse <olivier.masse@nxp.com> |
drivers: caam: Add AES GCM
Implement CAAM AES GCM
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklande
drivers: caam: Add AES GCM
Implement CAAM AES GCM
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 9c4f6acb | 22-Feb-2024 |
Olivier Masse <olivier.masse@nxp.com> |
drivers: caam: Add caam_cpy_buf_src()
Add caam_cpy_buf_src() function that copy a data buffer into a caam buffer.
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Sahil Malhotra
drivers: caam: Add caam_cpy_buf_src()
Add caam_cpy_buf_src() function that copy a data buffer into a caam buffer.
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 84c0a67b | 29-Jan-2024 |
Olivier Masse <olivier.masse@nxp.com> |
drivers: caam: Update CCB Clear Written Register
Introduce more CCB CLR WR register
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked
drivers: caam: Update CCB Clear Written Register
Introduce more CCB CLR WR register
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b78d0115 | 29-Jan-2024 |
Olivier Masse <olivier.masse@nxp.com> |
drivers: caam: Add SEQ FIFO Load
Introduce Sequence Fifo load command
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wikl
drivers: caam: Add SEQ FIFO Load
Introduce Sequence Fifo load command
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 76d6685e | 17-Dec-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
tree-wide: use power-of-2 rounding macros where applicable
Use ROUNDUP2(), ROUNDUP2_OVERFLOW(), ROUNDUP2_DIV() and ROUNDDOWN2() at places where the rounding argument is a variable value and we want
tree-wide: use power-of-2 rounding macros where applicable
Use ROUNDUP2(), ROUNDUP2_OVERFLOW(), ROUNDUP2_DIV() and ROUNDDOWN2() at places where the rounding argument is a variable value and we want to leverage the implementation of these routines optimized for a power-of-2 rounding argument.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 461cf006 | 20-Jun-2024 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: caam: sm: fix SM partition permission in SMAG registers
SM partition SMAG1 permissions were wrongly set for generating DEK blob which results in error while decapsulating DEK blob during HA
drivers: caam: sm: fix SM partition permission in SMAG registers
SM partition SMAG1 permissions were wrongly set for generating DEK blob which results in error while decapsulating DEK blob during HAB encrypted boot. Setting the permissions correctly fix this issue.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Fixes: 2a12ae237796 ("drivers: caam: add CAAM secure memory driver")
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| ba7db6e0 | 14-Nov-2024 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: caam: enable/disable prediction resistance based on CONFIG flag
With prediction resistance enabled, on every random number request CAAM is forced to do reseeding of DRBG, which is time taki
drivers: caam: enable/disable prediction resistance based on CONFIG flag
With prediction resistance enabled, on every random number request CAAM is forced to do reseeding of DRBG, which is time taking process which leads to lower Random number generation performance. So to give user the flexibility to enable/disable this feature a flag CFG_CAAM_RNG_RUNTIME_PR is introduced. By default it will be disabled and user can enable it as per its requirement.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cbb7d5e5 | 29-May-2024 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
driver: caam: disable RNG buffering
Previous design of keeping RNG data in a buffer and giving random number to user from that buffer is vulnerable to attacks and also not NIST/FIPS compliant. So to
driver: caam: disable RNG buffering
Previous design of keeping RNG data in a buffer and giving random number to user from that buffer is vulnerable to attacks and also not NIST/FIPS compliant. So to make it more secure and NIST/FIPS compliant, will get random number from CAAM on each user request.
Reference: Section 2.7 of NIST SP 800-90C
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 116d03ab | 04-Nov-2024 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: caam: cache align Key blob modifier
An array was used as Key blob modifier, changed it cache aligned dynamic memory.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens W
drivers: caam: cache align Key blob modifier
An array was used as Key blob modifier, changed it cache aligned dynamic memory.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 36179ff1 | 31-May-2024 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: caam: check only format bit in operation
operation variable has been updated after entering the function so we cannot check against full RSA operations. Updated to check only format bit in
drivers: caam: check only format bit in operation
operation variable has been updated after entering the function so we cannot check against full RSA operations. Updated to check only format bit in operation
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cf865357 | 04-Nov-2024 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: caam: fix CFG_CORE_BIGNUM_MAX_BITS
CFG_CORE_BIGNUM_MAX_BITS should be 4576 4096 (RSA Max key size) + 8 * 60 (Header serialization and Black blob overhead in bytes)
Signed-off-by: Sahil Mal
drivers: caam: fix CFG_CORE_BIGNUM_MAX_BITS
CFG_CORE_BIGNUM_MAX_BITS should be 4576 4096 (RSA Max key size) + 8 * 60 (Header serialization and Black blob overhead in bytes)
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6a0116ed | 04-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: use fdt_reg_info()
Use fdt_reg_info() instead of fdt_reg_base_address() and fdt_reg_size() to optimize look up in the DT due to finding parent node.
Signed-off-by: Etienne Carriere <etienn
drivers: use fdt_reg_info()
Use fdt_reg_info() instead of fdt_reg_base_address() and fdt_reg_size() to optimize look up in the DT due to finding parent node.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 7e29b821 | 05-Nov-2024 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: caam: Update comments in ECC driver
There were some typos in comments in the code, updated them
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> |
| e64a5512 | 05-Nov-2024 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: caam: Update comments in RSA driver
There were some typos in comments in the code, updated them
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> |
| 82affb6a | 28-Sep-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: hal: add caam_hal_sm_get_base_dt() implementation
Implement caam_hal_sm_get_base_dt() function when CFG_DT=y
Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Sahil
drivers: caam: hal: add caam_hal_sm_get_base_dt() implementation
Implement caam_hal_sm_get_base_dt() function when CFG_DT=y
Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 75be62ae | 15-Jun-2021 |
Franck LENORMAND <franck.lenormand@nxp.com> |
drivers: caam: skip JR init of CFG_JR_HAB_INDEX
On iMX8M SoC, the HAB requires the JR0 to be set to secure world to decrypt the kernel image when loading the image in U-Boot.
Before reaching u-boot
drivers: caam: skip JR init of CFG_JR_HAB_INDEX
On iMX8M SoC, the HAB requires the JR0 to be set to secure world to decrypt the kernel image when loading the image in U-Boot.
Before reaching u-boot, OP-TEE and TF-A set the JR0 to the non-secure domain that leads to a HAB failure when trying to decrypt the kernel.
To fix the issue, this commit introduces CFG_JR_HAB_INDEX that specifies which JR the HAB uses. OPTEE will skip the initialization of CFG_JR_HAB_INDEX and leave it as secure.
It will also disable its usage in the device tree to inform the kernel.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 86ee543b | 07-Mar-2024 |
Sami Tolvanen <samitolvanen@google.com> |
core: pass TEE_ATTR_RSA_OAEP_MGF_HASH to RSA-OAEP implementations
OP-TEE currently doesn't support using a different hash for MGF1 with RSA-OAEP. However, this is required for AOSP compatibility (e.
core: pass TEE_ATTR_RSA_OAEP_MGF_HASH to RSA-OAEP implementations
OP-TEE currently doesn't support using a different hash for MGF1 with RSA-OAEP. However, this is required for AOSP compatibility (e.g. in EncryptionOperationsTest.RsaOaepWithMGFDigestSuccess [1]).
Pass the MGF1 attribute to crypto implementations. Note that only libtomcrypt supports this feature at the moment, so other implementations will either fail or fall back to libtomcrypt when passed a different MGF1 hash.
Link: https://android.googlesource.com/platform/hardware/interfaces/+/refs/heads/main/security/keymint/aidl/vts/functional/KeyMintTest.cpp#5552 [1] Signed-off-by: Sami Tolvanen <samitolvanen@google.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 35a9139e | 20-Mar-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add CAAM key support for DH
Add CAAM key support for DH. Add DH black key support for shared secret generation.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Sa
drivers: caam: add CAAM key support for DH
Add CAAM key support for DH. Add DH black key support for shared secret generation.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8993bfd8 | 20-Mar-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add CAAM key support for ECC
Add CAAM key support for ECC. Add RSA black key support for key pair generation and sign/decrypt functions.
Signed-off-by: Clement Faure <clement.faure@n
drivers: caam: add CAAM key support for ECC
Add CAAM key support for ECC. Add RSA black key support for key pair generation and sign/decrypt functions.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 01449447 | 20-Mar-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add CAAM key support for DSA
Add CAAM key support for DSA. Add DSA black key support for key pair generation and sign/decrypt functions.
Signed-off-by: Clement Faure <clement.faure@n
drivers: caam: add CAAM key support for DSA
Add CAAM key support for DSA. Add DSA black key support for key pair generation and sign/decrypt functions.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ccbcceeb | 20-Mar-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add CAAM key support for RSA
Add CAAM key support for RSA. Add RSA black key support for key pair generation and sign/decrypt functions.
Signed-off-by: Clement Faure <clement.faure@n
drivers: caam: add CAAM key support for RSA
Add CAAM key support for RSA. Add RSA black key support for key pair generation and sign/decrypt functions.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1495f6c4 | 20-Mar-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add CAAM key driver
Add CAAM key driver and CAAM key object. Add key blob encapsulation methods. Add key serialize and deserialize functions for bignum encapsulation.
Signed-off-by:
drivers: caam: add CAAM key driver
Add CAAM key driver and CAAM key object. Add key blob encapsulation methods. Add key serialize and deserialize functions for bignum encapsulation.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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