| a755a64f | 26-Feb-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: virt: get guest ID of a guest partition
Add the function virt_get_guest_id() to return the guest ID of a guest partition.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: E
core: virt: get guest ID of a guest partition
Add the function virt_get_guest_id() to return the guest ID of a guest partition.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 29e682bd | 26-Feb-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: virt: get current guest partition
Add the function virt_get_current_guest() to get a pointer to the current guest partition. The returned guest partition has its reference counter increased wh
core: virt: get current guest partition
Add the function virt_get_current_guest() to get a pointer to the current guest partition. The returned guest partition has its reference counter increased which must be restored with a matching call to virt_put_guest() when the caller is done with the guest partition.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| ac1c95dd | 26-Feb-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: virt: get guest partition by guest ID
Add the function virt_get_guest() to get the pointer to a guest partition with a certain guest ID. The returned guest partition has its reference counter
core: virt: get guest partition by guest ID
Add the function virt_get_guest() to get the pointer to a guest partition with a certain guest ID. The returned guest partition has its reference counter increased which must be restored with a matching call to virt_put_guest() when the caller is done with the guest partition.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 9502204b | 14-Mar-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa+virt: avoid changing nexus mappings
Don't unmap nexus mapped rxtx buffers when configured for non-secure virtualization.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by
core: ffa+virt: avoid changing nexus mappings
Don't unmap nexus mapped rxtx buffers when configured for non-secure virtualization.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 7dc75b9b | 27-Jun-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: conf: restore generic default heap size
Remove reduced default heap size configuration of 48kB when pager is enabled on stm32mp1 platforms. 48kB of core heap may not always be enough
plat-stm32mp1: conf: restore generic default heap size
Remove reduced default heap size configuration of 48kB when pager is enabled on stm32mp1 platforms. 48kB of core heap may not always be enough to pass OP-TEE Test regression test 4011 related to Bleichenbacher attack since it consumes 4.5kB more memory on in OP-TEE core since we upgraded to Mbed TLS library 3.6.0. The platform now default uses the generic 64kB default heap size set from mk/config.mk.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 5e26ef8f | 01-May-2024 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Improve the trap handler
In current RISC-V trap handler, we always save the context into struct thread_trap_regs first, and copy the saved context into another specific structure to han
core: riscv: Improve the trap handler
In current RISC-V trap handler, we always save the context into struct thread_trap_regs first, and copy the saved context into another specific structure to handle that trap. For example, thread_user_ecall_handler() copies the struct thread_trap_regs to be struct thread_scall_regs before handling this system call. In fact, such copies may drop the performance and they should be eliminated.
In this commit, the specific data structure used to save the context is determined early in the trap handler by checking the type of the trap from CSR XCAUSE. Thus, the copies between context structures are eliminated.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com> Tested-by: Yu Chien Peter Lin <peterlin@andestech.com> Tested-by: Marouene Boubakri <marouene.boubakri@nxp.com>
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| bf870398 | 22-Mar-2024 |
Vincent Guittot <vincent.guittot@linaro.org> |
core/scmi: export sub.mk files in SCP-firmware
In order to ease the update of makefile when C or Header files of SCP-firmware project changes, we integrate them in the optee subdirectory of SCP-firm
core/scmi: export sub.mk files in SCP-firmware
In order to ease the update of makefile when C or Header files of SCP-firmware project changes, we integrate them in the optee subdirectory of SCP-firmware.
sub-optee-fvp.mk and sub-optee-stm32mp1.mk are moved unchanged in their product directories of SCP-repository.
scmi-server/sub.mk is split: - macro and compilation flags stay in optee-os - srcs and incdirs are moved in product/optee directory
All modules and products related to optee are located in the product/optee directory in the SCP-firmware repository, adding an "optee-" prefix in the product name is useless. Remove it.
the ci will temporary point to the sha1 of the merged MR branch of SCP-firmware. This will be replaced with next SCP-firmware tag v2.15.0 once released.
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| b70970fe | 25-Jun-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: arm: fix calloc() against GCC 14 -Wcalloc-transposed-args
Fix calloc() calls against GCC 14 directive -Wcalloc-transposed-args that makes GCC to complain with an warning/error trace message li
core: arm: fix calloc() against GCC 14 -Wcalloc-transposed-args
Fix calloc() calls against GCC 14 directive -Wcalloc-transposed-args that makes GCC to complain with an warning/error trace message like:
warning: 'calloc' sizes specified with 'sizeof' in the earlier argument and not in the later argument [-Wcalloc-transposed-args]
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 92870f11 | 13-Jun-2024 |
Imre Kis <imre.kis@arm.com> |
core: ffa: Improve FF-A memory sharing compliance
* Deny memory regions with zero pages * Validate total page count field * Validate total descriptor size including memory regions descriptors * Fix
core: ffa: Improve FF-A memory sharing compliance
* Deny memory regions with zero pages * Validate total page count field * Validate total descriptor size including memory regions descriptors * Fix incorrect FFA_ERROR status codes
Signed-off-by: Imre Kis <imre.kis@arm.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b65298cd | 13-Jun-2024 |
Imre Kis <imre.kis@arm.com> |
core: ffa: Deny unsupported memory sharing operations
Fragmented memory sharing operations and memory sharing where the transaction descriptors are forwarded in a custom buffer are not supported for
core: ffa: Deny unsupported memory sharing operations
Fragmented memory sharing operations and memory sharing where the transaction descriptors are forwarded in a custom buffer are not supported for SP destinations. Return early FFA_ERROR if these conditions are detected. Add CFG_NS_VIRTUALIZATION condition for virt_unset_guest calls in thread_spmc.c as a minor refactoring step.
Signed-off-by: Imre Kis <imre.kis@arm.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 4a88c465 | 23-Apr-2024 |
Imre Kis <imre.kis@arm.com> |
core: ffa: Return transaction type flag in retrieve response
Setting 'Memory management transaction type flag' in memory transaction descriptor when returned in FFA_MEM_RETRIEVE_RESP.
Signed-off-by
core: ffa: Return transaction type flag in retrieve response
Setting 'Memory management transaction type flag' in memory transaction descriptor when returned in FFA_MEM_RETRIEVE_RESP.
Signed-off-by: Imre Kis <imre.kis@arm.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 9223d8a0 | 17-Apr-2024 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
dts: st: add RCC support on stm32mp257f-ev1
Configure the clock tree for stm32mp257f-ev1 board.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Etienne Carriere <etien
dts: st: add RCC support on stm32mp257f-ev1
Configure the clock tree for stm32mp257f-ev1 board.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 2a569a93 | 27-Mar-2023 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
dts: st: enable RCC driver in stm32mp251
Add the RCC node to support clock on stm32mp25 platform.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Etienne Carriere <eti
dts: st: enable RCC driver in stm32mp251
Add the RCC node to support clock on stm32mp25 platform.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b0323341 | 13-Dec-2023 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
drivers: rstctrl: add reset controller for STM32MP25 platforms
Implement the STM32MP25 reset controller device by embedding it with CFG_STM32_RSTCTRL=y and CFG_STM32MP25_RSTCTRL=y.
Signed-off-by: G
drivers: rstctrl: add reset controller for STM32MP25 platforms
Implement the STM32MP25 reset controller device by embedding it with CFG_STM32_RSTCTRL=y and CFG_STM32MP25_RSTCTRL=y.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 3ef177b4 | 13-Dec-2023 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
drivers: stm32_rstctrl: move stm32mp1x controller in stm32mp1_rstcrl.c
This change prepares the STM32MP25 reset controller driver. The binding for the STM32MP25 is different from that of the STM32MP
drivers: stm32_rstctrl: move stm32mp1x controller in stm32mp1_rstcrl.c
This change prepares the STM32MP25 reset controller driver. The binding for the STM32MP25 is different from that of the STM32MP1x, so we will create a stm32mp25_rstcrl.c file. This change factorizes STM32 API functions in stm32_rstcrl.c file for probing and passing platform data.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 28c10f9e | 17-Jun-2024 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
clk: stm32mp25: Introduce STM32MP25 clocks platform
This driver is based on clk-stm32-core API to manage STM32 gates, dividers and muxes.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st
clk: stm32mp25: Introduce STM32MP25 clocks platform
This driver is based on clk-stm32-core API to manage STM32 gates, dividers and muxes.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 11ece294 | 10-Dec-2021 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
plat-stm32mp2: add rcc helper function
Add dedicate include file for RCC to add helper function.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Etienne Carriere <etie
plat-stm32mp2: add rcc helper function
Add dedicate include file for RCC to add helper function.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 9b87942a | 03-Jun-2024 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
plat-stm32mp2: sysconfig: add Safe Reset functionality
Add possibility to manage safely master IP reset. This is managed in SYSCFG safe reset control register (SYSCFG_SAFERSTCR)
Signed-off-by: Gabr
plat-stm32mp2: sysconfig: add Safe Reset functionality
Add possibility to manage safely master IP reset. This is managed in SYSCFG safe reset control register (SYSCFG_SAFERSTCR)
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| ef7785ad | 17-Mar-2022 |
Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> |
plat-stm32mp2: add stm32mp25 sysconfig driver
Driver to manage system configuration (sysconf) registers the sysconf are identified by an ID to be able to be adapted for DT.
Signed-off-by: Arnaud Po
plat-stm32mp2: add stm32mp25 sysconfig driver
Driver to manage system configuration (sysconf) registers the sysconf are identified by an ID to be able to be adapted for DT.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e2d9f64a | 19-Jun-2024 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
plat-stm32mp2: conf: enable shared io driver
Default enable shared io driver for platform stm32mp2.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Etienne Carriere <e
plat-stm32mp2: conf: enable shared io driver
Default enable shared io driver for platform stm32mp2.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b432ec14 | 13-Jun-2024 |
Tony Han <tony.han@microchip.com> |
plat-sam: register CPU OPP clock for SCMI usage
Add the definitinon for 'AT91_SCMI_CLK_CPU_OPP'. When the CPU OPP clock is available, add it to SCMI clock list.
Signed-off-by: Tony Han <tony.han@mi
plat-sam: register CPU OPP clock for SCMI usage
Add the definitinon for 'AT91_SCMI_CLK_CPU_OPP'. When the CPU OPP clock is available, add it to SCMI clock list.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| f496f2c4 | 13-Jun-2024 |
Tony Han <tony.han@microchip.com> |
plat-sam: prepare for CPU OPP (Operating Performance Points) support
Initialize clock rates array by parsing the device tree.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienne Carr
plat-sam: prepare for CPU OPP (Operating Performance Points) support
Initialize clock rates array by parsing the device tree.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 932a3e11 | 13-May-2024 |
Tony Han <tony.han@microchip.com> |
dts: at91: add assigned-clock settings for sama7g5 qspi0
Assign QSPI0's clock to SYSPLL GCK 133MHz.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@fos
dts: at91: add assigned-clock settings for sama7g5 qspi0
Assign QSPI0's clock to SYSPLL GCK 133MHz.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 1677a7fb | 18-Jun-2024 |
Gavin Liu <gavin.liu@mediatek.com> |
plat-mediatek: add support to extend MAX_XLAT_TABLE
When using the reserved virtual memory space, it is necessary to increase MAX_XLAT_TABLE based on its size.
Signed-off-by: Gavin Liu <gavin.liu@m
plat-mediatek: add support to extend MAX_XLAT_TABLE
When using the reserved virtual memory space, it is necessary to increase MAX_XLAT_TABLE based on its size.
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| dc9fd53b | 14-Jun-2024 |
Jerome Forissier <jerome.forissier@linaro.org> |
arm64.h: fix compile error with Clang
Clang 18.1.6 fails to compile OP-TEE OS with the following error:
CC out/arm/core/arch/arm/kernel/vfp.o In file included from core/arch/arm/kernel/vfp
arm64.h: fix compile error with Clang
Clang 18.1.6 fails to compile OP-TEE OS with the following error:
CC out/arm/core/arch/arm/kernel/vfp.o In file included from core/arch/arm/kernel/vfp.c:6: In file included from core/arch/arm/include/arm.h:137: core/arch/arm/include/arm64.h:455:1: error: expected readable system register 455 | DEFINE_U32_REG_READWRITE_FUNCS(fpcr) | ^ core/arch/arm/include/arm64.h:436:3: note: expanded from macro 'DEFINE_U32_REG_READWRITE_FUNCS' 436 | DEFINE_U32_REG_READ_FUNC(reg) \ | ^ core/arch/arm/include/arm64.h:430:3: note: expanded from macro 'DEFINE_U32_REG_READ_FUNC' 430 | DEFINE_REG_READ_FUNC_(reg, uint32_t, reg) | ^ core/arch/arm/include/arm64.h:417:15: note: expanded from macro 'DEFINE_REG_READ_FUNC_' 417 | asm volatile("mrs %0, " #asmreg : "=r" (val64)); \ | ^ <inline asm>:1:10: note: instantiated into assembly here 1 | mrs x8, fpcr | ^
...and similar ones for fpcr write, as well as fpsr read and write.
Clang 12.0.0 does not have any problem with this code which makes me think that it's a Clang/LLVM issue.
Work around the problem by using the coded system register identifiers S3_3_c4_c4_0 and S3_3_c4_c4_1 instead of fpcr and fpsr, respectively. The values 3-3-4-4-0 and 3-3-4-4-1 are taken from the Arm ARM sections C.5.2.8 and C.5.2.9.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Joakim Bech <joakim.bech@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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