Clean cache_l1 and cache_l2 maintenance

L1 cache maintenance is using Virtual Memory, whereas cache L2 maintenance
uses Physical Memory

Signed-off-by: Pascal Brand <pascal.brand@st.com>
Reviewed-by

Clean cache_l1 and cache_l2 maintenance

L1 cache maintenance is using Virtual Memory, whereas cache L2 maintenance
uses Physical Memory

Signed-off-by: Pascal Brand <pascal.brand@st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

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plat-stm: fix parallel build error

Generation of out/arm32-plat-stm/core/tz.lds may occur when the directory
out/arm32-plat-stm/core does not exist yet. The command should therefore
create it.
Note:

plat-stm: fix parallel build error

Generation of out/arm32-plat-stm/core/tz.lds may occur when the directory
out/arm32-plat-stm/core does not exist yet. The command should therefore
create it.
Note: plat-vexpress is correct.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Fix buf_overlaps_area security bug

buf_overlaps_area() only returned false in previous implementation that
might lead to a potential security vulnerability and instability in
general since secure an

Fix buf_overlaps_area security bug

buf_overlaps_area() only returned false in previous implementation that
might lead to a potential security vulnerability and instability in
general since secure and non-secure memory could eventually overlap.

Signed-off-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Joakim Bech <joakim.bech@linaro.org> (QEMU)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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Merge tee_{core,uta}_trace.h into libutil

Merges tee_core_trace.h and tee_uta_trace.h into a common trace.h
in libutil. Since the trace functions now resides libutil they have
to rely on core and li

Merge tee_{core,uta}_trace.h into libutil

Merges tee_core_trace.h and tee_uta_trace.h into a common trace.h
in libutil. Since the trace functions now resides libutil they have
to rely on core and libutee to provide functions to print to the
log device.

* Keeps compatible interface from tee_kta_trace.h
* Adds TAMSG() and TAMSG_RAW() to log TA related events
* Removes the TRACE_ALWAYS level

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt platform)
Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

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Move util.h from core into libutil

Moves util.h from core into libutil to make it available anywhere.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.bra

Move util.h from core into libutil

Moves util.h from core into libutil to make it available anywhere.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@st.com>

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Rename and move TEE_COMPILE_TIME_ASSERT

Renames TEE_COMPILE_TIME_ASSERT to COMPILE_TIME_ASSERT, the
macro is also moved to assert.h to be available anywhere.

Signed-off-by: Jens Wiklander <jens.wik

Rename and move TEE_COMPILE_TIME_ASSERT

Renames TEE_COMPILE_TIME_ASSERT to COMPILE_TIME_ASSERT, the
macro is also moved to assert.h to be available anywhere.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@st.com>

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core_tlb_maintenance(TLBINV_BY_ASID) is on

It also contains code style cleanup

Signed-off-by: Pascal Brand <pascal.brand@st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by:

core_tlb_maintenance(TLBINV_BY_ASID) is on

It also contains code style cleanup

Signed-off-by: Pascal Brand <pascal.brand@st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

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1.Fix user heap corruption by usr_params

Avoids corruption of heap by usr_params, and vice versa, when
stack_size+heap_size is a multiple of 1 MiB. usr_params was
previously unintentionally stored j

1.Fix user heap corruption by usr_params

Avoids corruption of heap by usr_params, and vice versa, when
stack_size+heap_size is a multiple of 1 MiB. usr_params was
previously unintentionally stored just outside the allocated
stack. If there is not enough padding between stack and heap,
usr_params will overwrite a part of the heap.

2.remove the 1MB limitation of heap_size+stack_size

Signed-off-by: "Rock P. Zhang" <RockPZhang@viatech.com.cn>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

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Fix sections to map

As highlighted by z08053520@126.com, MMU mapping functions tee_mmu_is_mapped()
and tee_mmu_map_io() wrongly compute the number of sections to check / map.

This patch checks / ma

Fix sections to map

As highlighted by z08053520@126.com, MMU mapping functions tee_mmu_is_mapped()
and tee_mmu_map_io() wrongly compute the number of sections to check / map.

This patch checks / maps only the relevant sections.

Signed-off-by: Pascal Brand <pascal.brand@st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: SkyZhang <z08053520@126.com>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

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thread: remove THREAD_LOCAL_EXCEPTION_SPS

Removes unused THREAD_LOCAL_EXCEPTION_SPS code.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.

thread: remove THREAD_LOCAL_EXCEPTION_SPS

Removes unused THREAD_LOCAL_EXCEPTION_SPS code.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt platform)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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Add crypto provider internal API

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.

Add crypto provider internal API

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

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plat-vexpress: add juno flavor

Adds support for ARM Versatile Express V2M-Juno by adding flavor juno.

UART3 (SoC UART1) is used as console uart instead of UART1 (FPGA UART1)
which is used by TSP in

plat-vexpress: add juno flavor

Adds support for ARM Versatile Express V2M-Juno by adding flavor juno.

UART3 (SoC UART1) is used as console uart instead of UART1 (FPGA UART1)
which is used by TSP in ARM Trusted Firmware. UART3 is used for OP-TEE
since that uart is easily accessible on the Juno board, while UART0 and
UART1 only are accessible via headers on the motherboard.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno and FVP)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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uart: add baudrate and clock freqency to uart_init

Adds baudrate and clock frequency as agruments to uart_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand

uart: add baudrate and clock freqency to uart_init

Adds baudrate and clock frequency as agruments to uart_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Rename teesmc_st.h to teesmc_optee.h

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt platform)
Reviewed-by: Pascal Brand <p

Rename teesmc_st.h to teesmc_optee.h

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt platform)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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core: generic buffer inside/outside/intersect routine

Remove multiple implementation of "is buffer inside a buffer" and
friends and rely on a generic core_is_buffer_inside/outside/intersect().

Revi

core: generic buffer inside/outside/intersect routine

Remove multiple implementation of "is buffer inside a buffer" and
friends and rely on a generic core_is_buffer_inside/outside/intersect().

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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Move tee_misc in generic part

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

Cleanup

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

plat-vexpress: set libtomcrypt_with_optimize_size

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pas

plat-vexpress: set libtomcrypt_with_optimize_size

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Add dhex_dump() and DHEXDUMP() to format and print data in hexadecimal

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-

Add dhex_dump() and DHEXDUMP() to format and print data in hexadecimal

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

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plat-vexpress: Set CPSR.A when initializing

Sets CPSR.A when initializing a core. The bit should already be
set by the OP-TEE Dispatcher in ARM Trusted Firmware but in case
it isn't make sure the bi

plat-vexpress: Set CPSR.A when initializing

Sets CPSR.A when initializing a core. The bit should already be
set by the OP-TEE Dispatcher in ARM Trusted Firmware but in case
it isn't make sure the bit is set.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP platform)

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Update relevant "msr {s,c}prs, reg" instructions

Updates relevant "msr {s,c}prs, reg" instructions to
"msr {s,c}prs_fsxc, reg" to avoid loosing bits when
setting SPSR/CPSR.

Reviewed-by: Joakim Bech

Update relevant "msr {s,c}prs, reg" instructions

Updates relevant "msr {s,c}prs, reg" instructions to
"msr {s,c}prs_fsxc, reg" to avoid loosing bits when
setting SPSR/CPSR.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Remove unused chip_services.c

Removes chip_services.c and declaration of enable_secure_wd() in
chip_services.h

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.br

Remove unused chip_services.c

Removes chip_services.c and declaration of enable_secure_wd() in
chip_services.h

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org>

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Rename .bss.prebss.* sections to .nozi.*

Renames .bss.prebss.* sections to .nozi.* to be clear that it's
not a "subsection" of .bss and also make the matching in the link
script easier.

plat-vexpre

Rename .bss.prebss.* sections to .nozi.*

Renames .bss.prebss.* sections to .nozi.* to be clear that it's
not a "subsection" of .bss and also make the matching in the link
script easier.

plat-vexpress:
* The .nozi section is moved after the .bss section
* The padding added before .nozi by the linker is recorded to
make it possible to do something useful with the otherwise
wasted memory

Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP platform)

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Remove some assembly files

Removes kta_table_unpg_asm.S,
Remove tee_pager_unpg_asm.S
Removes tee_mmu_unpg_asm.S
* Replaces assembly implementation of tee_mmu_switch()
with a C version
* Replaces c

Remove some assembly files

Removes kta_table_unpg_asm.S,
Remove tee_pager_unpg_asm.S
Removes tee_mmu_unpg_asm.S
* Replaces assembly implementation of tee_mmu_switch()
with a C version
* Replaces calls to tee_mmu_invtlb_asid with
secure_mmu_unifiedtlbinv_byasid

Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Optimize mmu handling

Previously there was two complete L1 mmu tables where one was only
used when kernel mapping was active and the other when user mapping
was active too. In addition to that there

Optimize mmu handling

Previously there was two complete L1 mmu tables where one was only
used when kernel mapping was active and the other when user mapping
was active too. In addition to that there was several sets of L2 mmu
tables which where unused.

Now there's only one complete L1 mmu table shared by all CPUs. There's
one small L1 mmu table for each thread used to keep user mappings. The
small L1 mmu tables takes each 128 bytes and can spans 32 MiB of
virtual memory.

This change saves memory ~32 KiB, but also prepares for multiprocessing
since each thread has its own user mapping.

Due to the change of mmu table handling many low level assembly and C
functions are changed, and some even removed.

Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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