arm32: clear junk in UL1 table

Clears junk in UL1 translation table when setting mapping for a TA in
tee_mmu_set_ctx().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal

arm32: clear junk in UL1 table

Clears junk in UL1 translation table when setting mapping for a TA in
tee_mmu_set_ctx().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt)

show more ...

plat-stm: separate sections

Puts functions and data into separate sections

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: P

plat-stm: separate sections

Puts functions and data into separate sections

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

show more ...

plat-vexpress: separate sections

Puts functions and data into separate sections

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU

plat-vexpress: separate sections

Puts functions and data into separate sections

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt and FVP)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...

arm32: assembly routines in separate sections

Moves some assembly routines into separate sections. This helps the garbage
collecting with the linker when separating what's must be unpaged from the
r

arm32: assembly routines in separate sections

Moves some assembly routines into separate sections. This helps the garbage
collecting with the linker when separating what's must be unpaged from the
rest of the code. The garbage collector in the linker works on dependencies
between sections.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...

tee_mm: remove legacy TEE_MM_POOL_PAGED define

Removes the legacy TEE_MM_POOL_PAGED define and unsused code
associated with it.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by

tee_mm: remove legacy TEE_MM_POOL_PAGED define

Removes the legacy TEE_MM_POOL_PAGED define and unsused code
associated with it.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...

plat-vexpress: reorganize boot for paging

Reorganizes the boot functions to keep primary and secondary boot path
more separated as a preparation for the pager.

Signed-off-by: Jens Wiklander <jens.w

plat-vexpress: reorganize boot for paging

Reorganizes the boot functions to keep primary and secondary boot path
more separated as a preparation for the pager.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...

arm32: move call to teecore_init_ta_ram()

Moves call to teecore_init_ta_ram() from init_teecore() to be called
directly from platform initialization routines. It's needed later when
the pager alloc

arm32: move call to teecore_init_ta_ram()

Moves call to teecore_init_ta_ram() from init_teecore() to be called
directly from platform initialization routines. It's needed later when
the pager allocates secure DDR to store that backing pages. We don't want
to call init_teecore() until the pager is fully initialized because
init_teecore() pulls in many dependencies.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...

plat-vexpress: clean memory configuration

* Cleans the memory configuration for plat-vexpress to make it easier
to add fake and real SRAM.
* Uses common functions to check if a buffer intersects o

plat-vexpress: clean memory configuration

* Cleans the memory configuration for plat-vexpress to make it easier
to add fake and real SRAM.
* Uses common functions to check if a buffer intersects or is inside
a memory area
* Increases number of cores from 4 to 8 for FVP flavor to support Base
model better.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...

arm32: make all TLB invalidations inner sharable

* Makes all TLB invalidations inner sharable
* Removes deprecated TLB invalidations

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Review

arm32: make all TLB invalidations inner sharable

* Makes all TLB invalidations inner sharable
* Removes deprecated TLB invalidations

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...

arm32: split and enhance core_init_mmu()

* Splits core_init_mmu() into two functions, core_init_mmu_tables() called
by primary CPU to create the translation tables and core_init_mmu_regs()
calle

arm32: split and enhance core_init_mmu()

* Splits core_init_mmu() into two functions, core_init_mmu_tables() called
by primary CPU to create the translation tables and core_init_mmu_regs()
called by each CPU to initialize MMU register settings.
* Adds option to map certain areas in a level 2 translation table instead
of only level 1 mapping. Allocation of the level 2 translation tables
is implemented in platform specific code, a weak function is provided
in case the platform doesn't implement/need the function.
* Adds L2 translation table for STM and Vexpress.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt platform)

show more ...

arm32: add thread_init_per_cpu()

Adds a thread_init_per_cpu() function that should be called instead of
thread_init_handlers() by the secondary CPUs. The primary CPU should first
call thread_init_ha

arm32: add thread_init_per_cpu()

Adds a thread_init_per_cpu() function that should be called instead of
thread_init_handlers() by the secondary CPUs. The primary CPU should first
call thread_init_handlers() and then thread_init_per_cpu().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...

merge tee_pager*.c and tee_pager*.h files

* Merges tee_pager_unpg.c and tee_pager.c into tee_pager.c
* Merges tee_pager_unpg.h and tee_pager.h into tee_pager.h
* Removes some legacy dummy macros
* R

merge tee_pager*.c and tee_pager*.h files

* Merges tee_pager_unpg.c and tee_pager.c into tee_pager.c
* Merges tee_pager_unpg.h and tee_pager.h into tee_pager.h
* Removes some legacy dummy macros
* Replaces some while(1) with panic()

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...

core/arm32: add traces in case of user TA abort

TA manager and TA mmu layer have specific trace handlers for TA aborts:
- dumping TA info.
- dumping TA mapping info.

Generic helper uuid2str().

Sig

core/arm32: add traces in case of user TA abort

TA manager and TA mmu layer have specific trace handlers for TA aborts:
- dumping TA info.
- dumping TA mapping info.

Generic helper uuid2str().

Signed-off-by: Pascal Brand <pascal.brand@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

show more ...

Cosmetics fixes

Signed-off-by: Pascal Brand <pascal.brand@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

Fix compile errors for core_self_tests.c

* Fixes compile errors when compiling core_self_tests.c with
debug prints
* Reduces allocation and alignment sizes in memalign() tests to work
with a sma

Fix compile errors for core_self_tests.c

* Fixes compile errors when compiling core_self_tests.c with
debug prints
* Reduces allocation and alignment sizes in memalign() tests to work
with a smaller heap.
* Checks that returned buffers has required alignment

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt and FVP)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

show more ...

bugfix cache_maintenance_l1() range selection

Bugfix for cache_maintenance_l1() which did the cache operation also
on the word following the specified area.

Signed-off-by: Jens Wiklander <jens.wikl

bugfix cache_maintenance_l1() range selection

Bugfix for cache_maintenance_l1() which did the cache operation also
on the word following the specified area.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...

arm32.h: make all asm statements volatile

The compiler can sometimes discard asm statements as an optimization,
adding volatile prevents that.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.o

arm32.h: make all asm statements volatile

The compiler can sometimes discard asm statements as an optimization,
adding volatile prevents that.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...

thread: fix reported lr from undef-abort

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

Clean syscall handling

* Implements a svc handler suitable to supply as a handler for
thread_svc_handler.
* Removes hardcoded call to tee_svc_sycall in
thread_svc_handler.
* Removes duplicated c

Clean syscall handling

* Implements a svc handler suitable to supply as a handler for
thread_svc_handler.
* Removes hardcoded call to tee_svc_sycall in
thread_svc_handler.
* Removes duplicated code for unwinding of stack after
tee_svc_enter_user_mode() replacing it with a single
tee_svc_unwind_enter_user_mode()

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt and FVP)
Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

show more ...

Align compilation flag optee_os/optee_test(teetest)

Add plat-stm: use -mfloat-abi=soft
to fix VFP register register arguments error during testsuite linking.
It defines GCC to generate output contai

Align compilation flag optee_os/optee_test(teetest)

Add plat-stm: use -mfloat-abi=soft
to fix VFP register register arguments error during testsuite linking.
It defines GCC to generate output containing library calls for floating-point operations.
optee_test(teetest) is statically linked with new client/linux driver so far.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
Signed-off-by: Cedric Chaumont <cedric.chaumont@st.com>

show more ...

plat-stm: clean tz init and l2 init/enable

Useless config of read-only reg SCU_CONFIG.

L2 FLZW feature: must be set in core after L2 is configured
and enable. TZ inits default not set core FLZ. L2

plat-stm: clean tz init and l2 init/enable

Useless config of read-only reg SCU_CONFIG.

L2 FLZW feature: must be set in core after L2 is configured
and enable. TZ inits default not set core FLZ. L2 enable
sets core FLZ.

Rename PL310_WAY_SIZE into PL310_LINE_SIZE.

Reviewed-on: https://gerrit.st.com/17060
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
Tested-by: Etienne CARRIERE <etienne.carriere@st.com>
Reviewed-by: Pascal BRAND <pascal.brand@st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
Signed-off-by: Pascal Brand <pascal.brand@st.com>

show more ...

plat-stm: set L2 prefetch offset to 7

Reviewed-on: https://gerrit.st.com/17052
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
Tested-by: Etienne CARRIERE <etienne.carriere@st.com>
Reviewed-

plat-stm: set L2 prefetch offset to 7

Reviewed-on: https://gerrit.st.com/17052
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
Tested-by: Etienne CARRIERE <etienne.carriere@st.com>
Reviewed-by: Pascal BRAND <pascal.brand@st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

show more ...

plat-stm: fix TA L1 table handling

bugz: https://bugzilla.bri.st.com/show_bug.cgi?id=6613

There is only 1 mmu table effectively used to map TAs: one
1 at mapped at a given time.

SEC_TA_MMU_TTB_FLD

plat-stm: fix TA L1 table handling

bugz: https://bugzilla.bri.st.com/show_bug.cgi?id=6613

There is only 1 mmu table effectively used to map TAs: one
1 at mapped at a given time.

SEC_TA_MMU_TTB_FLD must be aligned, with an alignment constraint
defined from number of 1MB section entries in the user mapping.

SEC_TA_MMU_TTB_FLD could be allocated at run time.

Cleanup linker file: remove useless CTX_MEM and optimize a bit
stacks and mmu tables location.

Reviewed-on: https://gerrit.st.com/17038
Tested-by: Etienne CARRIERE <etienne.carriere@st.com>
Reviewed-by: Pascal BRAND <pascal.brand@st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

show more ...

plat-stm: L2CC_MUTEX implementation

Signed-off-by: Pascal Brand <pascal.brand@st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

Move bget to libutils replacing dlmalloc

* Moves bget to libutils replacing dlmalloc as kernel memory allocator
* Restores the code formatting of bget.{c,h} to the original state as
parts of the c

Move bget to libutils replacing dlmalloc

* Moves bget to libutils replacing dlmalloc as kernel memory allocator
* Restores the code formatting of bget.{c,h} to the original state as
parts of the current code was unreadable
* Adds malloc_add_pool() to make use of previously unused memory
* Moves call to malloc_init() into platform specific code
* Restores MDBG into working condition
* Adds memalign function to bget.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt platform)
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (FVP)
Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

show more ...