arm: add Aarch64 (aka ARM64) support

* Adds support for ARM64 in plat-vexpress
* The name of the ARM64 instruction set is, hence _a64.S suffix to ARM64
assembly files to keep them apart from the A

arm: add Aarch64 (aka ARM64) support

* Adds support for ARM64 in plat-vexpress
* The name of the ARM64 instruction set is, hence _a64.S suffix to ARM64
assembly files to keep them apart from the A32 assembly files.
* ARM64 specific C code is inside #ifdef ARM64

The ARM64 port has all features of the ARM32 port with the exception of:
* Paging not supported
* No crypto ARMv8 crypto extensions implemented

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP, Juno)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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core arm sta: 64bit print fix

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

core arm: toolchain workaround

The gcc Aarch64 toolchain seems to need this.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

Have a default value for MAX_XLAT_TABLES in core_mmu_lpae.c

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal

Have a default value for MAX_XLAT_TABLES in core_mmu_lpae.c

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Remove CFG_WITH_SEC_MON

CFG_WITH_SEC_MON = !CFG_WITH_ARM_TRUSTED_FW

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by

Remove CFG_WITH_SEC_MON

CFG_WITH_SEC_MON = !CFG_WITH_ARM_TRUSTED_FW

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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plat-vexpress/entry_a32.S: fix wrong name in END_FUNC macro

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal

plat-vexpress/entry_a32.S: fix wrong name in END_FUNC macro

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Cleanup: comments and unused function

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

plat-stm: Use exception helper

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

Check invalid thread id

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
Tested-by: E

Check invalid thread id

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
Tested-by: Etienne CARRIERE <etienne.carriere@st.com>
Reviewed-by: Pascal BRAND <pascal.brand@st.com>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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core: bugfix thread_set_exceptions()

Fixes problem that thread_set_exceptions() wouldn't clear an already
present exception bit.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by:

core: bugfix thread_set_exceptions()

Fixes problem that thread_set_exceptions() wouldn't clear an already
present exception bit.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

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Rename arm32 architecture to arm

Renames arm32 directories to arm.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Reviewed-by

Rename arm32 architecture to arm

Renames arm32 directories to arm.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (QEMU platform)

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core/arm32: fix TA cache services

Reviewed-by: Pascal BRAND <pascal.brand@st.com>
Tested-by: Etienne CARRIERE <etienne.carriere@st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
Signed

core/arm32: fix TA cache services

Reviewed-by: Pascal BRAND <pascal.brand@st.com>
Tested-by: Etienne CARRIERE <etienne.carriere@st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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arm32: separate ARM32 specific

* ARM32 specific C code is broken out and surrounded by #ifdef ARM32
* Some small architectural changes in thread and abort handling to
prepare for Aarch64

Signed-o

arm32: separate ARM32 specific

* ARM32 specific C code is broken out and surrounded by #ifdef ARM32
* Some small architectural changes in thread and abort handling to
prepare for Aarch64

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

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arm32: update types to be 64bit ready

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

arm32: rename LOCK and UNLOCK

Renames defines LOCK and UNLOCK to SPINLOCK_LOCK and SPINLOCK_UNLOCK
respectively. The definitions are also moved to tz_proc.h.

Signed-off-by: Jens Wiklander <jens.wik

arm32: rename LOCK and UNLOCK

Renames defines LOCK and UNLOCK to SPINLOCK_LOCK and SPINLOCK_UNLOCK
respectively. The definitions are also moved to tz_proc.h.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Fix some 64bit printf warnings

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

arm32: dynamic user va range

core_mmu_get_user_va_range() selects user va range. No change in user TA
va address when configured with V7 MMU tables.

When configured with LPAE only use TTBR0. The to

arm32: dynamic user va range

core_mmu_get_user_va_range() selects user va range. No change in user TA
va address when configured with V7 MMU tables.

When configured with LPAE only use TTBR0. The top L0 table is CPU
specific with all entries common except one which is used when mapping
user TAs. User TA va range is dependent on the first unused L0 entry.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

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arm32: manage stack unwinding in thread module

Renames tee_svc_enter_user_mode() and tee_svc_unwind_enter_user_mode() to
thread_enter_user_mode() and thread_unwind_user_mode() respectively. The
func

arm32: manage stack unwinding in thread module

Renames tee_svc_enter_user_mode() and tee_svc_unwind_enter_user_mode() to
thread_enter_user_mode() and thread_unwind_user_mode() respectively. The
functions are also moved from the tee/arch_svc* group to kernel/thread*.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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select base types based on ILP32 and LP64 defines

* Selects base types base on the __ILP32__ and __LP64__ defines
* Fixes warnings from change of base types

Signed-off-by: Jens Wiklander <jens.wikl

select base types based on ILP32 and LP64 defines

* Selects base types base on the __ILP32__ and __LP64__ defines
* Fixes warnings from change of base types

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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thread_check_canaries: expand assert macro

Expands the ASSERT_STACK_CANARIES in thread_check_canaries() to
make it easier to see which in stack the canary is corrupted.

Signed-off-by: Jens Wiklande

thread_check_canaries: expand assert macro

Expands the ASSERT_STACK_CANARIES in thread_check_canaries() to
make it easier to see which in stack the canary is corrupted.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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tee_time_arm_cntpct.c: remove do_div()

Remove do_div from tee_time_arm_cntpct.c now that we support 64-bit
divisions directly.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by:

tee_time_arm_cntpct.c: remove do_div()

Remove do_div from tee_time_arm_cntpct.c now that we support 64-bit
divisions directly.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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plat-vexpress: delete unused defines

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

Convert configuration variables to CFG_* name

- Rename configuration variables that do not follow the CFG_* convention
- Delete useless -D<VAR> compiler flags
- Slightly reformat mk/conf.mk, add com

Convert configuration variables to CFG_* name

- Rename configuration variables that do not follow the CFG_* convention
- Delete useless -D<VAR> compiler flags
- Slightly reformat mk/conf.mk, add comments

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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Rename CFG_TRACE_LEVEL to TRACE_LEVEL

The trace level macro is not meant to be configured directly, it takes its
value from CFG_TEE_CORE_LOG_LEVEL (when the TEE core is compiled) or from
CFG_TEE_TA_

Rename CFG_TRACE_LEVEL to TRACE_LEVEL

The trace level macro is not meant to be configured directly, it takes its
value from CFG_TEE_CORE_LOG_LEVEL (when the TEE core is compiled) or from
CFG_TEE_TA_LOG_LEVEL (when user libraries are compiled). Therefore it should
not have a CFG_ prefix.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add helpers to manage maskable cpu exception

Adds helpers thread_{get,set,mask,unmask}_exceptions() to manage
the AIF bits of CPSR.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
T

core: add helpers to manage maskable cpu exception

Adds helpers thread_{get,set,mask,unmask}_exceptions() to manage
the AIF bits of CPSR.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

show more ...