core: fix fiq delivery in Aarch64

Prior to this patch reception of a FIQ while in secure user mode (secure
EL0) would be treated as if an IRQ was received instead. This resulted
in an exit to normal

core: fix fiq delivery in Aarch64

Prior to this patch reception of a FIQ while in secure user mode (secure
EL0) would be treated as if an IRQ was received instead. This resulted
in an exit to normal world and when FIQ was unmasked it would be
re-triggered but this time received as an FIQ received while in normal
world.

This patch fixes this and handles FIQ directly when received while in
secure user mode.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: bugfix generic boot init_runtime()

Fixes confusion of virtual and physical addresses in init_runtime() in
core/arch/arm/kernel/generic_boot.c.

Tested-by: Pascal Brand <pascal.brand@linaro.org

core: bugfix generic boot init_runtime()

Fixes confusion of virtual and physical addresses in init_runtime() in
core/arch/arm/kernel/generic_boot.c.

Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey)
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add core_mmu_get_type_by_pa()

Adds core_mmu_get_type_by_pa() to find memory type based on physical
address.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joaki

core: add core_mmu_get_type_by_pa()

Adds core_mmu_get_type_by_pa() to find memory type based on physical
address.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: pl310 functions take a base address

Updates PL310 functions to take a base address of the PL310 device to be
able to handle non-linear mappings.

Reviewed-by: Pascal Brand <pascal.brand@linaro

core: pl310 functions take a base address

Updates PL310 functions to take a base address of the PL310 device to be
able to handle non-linear mappings.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm: translate uart base address before use

Translates physical addresses used for uart register base addresses
before use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pa

plat-stm: translate uart base address before use

Translates physical addresses used for uart register base addresses
before use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-imx: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand

plat-imx: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-ls: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand

plat-ls: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-mediatek: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal

plat-mediatek: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-ti: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand

plat-ti: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-hikey: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Bra

plat-hikey: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-sunxi: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Bra

plat-sunxi: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal

plat-vexpress: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: bugfix teecore_init_*_ram()

Fixes confusion of virtual and physical addresses in
teecore_init_ta_ram() and teecore_init_pub_ram().

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

core: bugfix teecore_init_*_ram()

Fixes confusion of virtual and physical addresses in
teecore_init_ta_ram() and teecore_init_pub_ram().

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: bugfix address translation for user TA entry

Bugfixes address translation for user TA stack pointer and pointer
to parameters.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Revi

core: bugfix address translation for user TA entry

Bugfixes address translation for user TA stack pointer and pointer
to parameters.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove kmap interface

Removes kmap interface as the secure DDR memory is mapped already.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@li

core: remove kmap interface

Removes kmap interface as the secure DDR memory is mapped already.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: lpae workaround for user mapping

User mapping for LPAE depends on not using the first entry in the top
translation table. This workaround makes sure that the first entry never
is used.

Review

core: lpae workaround for user mapping

User mapping for LPAE depends on not using the first entry in the top
translation table. This workaround makes sure that the first entry never
is used.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: bugfix mapping of console uart

Bugfixes mapping of console uart to use secure device instead of
non-secure device type.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Re

plat-vexpress: bugfix mapping of console uart

Bugfixes mapping of console uart to use secure device instead of
non-secure device type.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-sunxi: refactor memory configuration

Refactors memory configuration to use the same memory configuration
scheme as all the other platforms.

Reviewed-by: Jerome Forissier <jerome.forissier@lina

plat-sunxi: refactor memory configuration

Refactors memory configuration to use the same memory configuration
scheme as all the other platforms.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: DEVICE{4-6} entries to bootcfg_memory_map[]

Adds entries to bootcfg_memory_map[] for DEVICE4, DEVICE5, and DEVICE6
ranges.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens

core: DEVICE{4-6} entries to bootcfg_memory_map[]

Adds entries to bootcfg_memory_map[] for DEVICE4, DEVICE5, and DEVICE6
ranges.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: move tee_ta_manager.c out of arch/arm

Moves most parts of tee_ta_manager.c into core/kernel, keeping only
tee_ta_verify_param() in the original file as it uses architecture
specific checks.

R

core: move tee_ta_manager.c out of arch/arm

Moves most parts of tee_ta_manager.c into core/kernel, keeping only
tee_ta_verify_param() in the original file as it uses architecture
specific checks.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add interrupt framework

Adds interrupt frameworks and adjusts gic driver to fit in.

Update plat-vexpress and sunxi platforms to initialize gic with slightly
modified interface.

Reviewed-by:

core: add interrupt framework

Adds interrupt frameworks and adjusts gic driver to fit in.

Update plat-vexpress and sunxi platforms to initialize gic with slightly
modified interface.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Delete core/arch/arm/tee/tee_rpmb.c and core/include/tee/tee_rpmb.h

Move code into tee_rpmb_fs_common.c.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pas

Delete core/arch/arm/tee/tee_rpmb.c and core/include/tee/tee_rpmb.h

Move code into tee_rpmb_fs_common.c.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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Delete core/arch/arm/tee/arch_tee_fs.c

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.

Delete core/arch/arm/tee/arch_tee_fs.c

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: bugfix static TA buffer from user TA

Before this patch the checks of the parameters buffers for a TA where
required to be physical pointers. When a static TA is invoked from a
user TA the virt

core: bugfix static TA buffer from user TA

Before this patch the checks of the parameters buffers for a TA where
required to be physical pointers. When a static TA is invoked from a
user TA the virtual addresses of the buffers aren't translated to
physical addresses as they will be translated back to the same virtual
address again. With this patch the parameters buffers are tagged as
containing virtual addresses allowing the checks to take that into
account.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: map TA with strict permissions

Maps user TA with strict permissions. Blocks with mixed permissions are
mapped with the union of the permissions. In order to take full
advantage of the strict p

core: map TA with strict permissions

Maps user TA with strict permissions. Blocks with mixed permissions are
mapped with the union of the permissions. In order to take full
advantage of the strict permissions TAs should be mapped using small
pages, that is, using the config option CFG_SMALL_PAGE_USER_TA = y.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, Juno)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...