Update initialization messages

Demote a pager message from EMSG to IMSG and reformat it. Also
reformat the end of initialization message.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.or

Update initialization messages

Demote a pager message from EMSG to IMSG and reformat it. Also
reformat the end of initialization message.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: struct tee_ta_session: remove calling_sess

Removes calling_sess from struct tee_ta_session as the information is
available via link_tsd instead.

Reviewed-by: Joakim Bech <joakim.bech@linaro.o

core: struct tee_ta_session: remove calling_sess

Removes calling_sess from struct tee_ta_session as the information is
available via link_tsd instead.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: replace tee_ta_set_current_session()

Replace tee_ta_set_current_session() with tee_ta_push_current_session()
and tee_ta_pop_current_session() to set and restore the current session
in a stack

core: replace tee_ta_set_current_session()

Replace tee_ta_set_current_session() with tee_ta_push_current_session()
and tee_ta_pop_current_session() to set and restore the current session
in a stack like fashion.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: update tee_svc_copy_{to,from}_user

Removes the sess parameter to tee_svc_copy_to_user(),
tee_svc_copy_from_user() and tee_svc_copy_kaddr_to_uref() as it's always
passed as either NULL or curre

core: update tee_svc_copy_{to,from}_user

Removes the sess parameter to tee_svc_copy_to_user(),
tee_svc_copy_from_user() and tee_svc_copy_kaddr_to_uref() as it's always
passed as either NULL or current session.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Add support for Spreadtrum SC9860(alias whale2) board

make PLATFORM=sprd-sc9860 [CFG_ARM64_core=y]

Signed-off-by: Aijun Sun <aijun.sun@spreadtrum.com>
Reviewed-by: Jerome Forissier <jerome.forissie

Add support for Spreadtrum SC9860(alias whale2) board

make PLATFORM=sprd-sc9860 [CFG_ARM64_core=y]

Signed-off-by: Aijun Sun <aijun.sun@spreadtrum.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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zynqmp: Map UART memory area as secure

Commit 1e00aeb97ffa ("core: non-linear mapping of secure world devices")
revealed a bug in the ZynqMP platform that mapped the UART non-secure
but looked up it

zynqmp: Map UART memory area as secure

Commit 1e00aeb97ffa ("core: non-linear mapping of secure world devices")
revealed a bug in the ZynqMP platform that mapped the UART non-secure
but looked up its VA as secure memory, resulting in an exception when
accessing the UART registers.
Fixing this by mapping the UART secure, making the mapping consistent
with the VA lookup.

Fixes: dc57f5a0e8f3 ("Add support for ZynqMP")
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: boot: make boot parameters unsigned long

Changes all boot parameters passed in registers to be of the type
unsigned long to match the register size and allow greater width on
64-bit systems.

core: boot: make boot parameters unsigned long

Changes all boot parameters passed in registers to be of the type
unsigned long to match the register size and allow greater width on
64-bit systems.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU v7 & v8)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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vexpress: CFG_DT=y for QEMU platforms

Enables Device Tree support for the two QEMU platforms.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wikland

vexpress: CFG_DT=y for QEMU platforms

Enables Device Tree support for the two QEMU platforms.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: generic boot: edit device tree

If configured with CFG_DT configures supplied device tree to add a node
for OP-TEE and reservation of shared memory.

Reviewed-by: Jerome Forissier <jerome.

core: arm: generic boot: edit device tree

If configured with CFG_DT configures supplied device tree to add a node
for OP-TEE and reservation of shared memory.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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arm: generic_boot: Add fdt parameter to entry point (register r2)

When CFG_DT=y, OP-TEE expects to find the address of the Flattened
Device Tree (FDT) binary in r2. The bootloader has to take care o

arm: generic_boot: Add fdt parameter to entry point (register r2)

When CFG_DT=y, OP-TEE expects to find the address of the Flattened
Device Tree (FDT) binary in r2. The bootloader has to take care of
this. r2 is not used when CFG_DT=n.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-hikey: use register_phys_mem()

Uses register_phys_mem to define mapping of devices instead of
the old DEVICE* defines.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jerome Foris

plat-hikey: use register_phys_mem()

Uses register_phys_mem to define mapping of devices instead of
the old DEVICE* defines.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: use register_phys_mem()

Uses register_phys_mem to define mapping of devices instead of
the old DEVICE* defines.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens

plat-vexpress: use register_phys_mem()

Uses register_phys_mem to define mapping of devices instead of
the old DEVICE* defines.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add support for dynamic core memory mapping

Adds support for dynamic core memory mapping. Primary use case is
mapping of devices found in device tree.

Reviewed-by: Joakim Bech <joakim.bech@li

core: add support for dynamic core memory mapping

Adds support for dynamic core memory mapping. Primary use case is
mapping of devices found in device tree.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: refactor memory map initialization

Refactors memory map initialization by replacing struct map_area with
struct tee_mmap_region to avoid one intermediate format of the memory
map.

Reviewed-by

core: refactor memory map initialization

Refactors memory map initialization by replacing struct map_area with
struct tee_mmap_region to avoid one intermediate format of the memory
map.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: move generic_core_bootcfg.c into core_mmu.c

Moves core/arch/arm/kernel/generic_core_bootcfg.c into
core/arch/arm/mm/core_mmu.c as generic_core_bootcfg.c isn't optional
anymore.

Reviewed-by: J

core: move generic_core_bootcfg.c into core_mmu.c

Moves core/arch/arm/kernel/generic_core_bootcfg.c into
core/arch/arm/mm/core_mmu.c as generic_core_bootcfg.c isn't optional
anymore.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: non-linear mapping of secure world devices

This patch introduces non-linear mapping of secure world devices, that is,
physical and virtual address of a device can differ.

Reviewed-by: Joakim

core: non-linear mapping of secure world devices

This patch introduces non-linear mapping of secure world devices, that is,
physical and virtual address of a device can differ.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-ls: Assign uart device type as MEM_AREA_IO_SEC

Assign uart device type as MEM_AREA_IO_SEC rather than
MEM_AREA_IO_NSEC.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Sumit G

plat-ls: Assign uart device type as MEM_AREA_IO_SEC

Assign uart device type as MEM_AREA_IO_SEC rather than
MEM_AREA_IO_NSEC.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>

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Removing legacy pub_ddr init code

Secure side doesn't manage anything related to the public DDR any longer
and therefore the complete memory area as defined in TEE core shall be
available to the non

Removing legacy pub_ddr init code

Secure side doesn't manage anything related to the public DDR any longer
and therefore the complete memory area as defined in TEE core shall be
available to the non-secure side (i.e., Linux kernel).

Signed-off-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Joakim Bech <joakim.bech@linaro.org>
Suggested-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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hikey: enable 8 threads by default

Set CFG_NUM_THREADS to 8 by default for HiKey since the board has
8 cores. By maximizing the concurrency level, we can better stress
test the secure code.

Signed-

hikey: enable 8 threads by default

Set CFG_NUM_THREADS to 8 by default for HiKey since the board has
8 cores. By maximizing the concurrency level, we can better stress
test the secure code.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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Add support for ZynqMP

Add support for Xilinx UltraScale+ Zynq MPSoC.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jero

Add support for ZynqMP

Add support for Xilinx UltraScale+ Zynq MPSoC.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: tee_svc_do_call fix unaligned sp

Fixes problem with unaligned sp when number of parameters to
a syscall is odd.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander

core: tee_svc_do_call fix unaligned sp

Fixes problem with unaligned sp when number of parameters to
a syscall is odd.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: thread: fix unaligned stack pointer

Fixes unaligned stack pointer in __thread_enter_user_mode. The
stack pointer must always be 8 byte aligned when entering a new
function.

Reviewed-by: Joaki

core: thread: fix unaligned stack pointer

Fixes unaligned stack pointer in __thread_enter_user_mode. The
stack pointer must always be 8 byte aligned when entering a new
function.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: fixes undefined behavior

Fixes undefined behavior detected with CFG_CORE_SANITIZE_UNDEFINED=y

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@l

core: fixes undefined behavior

Fixes undefined behavior detected with CFG_CORE_SANITIZE_UNDEFINED=y

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm32: fix masking exceptions on exit

Before this patch FIQ and asynchronous abort wasn't masked on
all exit paths. This patch fixes that.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Te

core: arm32: fix masking exceptions on exit

Before this patch FIQ and asynchronous abort wasn't masked on
all exit paths. This patch fixes that.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: invalidate i-cache inner shareable

When invalidating i-cache and branch predictor use inner shareable
(icialluis and bpiallis) versions of the operations to make it visible
to other cores

core: arm: invalidate i-cache inner shareable

When invalidating i-cache and branch predictor use inner shareable
(icialluis and bpiallis) versions of the operations to make it visible
to other cores.

Fixes occasional problem with pager with multiple active threads.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (HiKey)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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