History log of /optee_os/core/arch/ (Results 251 – 275 of 4029)
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10e9deff22-Jan-2025 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: add RISAL configuration on the stm32mp257f-ev1 board

Configure the RISALs on the stm32mp257f-ev1 board so that the LPSRAM1/2/3
are accessible by both the ARM Cortex A-35 and ARM Cortex M

dts: stm32: add RISAL configuration on the stm32mp257f-ev1 board

Configure the RISALs on the stm32mp257f-ev1 board so that the LPSRAM1/2/3
are accessible by both the ARM Cortex A-35 and ARM Cortex M0+.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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16aaaf2f27-May-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: declare RISAF instances as access controllers

Declare RISAFs as access controllers so that it's possible to check
firewall access rights on address ranges, and reconfigure dynamically
RI

dts: stm32: declare RISAF instances as access controllers

Declare RISAFs as access controllers so that it's possible to check
firewall access rights on address ranges, and reconfigure dynamically
RISAF regions.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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9a3ddeba23-Jan-2025 Thomas Bourgoin <thomas.bourgoin@foss.st.com>

dts: stm32: add SAES dependency on RNG firewall configuration for stm32mp13

SAES is connected to RNG by an internal RNG bus to be DPA resistant.
We must ensure that RNG is allocated to the secure wo

dts: stm32: add SAES dependency on RNG firewall configuration for stm32mp13

SAES is connected to RNG by an internal RNG bus to be DPA resistant.
We must ensure that RNG is allocated to the secure world to prevent
the non secure to shut down the RNG peripheral.
Therefore add RNG to the access-controllers of SAES node in stm32mp13
SoC DTSI files.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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1474416223-Feb-2024 Thomas Bourgoin <thomas.bourgoin@foss.st.com>

dts: stm32: enable PKA on stm32mp135f-dk

Sets PKA peripheral status to okay.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com

dts: stm32: enable PKA on stm32mp135f-dk

Sets PKA peripheral status to okay.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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1f2e5a0d22-Feb-2024 Thomas Bourgoin <thomas.bourgoin@foss.st.com>

plat-stm32mp1: conf: default enable PKA

Default enable PKA compilation.
Enable the STM32_CRYPTO_DRIVERS if PKA is compiled.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by:

plat-stm32mp1: conf: default enable PKA

Default enable PKA compilation.
Enable the STM32_CRYPTO_DRIVERS if PKA is compiled.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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4ccca7d027-Sep-2023 Etienne Carriere <etienne.carriere@foss.st.com>

dts: stm32: add PKA dependency on RNG clock for stm32mp13

Adds missing RNG clock resource in PKA nodes in stm32mp13 SoC DTSI
files.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Si

dts: stm32: add PKA dependency on RNG clock for stm32mp13

Adds missing RNG clock resource in PKA nodes in stm32mp13 SoC DTSI
files.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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8ea6cdca20-Nov-2024 Thomas Bourgoin <thomas.bourgoin@foss.st.com>

dts: stm32: fix compatible name of PKA peripheral

Use st,stm32mp13-pka instead of st,stm32mp13-pka64 to be aligned with
all other STMicroelectronics compatibles.

Signed-off-by: Thomas Bourgoin <tho

dts: stm32: fix compatible name of PKA peripheral

Use st,stm32mp13-pka instead of st,stm32mp13-pka64 to be aligned with
all other STMicroelectronics compatibles.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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ded2078023-Oct-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_i2c: use compatible st,stm32mp15-i2c-non-secure

Change STM32 I2C driver to rely on the compatible DT property of the
node to store whether the bus is expected assigned to secure or
no

drivers: stm32_i2c: use compatible st,stm32mp15-i2c-non-secure

Change STM32 I2C driver to rely on the compatible DT property of the
node to store whether the bus is expected assigned to secure or
non-secure world. Using a non-secure I2C bus in OP-TEE on stm32mp1
platforms is something expected only on STM32MP15 variant for
compatibility with platform already supported in upstream Linux/U-Boot
components, as defined by st,stm32mp15-i2c-non-secure specific
compatible string ID.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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234a510d09-Dec-2024 Etienne Carriere <etienne.carriere@foss.st.com>

dts: stm32: stm32mp15 DH board uses non-secure I2C4 bus

Update stm32mp15 based DH boards DTS file to explicitly use non-secure
I2C4 bus as set in the ETZPC node st,decprot property.

Signed-off-by:

dts: stm32: stm32mp15 DH board uses non-secure I2C4 bus

Update stm32mp15 based DH boards DTS file to explicitly use non-secure
I2C4 bus as set in the ETZPC node st,decprot property.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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6c52796721-Jan-2025 Raymond Mao <raymond.mao@linaro.org>

core: expand the fdt transfer entry right before it is being used

Move the expanding of fdt transfer entry from boot_init_primary_early
to boot_init_primary_late.

Logically expanding of the fdt ent

core: expand the fdt transfer entry right before it is being used

Move the expanding of fdt transfer entry from boot_init_primary_early
to boot_init_primary_late.

Logically expanding of the fdt entry is not required until the
system needs to update it with new nodes which happens in init primary
late.

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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37de179112-Dec-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp2: conf: default enable STGEN for STM32MP2 platforms

Default enable STGEN for STM32MP2 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne C

plat-stm32mp2: conf: default enable STGEN for STM32MP2 platforms

Default enable STGEN for STM32MP2 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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3d20b6a412-Dec-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: add STGEN node in stm32mp251.dtsi

Add the STGEN node in the stm32mp251.dtsi SoC device tree file and
default enable it as it is the source for the ARM generic timer
of the ARM cortexA35.

dts: stm32: add STGEN node in stm32mp251.dtsi

Add the STGEN node in the stm32mp251.dtsi SoC device tree file and
default enable it as it is the source for the ARM generic timer
of the ARM cortexA35.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dcdbcea212-Dec-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp2: enable RTC framework if CFG_DRIVERS_RTC is set

If CFG_DRIVERS_RTC is enabled, force the compilation of the file
core/drivers/rtc/rtc.c in order to share the generic functions.

Signed

plat-stm32mp2: enable RTC framework if CFG_DRIVERS_RTC is set

If CFG_DRIVERS_RTC is enabled, force the compilation of the file
core/drivers/rtc/rtc.c in order to share the generic functions.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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29ee70d612-Dec-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp1: enable RTC framework if CFG_DRIVERS_RTC is set

If CFG_DRIVERS_RTC is enabled, force the compilation of the file
core/drivers/rtc/rtc.c in order to share the generic functions.

Signed

plat-stm32mp1: enable RTC framework if CFG_DRIVERS_RTC is set

If CFG_DRIVERS_RTC is enabled, force the compilation of the file
core/drivers/rtc/rtc.c in order to share the generic functions.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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f3fc82b912-Dec-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: add RTC node in stm32mp251.dtsi

Add the RTC node in stm32mp251.dtsi and default enable it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere

dts: stm32: add RTC node in stm32mp251.dtsi

Add the RTC node in stm32mp251.dtsi and default enable it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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4dcbaa6d12-Dec-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp2: conf: default enable the RTC driver

Default enable the RTC driver support on stm32mp2 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne

plat-stm32mp2: conf: default enable the RTC driver

Default enable the RTC driver support on stm32mp2 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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5eb947b316-Dec-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp1: conf: default enable the RTC driver

Default enable the RTC driver support on stm32mp1 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne

plat-stm32mp1: conf: default enable the RTC driver

Default enable the RTC driver support on stm32mp1 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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bef959c802-Dec-2024 Jens Wiklander <jens.wiklander@linaro.org>

core: arm: ffa: switch to FF-A version 1.2

Update FF-A minor version from 1 to 2. spmc_exchange_version() is
updated to take the new version into account when negotiating with a
caller.

Configurati

core: arm: ffa: switch to FF-A version 1.2

Update FF-A minor version from 1 to 2. spmc_exchange_version() is
updated to take the new version into account when negotiating with a
caller.

Configurations with SPMC at EL3 and S-EL2 supplies an SP manifest when
booting OP-TEE, read the FF-A version to use from the manifest instead
of using the hard coded version.

The configuration with SPMC at S-EL1, part of OP-TEE, keep the FF-A
version at version 1.1 when configured with CFG_NS_VIRTUALIZATION=y as
workaround to remain compatible with Xen. This workaround will not be
needed after the next Xen release and can be removed then.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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ddec5d6b04-Dec-2024 Jens Wiklander <jens.wiklander@linaro.org>

core: ffa: update FFA_CONSOLE_LOG_64 for v1.2 SPs

Update FFA_CONSOLE_LOG_64 to handle the ABI extension for FF-A v1.2. The
extended ABI is only used for FF-A v1.2 SPs .

Signed-off-by: Jens Wiklande

core: ffa: update FFA_CONSOLE_LOG_64 for v1.2 SPs

Update FFA_CONSOLE_LOG_64 to handle the ABI extension for FF-A v1.2. The
extended ABI is only used for FF-A v1.2 SPs .

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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750a54aa03-Dec-2024 Jens Wiklander <jens.wiklander@linaro.org>

core: arm: ffa: add FF-A version 1.2 defines

Add defines for SMC IDs introduced with FF-A version 1.2.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.

core: arm: ffa: add FF-A version 1.2 defines

Add defines for SMC IDs introduced with FF-A version 1.2.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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d17db2af03-Dec-2024 Jens Wiklander <jens.wiklander@linaro.org>

core: arm: ffa: use SMC Calling Convention 1.2

Add struct thread_smc_1_2_regs as a replacement for struct
thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs
covers the registers

core: arm: ffa: use SMC Calling Convention 1.2

Add struct thread_smc_1_2_regs as a replacement for struct
thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs
covers the registers x0-x17 to support passing arguments and results
according to SMC Calling Convention (SMCCC) version 1.2.

The difference is that before this change x8-x17 couldn't be used as
argument nor result and the content was preserved. With this patch are
x8-x17 returned as zeroes. New FF-A SMCs can take and return values in
the full range x0-x17.

64-bit SMCCC version 1.1 and earlier specified x4-x17 as unpredictable
or scratch registers. FF-A has specified x0-x7 as argument and result
registers, regardless of SMCCC. This has changed with SMCCC version 1.2
where the two standards harmonize on this.

struct thread_smc_1_2_regs is added in a 32-bit version for
compatibility, but it only covers r0-r7.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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7d0f479e16-Sep-2024 Jens Wiklander <jens.wiklander@linaro.org>

core: arm: mm: dynamic allocation of v7 translation tables

With CFG_DYN_CONFIG enabled allocate translation tables using the
boot_mem_*() functions. Static allocation from global variables is still

core: arm: mm: dynamic allocation of v7 translation tables

With CFG_DYN_CONFIG enabled allocate translation tables using the
boot_mem_*() functions. Static allocation from global variables is still
used with CFG_DYN_CONFIG disabled.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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a28e4a0f09-Jul-2024 Jens Wiklander <jens.wiklander@linaro.org>

core: arm: mm: dynamic allocation of LPAE translation tables

With CFG_DYN_CONFIG enabled allocate translation tables using the
boot_mem_*() functions. Static allocation from global variables is stil

core: arm: mm: dynamic allocation of LPAE translation tables

With CFG_DYN_CONFIG enabled allocate translation tables using the
boot_mem_*() functions. Static allocation from global variables is still
used with CFG_DYN_CONFIG disabled.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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1871575209-Jul-2024 Jens Wiklander <jens.wiklander@linaro.org>

core: arm: mm: refactor LPAE translation table handling

Refactor translation table handling to use a more flexible layout of the
translation tables in memory. Instead of relying on multidimensional

core: arm: mm: refactor LPAE translation table handling

Refactor translation table handling to use a more flexible layout of the
translation tables in memory. Instead of relying on multidimensional
array use helper functions to calculate the address of each translation
table as needed.

Preparing for future changes, no change in behaviour.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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0799b13716-Sep-2024 Jens Wiklander <jens.wiklander@linaro.org>

core: arm: add boot mem paddings to the heap

Add the paddings added due to requested alignment in boot mem
allocations to the heap.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-b

core: arm: add boot mem paddings to the heap

Add the paddings added due to requested alignment in boot mem
allocations to the heap.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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