| #
55ab8f06 |
| 27-Feb-2024 |
Alvin Chang <alvinga@andestech.com> |
core: Refactor console_init() and introduce plat_console_init()
Since there are some cross-platform console drivers, we let console_init() be common code to have a chance to initialize those console
core: Refactor console_init() and introduce plat_console_init()
Since there are some cross-platform console drivers, we let console_init() be common code to have a chance to initialize those console drivers (e.g., semihosting console).
If the cross-platform console drivers are not configured to be compiled, plat_console_init() will be invoked to initialize platform-specific console driver.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
9afe87e0 |
| 14-Nov-2022 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
riscv: kernel: add console driver for S-Mode using SBI
Implements a generic console driver using legacy SBI extension. This introduces a flag CFG_RISCV_SBI_CONSOLE to decide building the driver or n
riscv: kernel: add console driver for S-Mode using SBI
Implements a generic console driver using legacy SBI extension. This introduces a flag CFG_RISCV_SBI_CONSOLE to decide building the driver or not. This allows using another UART driver instead.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> [jf: set author to be same as Signed-off-by:] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
19bdabb5 |
| 31-Oct-2022 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
riscv: kernel: main.c: implement tee_otp_get_hw_unique_key()
Sets the hardware unique key to zero. To model OTP device, Spike introduce the ability to write plugins in the form of shared object file
riscv: kernel: main.c: implement tee_otp_get_hw_unique_key()
Sets the hardware unique key to zero. To model OTP device, Spike introduce the ability to write plugins in the form of shared object files that allow user-defined Memory-Mapped-I/O behaviors.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
cf63aa77 |
| 31-Dec-2021 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: riscv: plat-spike: console driver based on host-target interface
Spike doesn't yet model a UART but relies on RISC-V Host-Target Interface (HTIF) to perform all I/O. It is a protocol allowing
core: riscv: plat-spike: console driver based on host-target interface
Spike doesn't yet model a UART but relies on RISC-V Host-Target Interface (HTIF) to perform all I/O. It is a protocol allowing the target to access host to perform console, storage etc. It requires special ELF symbols tohost and fromhost. HTIF base address is set to 0x40008000.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> [jf: remove useless line continuation; initialize base to 0] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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