core: arm: boot_init_memtag(): use core_mmu_get_secure_memory()

Use core_mmu_get_secure_memory() to determine the range of memory to
pass to memtag_set_tags().

Signed-off-by: Jens Wiklander <jens.w

core: arm: boot_init_memtag(): use core_mmu_get_secure_memory()

Use core_mmu_get_secure_memory() to determine the range of memory to
pass to memtag_set_tags().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: pass secure memory parameter to virt_init_memory()

Pass the physical secure memory range as a parameter from secure_only[].
This avoids using hard coded defines in virt_init_memory().

CFG_NS_

core: pass secure memory parameter to virt_init_memory()

Pass the physical secure memory range as a parameter from secure_only[].
This avoids using hard coded defines in virt_init_memory().

CFG_NS_VIRTUALIZATION=y depends on secure_only[] to have all memory as
consecutive memory ranges, but that's unchanged behaviour from before
since it was expected that the entire range from TEE_RAM_START to
TA_RAM_START + TA_RAM_SIZE is usable memory.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: arm: boot: use correct base address for relocation

The start of the memory used by OP-TEE core is TEE_LOAD_ADDR. But
relocate() and undo_init_relocation() has until now used TEE_RAM_START
inst

core: arm: boot: use correct base address for relocation

The start of the memory used by OP-TEE core is TEE_LOAD_ADDR. But
relocate() and undo_init_relocation() has until now used TEE_RAM_START
instead which only work when it has the same value as TEE_LOAD_ADDR. So
fix this by using TEE_LOAD_ADDR instead

Fixes: 5966660c02b3 ("core: move relocation to embedded data region")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: remove TEE_RAM_VA_START and TEE_TEXT_VA_START

TEE_RAM_VA_START and TEE_TEXT_VA_START are defined to exactly the same
thing as TEE_RAM_START and TEE_LOAD_ADDR respectively. They don't deal
with

core: remove TEE_RAM_VA_START and TEE_TEXT_VA_START

TEE_RAM_VA_START and TEE_TEXT_VA_START are defined to exactly the same
thing as TEE_RAM_START and TEE_LOAD_ADDR respectively. They don't deal
with virtual addresses as the names suggests, they too represent
physical addresses. So remove TEE_RAM_VA_START and TEE_TEXT_VA_START to
get rid of some redundancy.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: rename load_offset in struct core_mmu_config

Renames the field load_offset in struct core_mmu_config to the more
accurate name map_offset.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro

core: rename load_offset in struct core_mmu_config

Renames the field load_offset in struct core_mmu_config to the more
accurate name map_offset.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: arm: core_mmu_arch.h: remove redundant defines

Removes the redundant defines TEE_RAM_VA_SIZE, TEE_LOAD_ADDR,
TEE_RAM_VA_START, TEE_TEXT_VA_START, and STACK_ALIGNMENT which are
already defined

core: arm: core_mmu_arch.h: remove redundant defines

Removes the redundant defines TEE_RAM_VA_SIZE, TEE_LOAD_ADDR,
TEE_RAM_VA_START, TEE_TEXT_VA_START, and STACK_ALIGNMENT which are
already defined in core_mmu.h.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: replace _fdt_ prefix with fdt_ for device tree API

As per upstream discussion, there is no reason to keep _fdt_ prefix.
Replaces it with fdt_ for all occurrences.

Signed-off-by: Gatien Cheval

core: replace _fdt_ prefix with fdt_ for device tree API

As per upstream discussion, there is no reason to keep _fdt_ prefix.
Replaces it with fdt_ for all occurrences.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: enable CFG_DRIVERS_I2C and CFG_ATMEL_I2C for wlsom1 board

Enable these options to embed the I2C driver when using the wlsom1
board.

Signed-off-by: Clément Léger <clement.leger@bootlin.com

plat-sam: enable CFG_DRIVERS_I2C and CFG_ATMEL_I2C for wlsom1 board

Enable these options to embed the I2C driver when using the wlsom1
board.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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dts: at91: wlsom1_ek1: set i2c0 bus as secure

This bus holds the PMIC which is going to be used by OP-TEE to handle
suspend.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerom

dts: at91: wlsom1_ek1: set i2c0 bus as secure

This bus holds the PMIC which is going to be used by OP-TEE to handle
suspend.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-zynqmp: fixes interrupt controller

Updates GICC_OFFSET to account for the already-offset GIC_BASE.
Additionally initializes the interrupt controller with a pointer
to the interrupt chip.

Signe

plat-zynqmp: fixes interrupt controller

Updates GICC_OFFSET to account for the already-offset GIC_BASE.
Additionally initializes the interrupt controller with a pointer
to the interrupt chip.

Signed-off-by: Zachary Clark <zach.clark@dornerworks.com>
Reviewed-by: Ricardo Salveti <ricardo@foundries.io>

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core: imx: remove duplicate driver_init() call

Remove duplicated call to driver_init().
The previous driver_init() call would only initialize the driver.
The new driver_init() call initializes the d

core: imx: remove duplicate driver_init() call

Remove duplicated call to driver_init().
The previous driver_init() call would only initialize the driver.
The new driver_init() call initializes the driver and its power
management callback.

Fixes: 97eb916803fe ("drivers: imx: tzc380: re-configure TZ380 upon PM resume")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: mm: Fix idx truncation bug

When the idx of TA memory mapping is assigned, it is saved in the
l1_idx_t, which is the uint8_t or uint16_t type. But when it is
parsed, it is saved in uint8_t whic

core: mm: Fix idx truncation bug

When the idx of TA memory mapping is assigned, it is saved in the
l1_idx_t, which is the uint8_t or uint16_t type. But when it is
parsed, it is saved in uint8_t which can cause truncation.
To solve this problem, the idx should be saved in the l1_idx_t
type when parsing the idx.

Signed-off-by: leisen <leisen1@huawei.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
[jf: edit commit description]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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dts: stm32: add OTP index for HUK on stm32mp15 platform

Add the OTP index on stm32mp15 platform to indicate where to find the
previously provisioned HUK.

Signed-off-by: Nicolas Toromanoff <nicolas.

dts: stm32: add OTP index for HUK on stm32mp15 platform

Add the OTP index on stm32mp15 platform to indicate where to find the
previously provisioned HUK.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: Thomas BOURGOIN <thomas.bourgoin@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: stm32mp15_huk: use DT HUK NVMEM layout API

Adds the possibility to get the HUK from OTP definition in the device tree
using the function stm32_bsec_find_otp_in_nvmem_layout().

Signed-off-b

drivers: stm32mp15_huk: use DT HUK NVMEM layout API

Adds the possibility to get the HUK from OTP definition in the device tree
using the function stm32_bsec_find_otp_in_nvmem_layout().

Signed-off-by: Thomas BOURGOIN <thomas.bourgoin@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: ffa: Allow multiple SPs with same UUID

The FF-A spec allows multiple SPs to have the same UUID. This makes
it possible to use the FF-A UUID as a identifier for the protocol on
top of the FF-A

core: ffa: Allow multiple SPs with same UUID

The FF-A spec allows multiple SPs to have the same UUID. This makes
it possible to use the FF-A UUID as a identifier for the protocol on
top of the FF-A layer.
To achieve this we have to make sure that the FFA_PARTITION_INFO_GET can
return more then one endpoint id if we pass a UUID.
To make sure that there is no collision between the SP binaries names,
we distinguish between the FF-A UUID and the SP UUID. The SP UUID is used
to identify the SP itself. While the FF-A UUID is used as part of the
FF-A protocol.

Signed-off-by: Jelle Sels <jelle.sels@arm.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: imx_ele: add ELE driver

Add EdgeLock Enclave (or ELE) driver support.
ELE is a built-in security subsystem available on imx8ulp and imx93
providing security features to the Cortex-A.

Signe

drivers: imx_ele: add ELE driver

Add EdgeLock Enclave (or ELE) driver support.
ELE is a built-in security subsystem available on imx8ulp and imx93
providing security features to the Cortex-A.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: imx_mu: add MU base address and size for imx93

Add definition of MU_BASE and MU_SIZE for imx93.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.fori

drivers: imx_mu: add MU base address and size for imx93

Add definition of MU_BASE and MU_SIZE for imx93.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: imx_mu: add MU base address and size for imx8ulp

Add definition of MU_BASE and MU_SIZE for imx8ulp.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.

drivers: imx_mu: add MU base address and size for imx8ulp

Add definition of MU_BASE and MU_SIZE for imx8ulp.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: imx_mu: add support for imx93

Add MU support for imx93.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carr

drivers: imx_mu: add support for imx93

Add MU support for imx93.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: spmc: move FIP SP deinit call

Move the FIP SP deinit call to before starting the SPs. This change does
not affect functionality, it's just to make the SP packages' lifetime
clearer in the code

core: spmc: move FIP SP deinit call

Move the FIP SP deinit call to before starting the SPs. This change does
not affect functionality, it's just to make the SP packages' lifetime
clearer in the code.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>

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core: spmc: fix FIP SP loading

The memory management in process_sp_pkg() function contains errors. It
tries to add new mappings for the SP packages that reside in the TA_RAM
PA range, but this range

core: spmc: fix FIP SP loading

The memory management in process_sp_pkg() function contains errors. It
tries to add new mappings for the SP packages that reside in the TA_RAM
PA range, but this range is already mapped so this is unnecessary and
wrong. Fix the code by simply using phys_to_virt() instead.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>

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core: arm64: SHAKE128 using ARMv8.2-A cryptographic extensions

Adds support for SHAKE128 or SHA3-128 sized blocks in
sha3_ce_transform().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
A

core: arm64: SHAKE128 using ARMv8.2-A cryptographic extensions

Adds support for SHAKE128 or SHA3-128 sized blocks in
sha3_ce_transform().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: arm64: SHA-3 using ARMv8.2-A cryptographic extensions

Import SHA-3 assembly code from the Linux kernel (Linaro contribution).
Enabled with CFG_CRYPTO_SHA3_ARM_CE=y, set by default if
CFG_CRYPT

core: arm64: SHA-3 using ARMv8.2-A cryptographic extensions

Import SHA-3 assembly code from the Linux kernel (Linaro contribution).
Enabled with CFG_CRYPTO_SHA3_ARM_CE=y, set by default if
CFG_CRYPTO_WITH_CE82=y.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: arm64: SM4 CE optimization for ARMv8.2

Enabled with CFG_CRYPTO_SM4_ARM_CE=y, set by default if
CFG_CRYPTO_WITH_CE82=y.

Signed-off-by: Xu Yizhou <xuyizhou1@huawei.com>
Acked-by: Tianjia Zhang

core: arm64: SM4 CE optimization for ARMv8.2

Enabled with CFG_CRYPTO_SM4_ARM_CE=y, set by default if
CFG_CRYPTO_WITH_CE82=y.

Signed-off-by: Xu Yizhou <xuyizhou1@huawei.com>
Acked-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: arm64: SM4-AESE optimization for ARMv8

Enabled with CFG_CRYPTO_SM4_ARM_AESE=y, set by default if
CFG_CRYPTO_WITH_CE=y.

Signed-off-by: Xu Yizhou <xuyizhou1@huawei.com>
Acked-by: Tianjia Zhang

core: arm64: SM4-AESE optimization for ARMv8

Enabled with CFG_CRYPTO_SM4_ARM_AESE=y, set by default if
CFG_CRYPTO_WITH_CE=y.

Signed-off-by: Xu Yizhou <xuyizhou1@huawei.com>
Acked-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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