plat-imx: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand

plat-imx: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-ls: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand

plat-ls: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-mediatek: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal

plat-mediatek: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-ti: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand

plat-ti: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-hikey: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Bra

plat-hikey: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-sunxi: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Bra

plat-sunxi: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal

plat-vexpress: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: bugfix teecore_init_*_ram()

Fixes confusion of virtual and physical addresses in
teecore_init_ta_ram() and teecore_init_pub_ram().

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

core: bugfix teecore_init_*_ram()

Fixes confusion of virtual and physical addresses in
teecore_init_ta_ram() and teecore_init_pub_ram().

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: bugfix address translation for user TA entry

Bugfixes address translation for user TA stack pointer and pointer
to parameters.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Revi

core: bugfix address translation for user TA entry

Bugfixes address translation for user TA stack pointer and pointer
to parameters.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove kmap interface

Removes kmap interface as the secure DDR memory is mapped already.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@li

core: remove kmap interface

Removes kmap interface as the secure DDR memory is mapped already.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: lpae workaround for user mapping

User mapping for LPAE depends on not using the first entry in the top
translation table. This workaround makes sure that the first entry never
is used.

Review

core: lpae workaround for user mapping

User mapping for LPAE depends on not using the first entry in the top
translation table. This workaround makes sure that the first entry never
is used.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: bugfix mapping of console uart

Bugfixes mapping of console uart to use secure device instead of
non-secure device type.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Re

plat-vexpress: bugfix mapping of console uart

Bugfixes mapping of console uart to use secure device instead of
non-secure device type.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-sunxi: refactor memory configuration

Refactors memory configuration to use the same memory configuration
scheme as all the other platforms.

Reviewed-by: Jerome Forissier <jerome.forissier@lina

plat-sunxi: refactor memory configuration

Refactors memory configuration to use the same memory configuration
scheme as all the other platforms.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: DEVICE{4-6} entries to bootcfg_memory_map[]

Adds entries to bootcfg_memory_map[] for DEVICE4, DEVICE5, and DEVICE6
ranges.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens

core: DEVICE{4-6} entries to bootcfg_memory_map[]

Adds entries to bootcfg_memory_map[] for DEVICE4, DEVICE5, and DEVICE6
ranges.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: move tee_ta_manager.c out of arch/arm

Moves most parts of tee_ta_manager.c into core/kernel, keeping only
tee_ta_verify_param() in the original file as it uses architecture
specific checks.

R

core: move tee_ta_manager.c out of arch/arm

Moves most parts of tee_ta_manager.c into core/kernel, keeping only
tee_ta_verify_param() in the original file as it uses architecture
specific checks.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add interrupt framework

Adds interrupt frameworks and adjusts gic driver to fit in.

Update plat-vexpress and sunxi platforms to initialize gic with slightly
modified interface.

Reviewed-by:

core: add interrupt framework

Adds interrupt frameworks and adjusts gic driver to fit in.

Update plat-vexpress and sunxi platforms to initialize gic with slightly
modified interface.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Delete core/arch/arm/tee/tee_rpmb.c and core/include/tee/tee_rpmb.h

Move code into tee_rpmb_fs_common.c.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pas

Delete core/arch/arm/tee/tee_rpmb.c and core/include/tee/tee_rpmb.h

Move code into tee_rpmb_fs_common.c.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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Delete core/arch/arm/tee/arch_tee_fs.c

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.

Delete core/arch/arm/tee/arch_tee_fs.c

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: bugfix static TA buffer from user TA

Before this patch the checks of the parameters buffers for a TA where
required to be physical pointers. When a static TA is invoked from a
user TA the virt

core: bugfix static TA buffer from user TA

Before this patch the checks of the parameters buffers for a TA where
required to be physical pointers. When a static TA is invoked from a
user TA the virtual addresses of the buffers aren't translated to
physical addresses as they will be translated back to the same virtual
address again. With this patch the parameters buffers are tagged as
containing virtual addresses allowing the checks to take that into
account.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: map TA with strict permissions

Maps user TA with strict permissions. Blocks with mixed permissions are
mapped with the union of the permissions. In order to take full
advantage of the strict p

core: map TA with strict permissions

Maps user TA with strict permissions. Blocks with mixed permissions are
mapped with the union of the permissions. In order to take full
advantage of the strict permissions TAs should be mapped using small
pages, that is, using the config option CFG_SMALL_PAGE_USER_TA = y.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, Juno)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: imx: fix console address usage

The phyiscal base address of uart console is 0x2020000.
This address conflicts with KMAP address space, so remap it
to 0x4020000.

Signed-off-by: Peng Fan <

core: arm: imx: fix console address usage

The phyiscal base address of uart console is 0x2020000.
This address conflicts with KMAP address space, so remap it
to 0x4020000.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: add cpu_mmu_enabled

Add cpu_mmu_enabled to check mmu enabled or not.
Before mmu, we may use physical address. And after
mmu enabled, we need to use virtual address.

Signed-off-by: Peng F

core: arm: add cpu_mmu_enabled

Add cpu_mmu_enabled to check mmu enabled or not.
Before mmu, we may use physical address. And after
mmu enabled, we need to use virtual address.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: set region_size of map_area dynamically

This patch is to set value to region_size of map_area.

In generic_core_bootcfg.c, there is one place that setting region_size
with CFG_WITH_PAGER

core: arm: set region_size of map_area dynamically

This patch is to set value to region_size of map_area.

In generic_core_bootcfg.c, there is one place that setting region_size
with CFG_WITH_PAGER defined. This means the region_size entry will be
initialized to 0 or 4K with CFG_WITH_PAGER. Also there is no other places
that will write the region_size entry.
However map_pa2va will use map_area->region_size to
calculate the virtual/physical address. So we need to set region_size of
map_area.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: mm: introduce initial value for va

To some SoCs, we can not directly assign physical address
to virtual address. If use LPAE, it is ok to use "va = pa", but
to V7 mmu with LPAE disabled,

core: arm: mm: introduce initial value for va

To some SoCs, we can not directly assign physical address
to virtual address. If use LPAE, it is ok to use "va = pa", but
to V7 mmu with LPAE disabled, va may conflict with user ta and optee
os kernel space address(<= 64M).

1. Introuce a few macros DEVICEx_VA_ADDRESS.
2. Since we have used defined va, we can not directly panic() with
mm->va initialized. If va is not page or section aligned, then panic,
otherwise, all is ok.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: mm: v7: use mm->va to locate the entry of ttb

Use mm->va to locate the entry of ttb, we should not use
mm->pa, because va may be not the same with pa.

Signed-off-by: Peng Fan <van.freeni

core: arm: mm: v7: use mm->va to locate the entry of ttb

Use mm->va to locate the entry of ttb, we should not use
mm->pa, because va may be not the same with pa.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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