| 1cb254df | 17-Feb-2017 |
Etienne Carriere <etienne.carriere@st.com> |
core: allow pseudo TA to not define some handlers
Pseudo TAs that do not need to handle creation, destruction, session opening and closure do not need to define a handler for that.
Update pseudo TA
core: allow pseudo TA to not define some handlers
Pseudo TAs that do not need to handle creation, destruction, session opening and closure do not need to define a handler for that.
Update pseudo TAs where such handlers at not really useful. Keep the handlers for the selftest pseudo TA for its traces.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 6fded82e | 17-Feb-2017 |
Etienne Carriere <etienne.carriere@st.com> |
core: allow pseudo TAs to define properties
Before this change, pseudo TAs only supported the multi-session property. This change allows pseudo TAs to define their expected properties.
This change
core: allow pseudo TAs to define properties
Before this change, pseudo TAs only supported the multi-session property. This change allows pseudo TAs to define their expected properties.
This change will be required for the secure data path (SDP) support. It allows a TA to be invoked with parameters referring to SDP memory buffers.
During core init, the pseudo TA support verifies that all registered pseudo TAs conforms with some It allows core to nicely panic if a pseudo TA was badly declared, including UUID overlapping between pseudo TAs.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 4d168941 | 19-Oct-2016 |
Andrew F. Davis <afd@ti.com> |
drivers: Add TRNG driver for DRA7
Add driver for the True Random Number Generator (TRNG) available on DRA7xx platforms.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Joakim Bech <joakim.
drivers: Add TRNG driver for DRA7
Add driver for the True Random Number Generator (TRNG) available on DRA7xx platforms.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 70aa17b8 | 14-Feb-2017 |
Zhizhou Zhang <zhizhouzhang@asrmicro.com> |
core: mm: fix map_pa2va()'s bad behavior
map->region_size is `unsigned'. In 64-bit machine, ~((vaddr_t)map->region_size - 1)) will discard high 32-bit. results wrong va value.
Signed-off-by: Zhizho
core: mm: fix map_pa2va()'s bad behavior
map->region_size is `unsigned'. In 64-bit machine, ~((vaddr_t)map->region_size - 1)) will discard high 32-bit. results wrong va value.
Signed-off-by: Zhizhou Zhang <zhizhouzhang@asrmicro.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 09eb522b | 14-Feb-2017 |
Zhizhou Zhang <zhizhouzhang@asrmicro.com> |
core: arm64: make exception vector 11-bit aligned
bit 0 to bit 10 in VBAR_EL1 is RES0. We should not rely on RES0 values.
Signed-off-by: Zhizhou Zhang <zhizhouzhang@asrmicro.com> Reviewed-by: Jens
core: arm64: make exception vector 11-bit aligned
bit 0 to bit 10 in VBAR_EL1 is RES0. We should not rely on RES0 values.
Signed-off-by: Zhizhou Zhang <zhizhouzhang@asrmicro.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b36e639b | 14-Feb-2017 |
Zhizhou Zhang <zhizhouzhang@asrmicro.com> |
core: don't assume VA address size to 32-bit
For some board's PA may larger than 32-bit, in order to create identity memory mapping, we should enlarge TCR.T0SZ. Rename ADDR_SPACE_SIZE to CFG_LPAE_AD
core: don't assume VA address size to 32-bit
For some board's PA may larger than 32-bit, in order to create identity memory mapping, we should enlarge TCR.T0SZ. Rename ADDR_SPACE_SIZE to CFG_LPAE_ADDR_SPACE_SIZE, and move the config entry to core/arch/arm/arm.mk.
Signed-off-by: Zhizhou Zhang <zhizhouzhang@asrmicro.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 1bb90947 | 11-Feb-2017 |
Sunny Kuo <sunnychingk@gmail.com> |
core: fix phys_to_virt() in thread_std_smc_entry()
enum tee_core_memtypes (MEM_AREA_NSEC_SHM) is required by phys_to_virt(), rather than enum buf_is_attr (CORE_MEM_NSEC_SHM)
Signed-off-by: Sunny Ku
core: fix phys_to_virt() in thread_std_smc_entry()
enum tee_core_memtypes (MEM_AREA_NSEC_SHM) is required by phys_to_virt(), rather than enum buf_is_attr (CORE_MEM_NSEC_SHM)
Signed-off-by: Sunny Kuo <sunnychingk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> [jf: update commit message with exact function/type names] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 42fb5b2e | 13-Feb-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
rename 'static TA' into 'pseudo TA'
This renaming prevents confusion of what is a static TA: static TAs are NOT Trusted Application operating at OP-TEE core privilege execution level. There are rath
rename 'static TA' into 'pseudo TA'
This renaming prevents confusion of what is a static TA: static TAs are NOT Trusted Application operating at OP-TEE core privilege execution level. There are rather OP-TEE core services that offer an invocation API based on GP TEE specified invocation API: open session, invoke command and close session.
This change renames all 'static TA' references into 'pseudo TA' references.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d6adcd2b | 08-Feb-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: do not assume GNU awk is available
The rshift(), strtonum() and and() functions are GNU extensions to awk. Therefore, the build will fail if another variant of awk is installed on the build sy
core: do not assume GNU awk is available
The rshift(), strtonum() and and() functions are GNU extensions to awk. Therefore, the build will fail if another variant of awk is installed on the build system. Replace the awk calls with bash arithmetic to avoid any issues. We know we can rely on the shell being bash, since the main Makefile has SHELL = /bin/bash.
Fixes: aa4cc147a462 ("core: fix build error with large tee-init_load_addr") Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 91f6d5a7 | 08-Feb-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: pager: bugfix linking
Fixes problem when linking and mobj_phys_get_pa() and mobj_mm_get_pa() ends up in the paged region instead of the unpaged as expected. Unfortunately the KEEP_PAGER()
core: arm: pager: bugfix linking
Fixes problem when linking and mobj_phys_get_pa() and mobj_mm_get_pa() ends up in the paged region instead of the unpaged as expected. Unfortunately the KEEP_PAGER() macro used iwth these functions when compiling for AArch64 triggers an assert in the linker so it has to be guarded with #ifndef ARM64.
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey, pager, GP) Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (qemu_virt, b2260, pager, GP) Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5465e89f | 08-Feb-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: bugfix flush_ctx_range_from_list()
Fixes missing NULL check in flush_ctx_range_from_list() needed when the entire pgt list is emptied.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.o
core: bugfix flush_ctx_range_from_list()
Fixes missing NULL check in flush_ctx_range_from_list() needed when the entire pgt list is emptied.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| db28cbeb | 07-Feb-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: bugfix tee_pager_rem_uta_region()
Prior to this patch tee_pager_rem_uta_region() just removed a matching area without proper unregistration. This patch fixes that by looking up all physical pa
core: bugfix tee_pager_rem_uta_region()
Prior to this patch tee_pager_rem_uta_region() just removed a matching area without proper unregistration. This patch fixes that by looking up all physical pages that may use the area and frees the page.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e9914d58 | 07-Feb-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: bugfix tee_mmu_rem_rwmem()
Prior to this patch tee_mmu_rem_rwmem() checked that the size of the supplied mobj matches the size of the region entry. Since a mobj may have any size and region en
core: bugfix tee_mmu_rem_rwmem()
Prior to this patch tee_mmu_rem_rwmem() checked that the size of the supplied mobj matches the size of the region entry. Since a mobj may have any size and region entries always are page or page directory sized, region entries that should have been removed were not. This patch fixes that by only checking that mobj and va matches the region entry.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| aa4cc147 | 06-Feb-2017 |
Zhizhou Zhang <zhizhouzhang@asrmicro.com> |
core: fix build error with large tee-init_load_addr
If tee-init_load_addr is higher than 0xffffffff. building failed with:
Traceback (most recent call last): File "./scripts/gen_hashed_bin.py", l
core: fix build error with large tee-init_load_addr
If tee-init_load_addr is higher than 0xffffffff. building failed with:
Traceback (most recent call last): File "./scripts/gen_hashed_bin.py", line 148, in <module> main() File "./scripts/gen_hashed_bin.py", line 132, in main write_header(outf, 0, args, 0) File "./scripts/gen_hashed_bin.py", line 44, in write_header args.init_mem_usage, paged_size)) struct.error: 'I' format requires 0 <= number <= 4294967295 make: *** [out/arm-plat-vexpress/core/tee.bin] Error 1 make: Leaving directory `/home/zh/work/github/optee_os'
Signed-off-by: Zhizhou Zhang <zhizhouzhang@asrmicro.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 883c4be3 | 13-Oct-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
Add support for user TA profiling with gprof (-pg)
Adds the infrastructure to collect profiling information from Trusted Applications running in user mode and instrumented with -pg. Enable with: CFG
Add support for user TA profiling with gprof (-pg)
Adds the infrastructure to collect profiling information from Trusted Applications running in user mode and instrumented with -pg. Enable with: CFG_TA_GPROF_SUPPORT=y.
Profiling support in itself adds no significant performance overhead. Instrumented applications however may run 1.3x - 2x slower, and have a larger .bss section (+1.36 times .text size for 32-bit TAs, +1.77 times .text size for 64-bit ones).
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (D02 64-bit) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU 32-bit) Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| add06171 | 26-Oct-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
Move definitions from optee_msg.h to optee_msg_supplicant.h
Commands that are specific to tee-supplicant belong in their own file. This allows optee_msg.h to remain untouched as more supplicant comm
Move definitions from optee_msg.h to optee_msg_supplicant.h
Commands that are specific to tee-supplicant belong in their own file. This allows optee_msg.h to remain untouched as more supplicant commands are added. With this change: - optee_msg.h is used by the driver and OP-TEE OS (note: there are two slightly different versions of the file adapted to each environment but they define the same things) - optee_msg_supplicant.h is used by OP-TEE OS and tee-supplicant
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| acc10c43 | 08-Dec-2016 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove tee_dispatch_* functions
Prior to this patch the tee_dispatch_* functions where called when invoking TAs from normal world.
The tee_dipatch_* functions provided little value and has no
core: remove tee_dispatch_* functions
Prior to this patch the tee_dispatch_* functions where called when invoking TAs from normal world.
The tee_dipatch_* functions provided little value and has now been collapsed into the architecture specific entry_std.c reducing the stack usage.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 47181b4d | 23-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: generic_entry: fix copy_init assembly warning
Fixes assembly warning: Warning: duplicated register (r13) in register list in the copy_init loop used when pager is enabled.
Reviewed-by: Etienn
core: generic_entry: fix copy_init assembly warning
Fixes assembly warning: Warning: duplicated register (r13) in register list in the copy_init loop used when pager is enabled.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 538240bc | 23-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: fix warning with CFG_PAGED_USER_TA=n
Fixes warning when using pager with CFG_PAGED_USER_TA=n.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander
core: pager: fix warning with CFG_PAGED_USER_TA=n
Fixes warning when using pager with CFG_PAGED_USER_TA=n.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 97f9e0dd | 08-Dec-2016 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: optimize cache handling in load_elf_segments()
Prior to this patch the entire TA code was dcache cleaned and icache invalided resulting in many unneeded paged faults when the pager is enabled.
core: optimize cache handling in load_elf_segments()
Prior to this patch the entire TA code was dcache cleaned and icache invalided resulting in many unneeded paged faults when the pager is enabled.
With this patch the pager is taken into account. When pager is enabled only clean dcache and invalide icache for mapped pages.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (HiKey) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 0cad9723 | 19-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove obsolete mobj_is_unsafe()
Removes obsolete mobj_is_unsafe(). As a consequence some tee_ta_manager code can be removed too.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> T
core: remove obsolete mobj_is_unsafe()
Removes obsolete mobj_is_unsafe(). As a consequence some tee_ta_manager code can be removed too.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 33be6f32 | 20-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: static ta: bugfix copy_in_param()
Prior to this patch copy_in_param() for static TA mistook the size of the mobj as the size of the parameter. This patches fixes that.
Fixes: 0dcfa5686d02 ("c
core: static ta: bugfix copy_in_param()
Prior to this patch copy_in_param() for static TA mistook the size of the mobj as the size of the parameter. This patches fixes that.
Fixes: 0dcfa5686d02 ("core: introduce MOBJ abstraction") Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3958b8b2 | 20-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: bugfix mobj_virt
Prior to this patch is mobj_virt using mobj_phys_ops instead of the expected mobj_virt_ops. This patch fixes mobj_virt to use mobj_virt_ops.
Fixes: 0dcfa5686d02 ("core: intro
core: bugfix mobj_virt
Prior to this patch is mobj_virt using mobj_phys_ops instead of the expected mobj_virt_ops. This patch fixes mobj_virt to use mobj_virt_ops.
Fixes: 0dcfa5686d02 ("core: introduce MOBJ abstraction") Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d8555bdd | 19-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add paged secure shared memory
Adds feature to allocate paged secure memory that can be transferred between TAs as needed.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by
core: add paged secure shared memory
Adds feature to allocate paged secure memory that can be transferred between TAs as needed.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by Volodymyr Babchuk <vlad.babchuk@gmail.com> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, Hikey) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6dbcd9dd | 19-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: use mobj for user mappings
Replaces the old mm and mm_stack elements with mobj_code and mobj_stack in user context.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by Vol
core: use mobj for user mappings
Replaces the old mm and mm_stack elements with mobj_code and mobj_stack in user context.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by Volodymyr Babchuk <vlad.babchuk@gmail.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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