stm32mp1: embed GPIO/pin control driver

Platform provides resources expected by the GPIO driver: those deal
with the relationship between platform GPIO banks identifiers and
the bank resources (base

stm32mp1: embed GPIO/pin control driver

Platform provides resources expected by the GPIO driver: those deal
with the relationship between platform GPIO banks identifiers and
the bank resources (base address, clock).

Platform maps all non-secure GPIOs as secure world may use non-secure
interfaces, i.e a non-secure UART console.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32mp1: platform enables STM32 ETZPC driver

Platform defines the macro used for DECPROT IDs in the STM32 ETZPC
driver interface.

When platform embeds a secure DTB, it is used to initialize the ET

stm32mp1: platform enables STM32 ETZPC driver

Platform defines the macro used for DECPROT IDs in the STM32 ETZPC
driver interface.

When platform embeds a secure DTB, it is used to initialize the ETZPC
driver. When not using DT, platform shall call ETZPC initialization
API function.

Platform initialization loads a static configuration for the platform
resources statically assigned to either secure or non-secure worlds.

This change updates the stm32mp157c SoC description DT source file
to explicitly enable ETZPC support in the secure world.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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stm32mp1: get root clocks frequency from DTB

Get the frequency of the root oscillator clocks from
a secure device tree, that is the embedded DTB.

Secure status state in the DTB defines whether RCC

stm32mp1: get root clocks frequency from DTB

Get the frequency of the root oscillator clocks from
a secure device tree, that is the embedded DTB.

Secure status state in the DTB defines whether RCC
subsystem shall be secure or not. If not, non-secure
world can access all clock interfaces hence secure world
cannot guaranty its configuration. Yet, the DT allows
such a debug/test configuration.

Most clock tree configuration is under the responsibility
of an earlier boot stage. Configuration of parenthood
and related divisors as well as configuration of
intermediate PLLs found in the DT are ignored.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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stm32mp1: platform clocks driver

Introduce the stm32mp1 clock driver. This change defines the
structures used to describe the clock tree and the driver main API
functions:
- stm32_clock_enable()
- s

stm32mp1: platform clocks driver

Introduce the stm32mp1 clock driver. This change defines the
structures used to describe the clock tree and the driver main API
functions:
- stm32_clock_enable()
- stm32_clock_disable()
- stm32_clock_is_enabled()
- stm32_clock_get_rate()

The API is exported from stm32_util.h. Drivers are expected to include
stm32_util.h to access the platform clock support.

Note stm32_clock_get_rate() needs the root oscillator frequency values
Oscillators frequency depend on the board a.k.a the platform.
This information is currently missing in the driver. Introducing
CFG_xxx build directives it not the preferred way which is the DTB.
This change does not read root oscillators frequency value from the DTB.

Map RCC interface registers from RCC_BASE. RCC is the interface for
SoC clock configuration and control.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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stm32mp1: update RCC driver

Add and refine some RCC register descriptions.
Remove declaration of stm32_rcc_secure(), not used.
Implement stm32_rcc_is_secure() and stm32_rcc_is_mckprot(). These
refle

stm32mp1: update RCC driver

Add and refine some RCC register descriptions.
Remove declaration of stm32_rcc_secure(), not used.
Implement stm32_rcc_is_secure() and stm32_rcc_is_mckprot(). These
reflect 2 security hardening states of the RCC in the SoC.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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Remove memalign()

Removes the unused memalign() function. Usage of this function will
cause severe fragmentation of the heap.

Another problem is with the implementation which is added on top of bge

Remove memalign()

Removes the unused memalign() function. Usage of this function will
cause severe fragmentation of the heap.

Another problem is with the implementation which is added on top of bget
while still depending heavily on internals of bget. The implementation was
somewhat buggy since it can sometimes can cause:
E/TC:0 0 assertion 'bn->prevfree == 0' failed at lib/libutils/isoc/bget_malloc.c
:423 <create_free_block>
E/TC:0 0 Panic at core/kernel/assert.c:28 <_assert_break>

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32mp1: PWR support

PWR is a memory mapped SoC interface for power control. This change
maps and defines the interface for the stm32mp1 platform.

Signed-off-by: Etienne Carriere <etienne.carriere

stm32mp1: PWR support

PWR is a memory mapped SoC interface for power control. This change
maps and defines the interface for the stm32mp1 platform.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: pseudo_ta: fix query buffer size for SDP

Accepts query buffer size when invoking pseudo TAs with
CFG_SECURE_DATA_PATH=y.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by

core: pseudo_ta: fix query buffer size for SDP

Accepts query buffer size when invoking pseudo TAs with
CFG_SECURE_DATA_PATH=y.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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entry_fast: enable hypervisor calls

There are two fast SMC calls from hypervisor:

OPTEE_SMC_VM_CREATED is called during virtual guest creation. Only
after successful return hypervisor should forwar

entry_fast: enable hypervisor calls

There are two fast SMC calls from hypervisor:

OPTEE_SMC_VM_CREATED is called during virtual guest creation. Only
after successful return hypervisor should forward any SMC calls from
guest to OP-TEE.

OPTEE_SMC_VM_DESTROYED is called during VM destruction. Hypervisor
should ensure that all virtual CPUs are stopped. This will ensure, that
there are no active threads from destroyed VM in OP-TEE.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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generic_boot: add virtualization support

Don't create boot thread and don't initialize TEE runtime
if virtualization is enabled. This will be done by virtualization
framework for each virtual guest

generic_boot: add virtualization support

Don't create boot thread and don't initialize TEE runtime
if virtualization is enabled. This will be done by virtualization
framework for each virtual guest separately.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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generic_boot: move all runtime initialization to init_tee_runtime()

This one function can be called in init_primary_helper() in default
configuration or by virtualization framework for each virtual

generic_boot: move all runtime initialization to init_tee_runtime()

This one function can be called in init_primary_helper() in default
configuration or by virtualization framework for each virtual guest
separately if virtualization is enabled.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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generic_boot: use nexus allocator during memory discovery

If virtualization support is enabled, malloc memory pool is not initialized
at this stage. When virtualization is disabled, nex_malloc and n

generic_boot: use nexus allocator during memory discovery

If virtualization support is enabled, malloc memory pool is not initialized
at this stage. When virtualization is disabled, nex_malloc and nex_calloc
are aliases for malloc/calloc so no problem will be there.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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threads: add support for virtualization

If virtualization is enabled, we need do configure right context
upon entry from SMCs. Also we need to switch back to default context
when leaving OP-TEE.

Si

threads: add support for virtualization

If virtualization is enabled, we need do configure right context
upon entry from SMCs. Also we need to switch back to default context
when leaving OP-TEE.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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tee_mmu: read TA memory ranges from virtualization subsystem

Virtualization subsystem maintains different TA memory ranges
for every virtual guest. So, if virtualization support is enabled,
tee_mmu

tee_mmu: read TA memory ranges from virtualization subsystem

Virtualization subsystem maintains different TA memory ranges
for every virtual guest. So, if virtualization support is enabled,
tee_mmu should get memory configuration there.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_mmu_lpae: increase number of xlat tables for virtualization

Because of different memory layout, we need more page tables when
virtualization support is enabled.

Signed-off-by: Volodymyr Babchu

core_mmu_lpae: increase number of xlat tables for virtualization

Because of different memory layout, we need more page tables when
virtualization support is enabled.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_mmu: reshape memory layout for virtualization

If CFG_VIRTUALIZATION is enabled, then initial memory layout does not need
TA_RAM, TEE sections (.bss and .data) but it needs core sections
(.nex_b

core_mmu: reshape memory layout for virtualization

If CFG_VIRTUALIZATION is enabled, then initial memory layout does not need
TA_RAM, TEE sections (.bss and .data) but it needs core sections
(.nex_bss and .nex_data) mapped.
.data section should be mapped as RO, so it can serve as a template for
virtual guests .data sections.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_mmu: add core_mmu_init_virtualization() function

This function will be called at OP-TEE initialization to
configure memory subsystem of virtualization framework.

Signed-off-by: Volodymyr Babch

core_mmu: add core_mmu_init_virtualization() function

This function will be called at OP-TEE initialization to
configure memory subsystem of virtualization framework.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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virt: add virtualization subsystem

This patch adds virtualization framework to OP-TEE.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

core_mmu: add get_memory_map() function

When virtualization is enabled, there is separate memory map
for every virtual guest.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by:

core_mmu: add get_memory_map() function

When virtualization is enabled, there is separate memory map
for every virtual guest.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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thread: move threads initialization to one place

Virtualization subsystem will initialize threads every time new
guest context is created, so it is good to have whole thread
initialization in one fu

thread: move threads initialization to one place

Virtualization subsystem will initialize threads every time new
guest context is created, so it is good to have whole thread
initialization in one function.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_mmu: introduce mmu partitions

For virtualization support we need to have multiple mmu partitions.
One partition per virtual machine. Partition holds information about
page tables, ASID, etc. Wh

core_mmu: introduce mmu partitions

For virtualization support we need to have multiple mmu partitions.
One partition per virtual machine. Partition holds information about
page tables, ASID, etc. When OP-TEE switches to another partition,
it effectivelly changes how it sees memory. In this way it is possible
to have multiple memory layouts with different shared buffers and TAs
mapped, even with different .bss and .data sections.

If virtualization is disabled, then only one, default partition exists
and it is impossible to allocate more.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_mmu: add MEM_AREA_SEC_RAM_OVERALL memory type

This memory type describes mapping that covers all secure memory
as a flat mapping, so it is possible to access any portion of
secure memory at any

core_mmu: add MEM_AREA_SEC_RAM_OVERALL memory type

This memory type describes mapping that covers all secure memory
as a flat mapping, so it is possible to access any portion of
secure memory at any time.

It will be used with virtualization extensions.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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tee_mm: add TEE_MM_POOL_NEX_MALLOC flag

This flag tells tee_mm to use nex_malloc pool instead of default malloc

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander

tee_mm: add TEE_MM_POOL_NEX_MALLOC flag

This flag tells tee_mm to use nex_malloc pool instead of default malloc

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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virt: tag variables with __nex_data and __nex_bss

Variables that are needed by OP-TEE nexus will be moved
to nexus memory.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Acked-by: Jens W

virt: tag variables with __nex_data and __nex_bss

Variables that are needed by OP-TEE nexus will be moved
to nexus memory.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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virt: add nexus memory area

This patch is the first in series of patches that split OP-TEE RW memory
into two regions: nexus memory and TEE memory. Nexus memory will
be always mapped and it will be

virt: add nexus memory area

This patch is the first in series of patches that split OP-TEE RW memory
into two regions: nexus memory and TEE memory. Nexus memory will
be always mapped and it will be used to store all data that is
vital for OP-TEE core and is not bound to virtual guests.

TEE memory is a memory that holds data specific for certain guest.
There will be TEE memory bank for every guest and it will be mapped
into OP-TEE address space only during call from that guest.

This patch adds nexus memory and moves stacks into it. Also
it provides __nex_bss and __nex_data macros, so one can easily set right
section for a variable.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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