| 1f2e5a0d | 22-Feb-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
plat-stm32mp1: conf: default enable PKA
Default enable PKA compilation. Enable the STM32_CRYPTO_DRIVERS if PKA is compiled.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by:
plat-stm32mp1: conf: default enable PKA
Default enable PKA compilation. Enable the STM32_CRYPTO_DRIVERS if PKA is compiled.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 4ccca7d0 | 27-Sep-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dts: stm32: add PKA dependency on RNG clock for stm32mp13
Adds missing RNG clock resource in PKA nodes in stm32mp13 SoC DTSI files.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Si
dts: stm32: add PKA dependency on RNG clock for stm32mp13
Adds missing RNG clock resource in PKA nodes in stm32mp13 SoC DTSI files.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 8ea6cdca | 20-Nov-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
dts: stm32: fix compatible name of PKA peripheral
Use st,stm32mp13-pka instead of st,stm32mp13-pka64 to be aligned with all other STMicroelectronics compatibles.
Signed-off-by: Thomas Bourgoin <tho
dts: stm32: fix compatible name of PKA peripheral
Use st,stm32mp13-pka instead of st,stm32mp13-pka64 to be aligned with all other STMicroelectronics compatibles.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| ded20780 | 23-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_i2c: use compatible st,stm32mp15-i2c-non-secure
Change STM32 I2C driver to rely on the compatible DT property of the node to store whether the bus is expected assigned to secure or no
drivers: stm32_i2c: use compatible st,stm32mp15-i2c-non-secure
Change STM32 I2C driver to rely on the compatible DT property of the node to store whether the bus is expected assigned to secure or non-secure world. Using a non-secure I2C bus in OP-TEE on stm32mp1 platforms is something expected only on STM32MP15 variant for compatibility with platform already supported in upstream Linux/U-Boot components, as defined by st,stm32mp15-i2c-non-secure specific compatible string ID.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 234a510d | 09-Dec-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dts: stm32: stm32mp15 DH board uses non-secure I2C4 bus
Update stm32mp15 based DH boards DTS file to explicitly use non-secure I2C4 bus as set in the ETZPC node st,decprot property.
Signed-off-by:
dts: stm32: stm32mp15 DH board uses non-secure I2C4 bus
Update stm32mp15 based DH boards DTS file to explicitly use non-secure I2C4 bus as set in the ETZPC node st,decprot property.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 6c527967 | 21-Jan-2025 |
Raymond Mao <raymond.mao@linaro.org> |
core: expand the fdt transfer entry right before it is being used
Move the expanding of fdt transfer entry from boot_init_primary_early to boot_init_primary_late.
Logically expanding of the fdt ent
core: expand the fdt transfer entry right before it is being used
Move the expanding of fdt transfer entry from boot_init_primary_early to boot_init_primary_late.
Logically expanding of the fdt entry is not required until the system needs to update it with new nodes which happens in init primary late.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 37de1791 | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp2: conf: default enable STGEN for STM32MP2 platforms
Default enable STGEN for STM32MP2 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne C
plat-stm32mp2: conf: default enable STGEN for STM32MP2 platforms
Default enable STGEN for STM32MP2 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 3d20b6a4 | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add STGEN node in stm32mp251.dtsi
Add the STGEN node in the stm32mp251.dtsi SoC device tree file and default enable it as it is the source for the ARM generic timer of the ARM cortexA35.
dts: stm32: add STGEN node in stm32mp251.dtsi
Add the STGEN node in the stm32mp251.dtsi SoC device tree file and default enable it as it is the source for the ARM generic timer of the ARM cortexA35.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| dcdbcea2 | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp2: enable RTC framework if CFG_DRIVERS_RTC is set
If CFG_DRIVERS_RTC is enabled, force the compilation of the file core/drivers/rtc/rtc.c in order to share the generic functions.
Signed
plat-stm32mp2: enable RTC framework if CFG_DRIVERS_RTC is set
If CFG_DRIVERS_RTC is enabled, force the compilation of the file core/drivers/rtc/rtc.c in order to share the generic functions.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 29ee70d6 | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp1: enable RTC framework if CFG_DRIVERS_RTC is set
If CFG_DRIVERS_RTC is enabled, force the compilation of the file core/drivers/rtc/rtc.c in order to share the generic functions.
Signed
plat-stm32mp1: enable RTC framework if CFG_DRIVERS_RTC is set
If CFG_DRIVERS_RTC is enabled, force the compilation of the file core/drivers/rtc/rtc.c in order to share the generic functions.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| f3fc82b9 | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add RTC node in stm32mp251.dtsi
Add the RTC node in stm32mp251.dtsi and default enable it.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere
dts: stm32: add RTC node in stm32mp251.dtsi
Add the RTC node in stm32mp251.dtsi and default enable it.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 4dcbaa6d | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp2: conf: default enable the RTC driver
Default enable the RTC driver support on stm32mp2 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne
plat-stm32mp2: conf: default enable the RTC driver
Default enable the RTC driver support on stm32mp2 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 5eb947b3 | 16-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp1: conf: default enable the RTC driver
Default enable the RTC driver support on stm32mp1 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne
plat-stm32mp1: conf: default enable the RTC driver
Default enable the RTC driver support on stm32mp1 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| bef959c8 | 02-Dec-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: ffa: switch to FF-A version 1.2
Update FF-A minor version from 1 to 2. spmc_exchange_version() is updated to take the new version into account when negotiating with a caller.
Configurati
core: arm: ffa: switch to FF-A version 1.2
Update FF-A minor version from 1 to 2. spmc_exchange_version() is updated to take the new version into account when negotiating with a caller.
Configurations with SPMC at EL3 and S-EL2 supplies an SP manifest when booting OP-TEE, read the FF-A version to use from the manifest instead of using the hard coded version.
The configuration with SPMC at S-EL1, part of OP-TEE, keep the FF-A version at version 1.1 when configured with CFG_NS_VIRTUALIZATION=y as workaround to remain compatible with Xen. This workaround will not be needed after the next Xen release and can be removed then.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| ddec5d6b | 04-Dec-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: update FFA_CONSOLE_LOG_64 for v1.2 SPs
Update FFA_CONSOLE_LOG_64 to handle the ABI extension for FF-A v1.2. The extended ABI is only used for FF-A v1.2 SPs .
Signed-off-by: Jens Wiklande
core: ffa: update FFA_CONSOLE_LOG_64 for v1.2 SPs
Update FFA_CONSOLE_LOG_64 to handle the ABI extension for FF-A v1.2. The extended ABI is only used for FF-A v1.2 SPs .
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 750a54aa | 03-Dec-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: ffa: add FF-A version 1.2 defines
Add defines for SMC IDs introduced with FF-A version 1.2.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.
core: arm: ffa: add FF-A version 1.2 defines
Add defines for SMC IDs introduced with FF-A version 1.2.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| d17db2af | 03-Dec-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs covers the registers
core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs covers the registers x0-x17 to support passing arguments and results according to SMC Calling Convention (SMCCC) version 1.2.
The difference is that before this change x8-x17 couldn't be used as argument nor result and the content was preserved. With this patch are x8-x17 returned as zeroes. New FF-A SMCs can take and return values in the full range x0-x17.
64-bit SMCCC version 1.1 and earlier specified x4-x17 as unpredictable or scratch registers. FF-A has specified x0-x7 as argument and result registers, regardless of SMCCC. This has changed with SMCCC version 1.2 where the two standards harmonize on this.
struct thread_smc_1_2_regs is added in a 32-bit version for compatibility, but it only covers r0-r7.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 7d0f479e | 16-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: mm: dynamic allocation of v7 translation tables
With CFG_DYN_CONFIG enabled allocate translation tables using the boot_mem_*() functions. Static allocation from global variables is still
core: arm: mm: dynamic allocation of v7 translation tables
With CFG_DYN_CONFIG enabled allocate translation tables using the boot_mem_*() functions. Static allocation from global variables is still used with CFG_DYN_CONFIG disabled.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| a28e4a0f | 09-Jul-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: mm: dynamic allocation of LPAE translation tables
With CFG_DYN_CONFIG enabled allocate translation tables using the boot_mem_*() functions. Static allocation from global variables is stil
core: arm: mm: dynamic allocation of LPAE translation tables
With CFG_DYN_CONFIG enabled allocate translation tables using the boot_mem_*() functions. Static allocation from global variables is still used with CFG_DYN_CONFIG disabled.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 18715752 | 09-Jul-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: mm: refactor LPAE translation table handling
Refactor translation table handling to use a more flexible layout of the translation tables in memory. Instead of relying on multidimensional
core: arm: mm: refactor LPAE translation table handling
Refactor translation table handling to use a more flexible layout of the translation tables in memory. Instead of relying on multidimensional array use helper functions to calculate the address of each translation table as needed.
Preparing for future changes, no change in behaviour.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 0799b137 | 16-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: add boot mem paddings to the heap
Add the paddings added due to requested alignment in boot mem allocations to the heap.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-b
core: arm: add boot mem paddings to the heap
Add the paddings added due to requested alignment in boot mem allocations to the heap.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b8a9277e | 03-Jan-2025 |
Ed Tubbs <ectubbs@gmail.com> |
plat-rockchip: rk3588: add TRNG support
Add TRNG support for Rockchip rk3588
Signed-off-by: Ed Tubbs <ectubbs@gmail.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wik
plat-rockchip: rk3588: add TRNG support
Add TRNG support for Rockchip rk3588
Signed-off-by: Ed Tubbs <ectubbs@gmail.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d5749450 | 12-Oct-2024 |
Tony Han <tony.han@microchip.com> |
plat-sam: enable SCMI reset domain management protocol and rstctrl driver
Enable CFG_SCMI_MSG_RESET_DOMAIN and CFG_DRIVERS_RSTCTRL.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienn
plat-sam: enable SCMI reset domain management protocol and rstctrl driver
Enable CFG_SCMI_MSG_RESET_DOMAIN and CFG_DRIVERS_RSTCTRL.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 3f788a22 | 12-Oct-2024 |
Tony Han <tony.han@microchip.com> |
plat-sam: scmi_server: use SCMI reset to manage USB reset for sama7g5
Enable "reset domain management protocol", add reset domains to SCMI channel and add functions for SCMI reset domain.
Signed-of
plat-sam: scmi_server: use SCMI reset to manage USB reset for sama7g5
Enable "reset domain management protocol", add reset domains to SCMI channel and add functions for SCMI reset domain.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 2429722f | 19-Dec-2024 |
Yuvraj Sakshith <ysakshith@gmail.com> |
core: arm: guest ID test for notif and VM creation
Block normal world from calling OPTEE_SMC_VM_CREATED with reserved hypervisor client-id (0) as VMID parameter.
Normal world calls OPTEE_SMC_VM_CRE
core: arm: guest ID test for notif and VM creation
Block normal world from calling OPTEE_SMC_VM_CREATED with reserved hypervisor client-id (0) as VMID parameter.
Normal world calls OPTEE_SMC_VM_CREATED with guest VMID in a1 and HYP_CLNT_ID in a7. This eventually leads to copying of __data_start to __data_end from the default partition to the guest's MMU partition. Everything goes well until normal world passes HYP_CLNT_ID into a1 which goes unchecked in OPTEE. When the "second VM" is created from normal world, the first VM's MMU partition's __data_start is copied into the new VM's MMU partition which eventually breaks the bpool freelist pointers.
This can deliberately be used by normal world to put OP-TEE into panic.
Set guest ID when NOTIF_EVENT_STARTED is called preventing assetion failure in get_notif_data().
Fixes: d237e616e155 ("core: make generic notifications virtualization-aware") Signed-off-by: Yuvraj Sakshith <ysakshith@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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