| 68804933 | 05-Aug-2021 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: allow using sama5d2_xplained instead of sama5d2xult
sama5d2_xplained is used in various software (U-Boot, Linux, etc). Allow using it and deprecate sama5d2xult.
Acked-by: Etienne Carriere
plat-sam: allow using sama5d2_xplained instead of sama5d2xult
sama5d2_xplained is used in various software (U-Boot, Linux, etc). Allow using it and deprecate sama5d2xult.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| c3ad6785 | 02-Jul-2021 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: add sama5d27-som1-ek board support and change default platform
sama5d2 xplained board is going to be deprecated. Switch to a board that is going to be supported for a longer period, sama5d
plat-sam: add sama5d27-som1-ek board support and change default platform
sama5d2 xplained board is going to be deprecated. Switch to a board that is going to be supported for a longer period, sama5d27_som1_ek.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 0a144f2d | 04-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: add support to build embedded dtb
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com> |
| 7de7aa58 | 16-Sep-2021 |
Clément Léger <clement.leger@bootlin.com> |
dts: at91: add device tree for sama5d27_som1_ek board
Since this board is newer and is going to be supported for a longer period than the sama5d2_xplained.
Acked-by: Nicolas Ferre <nicolas.ferre@mi
dts: at91: add device tree for sama5d27_som1_ek board
Since this board is newer and is going to be supported for a longer period than the sama5d2_xplained.
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| dd7e1845 | 16-Sep-2021 |
Clément Léger <clement.leger@bootlin.com> |
dts: at91: add device trees for sama5d2_xplained
Import device-tree from linux for sama5d2 and relicense them with dual GPL/BSD 3-Clause
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Ack
dts: at91: add device trees for sama5d2_xplained
Import device-tree from linux for sama5d2 and relicense them with dual GPL/BSD 3-Clause
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 60d883c8 | 20-Oct-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: clarify internal_offset in mobj_ffa_get_by_cookie()
Adds a comment in mobj_ffa_get_by_cookie() clarifying how internal_offset and the page_offset kept in a struct mobj_ffa relates.
Acked-by:
core: clarify internal_offset in mobj_ffa_get_by_cookie()
Adds a comment in mobj_ffa_get_by_cookie() clarifying how internal_offset and the page_offset kept in a struct mobj_ffa relates.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2ac13956 | 20-Oct-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: use READ_ONCE() in thread_rpc_alloc()
Uses the READ_ONCE() macro in thread_rpc_alloc() when reading fields from non-secure shared memory to make sure that they are read only once.
Acked-by: E
core: use READ_ONCE() in thread_rpc_alloc()
Uses the READ_ONCE() macro in thread_rpc_alloc() when reading fields from non-secure shared memory to make sure that they are read only once.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6d8430f9 | 27-Sep-2021 |
Usama Arif <usama.arif@arm.com> |
plat-totalcompute: add support for higher DRAM
The new 6GB DRAM bank starts at 0x8080000000.
Signed-off-by: Usama Arif <usama.arif@arm.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> |
| a9a8e483 | 29-Sep-2021 |
Davidson K <davidson.kumaresan@arm.com> |
plat-totalcompute: Update SP manifest as per latest SPMC changes
Update UUID to little endian: The Hafnium SPMC expects a little endian representation of the UUID as an array of four integers in the
plat-totalcompute: Update SP manifest as per latest SPMC changes
Update UUID to little endian: The Hafnium SPMC expects a little endian representation of the UUID as an array of four integers in the SP manifest.
Update messaging-method: Fix the SP manifest to align with messaging method field changes introduced in hafnium repository with commit "fix(ff-a): use messaging info from the manifest"
Signed-off-by: Davidson K <davidson.kumaresan@arm.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 9e788d37 | 07-Sep-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: virt: check pa at end of check_pa_matches_va()
Prior to this patch did check_pa_matches_va() skip the final catchall check on the physical address. It should be possible to perform this check
core: virt: check pa at end of check_pa_matches_va()
Prior to this patch did check_pa_matches_va() skip the final catchall check on the physical address. It should be possible to perform this check with virtualization enabled so enable it for virtualization too.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a94111b9 | 31-Aug-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: virtualization.h: add dummy static inline functions
Adds dummy static inline functions to replace the normal virt_*() functions in virtualization.h when CFG_VIRTUALIZATION is not configured.
core: virtualization.h: add dummy static inline functions
Adds dummy static inline functions to replace the normal virt_*() functions in virtualization.h when CFG_VIRTUALIZATION is not configured.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| bddb2f89 | 31-Aug-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: virt: use TEE_Result return type for virt_*() functions
Uses TEE_Result as return type for all virt_*() functions returning anything but void in <kernel/virtualization.h>
Reviewed-by: Etienne
core: virt: use TEE_Result return type for virt_*() functions
Uses TEE_Result as return type for all virt_*() functions returning anything but void in <kernel/virtualization.h>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| be501eb1 | 05-Oct-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
util: rename ALIGNMENT_IS_OK to IS_ALIGNED_WITH_TYPE
Implement the renamed macro using the IS_ALIGNED definition.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etienne Carrie
util: rename ALIGNMENT_IS_OK to IS_ALIGNED_WITH_TYPE
Implement the renamed macro using the IS_ALIGNED definition.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6d777f26 | 05-Oct-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
util: define IS_ALIGNED macro
Keep a single version of the macro definition.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Revi
util: define IS_ALIGNED macro
Keep a single version of the macro definition.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6fd1b428 | 11-Oct-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: fix securing clock tree
Fix bug introduced in commit [1] that added HCLK5 parent clock identifier but did not handle it from secure_parent_clocks() resulting in core panic when RCC se
plat-stm32mp1: fix securing clock tree
Fix bug introduced in commit [1] that added HCLK5 parent clock identifier but did not handle it from secure_parent_clocks() resulting in core panic when RCC security hardening is enabled.
Fixes: [1] commit ea6f231cbdfa ("plat-stm32mp1: fix clock rate computation for CRYP1/GPIOZ/HASH1/MDMA") Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8f97fe77 | 31-Aug-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: call mapped_shm_init() via preinit()
Calls mapped_shm_init() and mobj_mapped_shm_init() a bit earlier by registering it with preinit().
Acked-by: Jerome Forissier <jerome@forissier.org> Revie
core: call mapped_shm_init() via preinit()
Calls mapped_shm_init() and mobj_mapped_shm_init() a bit earlier by registering it with preinit().
Acked-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8fef9e0c | 31-Aug-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: virt: initialize heap via preinit_early()
Registers a function to initialize the heap used by OP-TEE partitions instead of doing it via init_tee_runtime(). With this the malloc() works a bit e
core: virt: initialize heap via preinit_early()
Registers a function to initialize the heap used by OP-TEE partitions instead of doing it via init_tee_runtime(). With this the malloc() works a bit earlier when an OP-TEE partition is initialized.
Acked-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| bd59a6ad | 31-Aug-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add call_preinitcalls()
Adds call_preinitcalls() for really early initcalls. This function is supposed to be called before call_initcalls() is called. With virtualization enabled it is called
core: add call_preinitcalls()
Adds call_preinitcalls() for really early initcalls. This function is supposed to be called before call_initcalls() is called. With virtualization enabled it is called in a blocking context when the OP-TEE partition is created.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2de28800 | 04-Oct-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
core: update reference link to PrimeCell Cache Controller
Update broken link
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org> |
| d1b3da61 | 13-Sep-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
ARM: dts: stm32mp15: secure-status from RCC node
Remove specific secure-status property from RCC clock/reset device node in the DT since useless now that RCC secure hardening configuration is driven
ARM: dts: stm32mp15: secure-status from RCC node
Remove specific secure-status property from RCC clock/reset device node in the DT since useless now that RCC secure hardening configuration is driven from the node compatible property, not from status/secure-status state.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| ecef9014 | 03-Sep-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: clk: split clock initialization sequence
Move clock initialization sequence from function stm32mp1_clk_early_init() to a new local function stm32mp1_clk_init() that get all FDT refere
plat-stm32mp1: clk: split clock initialization sequence
Move clock initialization sequence from function stm32mp1_clk_early_init() to a new local function stm32mp1_clk_init() that get all FDT references. This change will allow to factorize clock initialization when generic clock framework will be supported.
Implement enable_rcc_tzen() and disable_rcc_tzen() helper functions for the same purpose.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| d40ee790 | 24-Sep-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: clk: new compatible st,stm32mp1-rcc-secure
Update to Linux v5.14 DT bindings on RCC clock driver. Legacy compatible "st,stm32mp1-rcc" relates to RCC with security hardening disabled.
plat-stm32mp1: clk: new compatible st,stm32mp1-rcc-secure
Update to Linux v5.14 DT bindings on RCC clock driver. Legacy compatible "st,stm32mp1-rcc" relates to RCC with security hardening disabled. New compatible "st,stm32mp1-rcc-secure" relates to platforms where RCC security hardening is enabled. The new compatible was introduced in Linux kernel v5.14 from [1].
Link: [1] https://lore.kernel.org/r/20210617051814.12018-11-gabriel.fernandez@foss.st.com Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 7a2947dc | 24-Sep-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: fix dependencies in shared resources
GPIO pin counting depends on embedded DTB, not CFG_DT. Process GPIO configuration upon CFG_STM32_GPIO=y.
Signed-off-by: Etienne Carriere <etienne
plat-stm32mp1: fix dependencies in shared resources
GPIO pin counting depends on embedded DTB, not CFG_DT. Process GPIO configuration upon CFG_STM32_GPIO=y.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 56b7d5f5 | 24-Sep-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: GPIO and SCMI mandate embedded DTB
Mandate embedded DTB support for stm32mp1 GPIO driver and SCMI server.
Platform stm32mp1 can be build without embedded DTB support in which case m
plat-stm32mp1: GPIO and SCMI mandate embedded DTB
Mandate embedded DTB support for stm32mp1 GPIO driver and SCMI server.
Platform stm32mp1 can be build without embedded DTB support in which case most peripheral cannot be used. This configuration is used for development purpose for which the platform security hardening is disabled.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 16c88879 | 24-Sep-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: embed GPIO banks helper upon CFG_STM32_GPIO
Embed platform functions stm32_*_gpio_bank_*() upon CFG_STM32_GPIO.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by
plat-stm32mp1: embed GPIO banks helper upon CFG_STM32_GPIO
Embed platform functions stm32_*_gpio_bank_*() upon CFG_STM32_GPIO.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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