History log of /optee_os/core/arch/arm/plat-zynq7k/plat_init.S (Results 1 – 7 of 7)
Revision Date Author Comments
# 3513f961 03-Sep-2020 Jerome Forissier <jerome@forissier.org>

arm32: fold UNWIND(.fnstart/.fnend) into the FUNC macros

This change applies to arm32 assembler sources.

Instead of using UNWIND(.fnstart) after FUNC or LOCAL_FUNC and
UNWIND(.fnend) before END_FUN

arm32: fold UNWIND(.fnstart/.fnend) into the FUNC macros

This change applies to arm32 assembler sources.

Instead of using UNWIND(.fnstart) after FUNC or LOCAL_FUNC and
UNWIND(.fnend) before END_FUNC, let's fold these statements into the
FUNC macros.

The .fnstart/.fnend directives mark the start and end of a function
with an unwind table entry (.ARM.exidx) and therefore a function
without them has no entry and cannot be unwound. This means that a
stack dump (on abort or panic) would stop when reaching such a
function.

As a result of this patch, a small number of functions now have an
entry in the unwind table when they had none before (the functions
which were using FUNC or LOCAL_FUNC but had no .fnstart/.fnend). It was
almost always a bug and this pacth only increases the size of the
.ARM.exidx section by a few bytes (tested on QEMU).

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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# 827be46c 03-Sep-2020 Jerome Forissier <jerome@forissier.org>

arm32: move the UNWIND() macro to <asm.S>

All the users of the UNWIND() macro include <asm.S> already, which is
therefore a good place to define this macro. Let's move it from
<kernel/unwind.h> to <

arm32: move the UNWIND() macro to <asm.S>

All the users of the UNWIND() macro include <asm.S> already, which is
therefore a good place to define this macro. Let's move it from
<kernel/unwind.h> to <asm.S>, remove a couple of duplicates in
assembler files, and drop the useless includes.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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# 1bb92983 15-Dec-2017 Jerome Forissier <jerome.forissier@linaro.org>

Add SPDX license identifiers

Adds one SPDX-License-Identifier line [1] to each source files that
contains license text.

Generated by [2]:
spdxify.py --add-spdx optee_os/

The scancode tool [3] wa

Add SPDX license identifiers

Adds one SPDX-License-Identifier line [1] to each source files that
contains license text.

Generated by [2]:
spdxify.py --add-spdx optee_os/

The scancode tool [3] was used to double check the license matching
code in the Python script. All the licenses detected by scancode are
either detected by spdxify.py, or have no SPDX identifier, or are false
matches.

Link: [1] https://spdx.org/licenses/
Link: [2] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py
Link: [3] https://github.com/nexB/scancode-toolkit
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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# a0c170d0 14-Mar-2017 Etienne Carriere <etienne.carriere@linaro.org>

plat-zynq7k: fix NSACR initialization

Bits #9..#0 of CPU register NSACR are specified by ARM as SBZP ("Set
Bit to Zero or Preserve on write"). This change fixes plat-zynq7k to
conform with the specs

plat-zynq7k: fix NSACR initialization

Bits #9..#0 of CPU register NSACR are specified by ARM as SBZP ("Set
Bit to Zero or Preserve on write"). This change fixes plat-zynq7k to
conform with the specs.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 234b9045 14-Mar-2017 Etienne Carriere <etienne.carriere@linaro.org>

core: use mov_imm instead of movw/movt

Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklan

core: use mov_imm instead of movw/movt

Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 1c3ae8ed 14-Mar-2017 Etienne Carriere <etienne.carriere@linaro.org>

plat-zynq7k: fix cpu power control register init

Before this change, a reserved bit was set in the PCR instead of
enabling the clock gating support, as configured in other supported
Cortex-A9 platfo

plat-zynq7k: fix cpu power control register init

Before this change, a reserved bit was set in the PCR instead of
enabling the clock gating support, as configured in other supported
Cortex-A9 platforms.

Reported-by: Yves Lefloch <YvesMarie_Lefloch@sigmadesigns.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 57f3d625 09-Nov-2016 yanyan-wrs <yan.yan@windriver.com>

core: arm: support Xilinx ZYNQ7000 ZC702 (plat-zynq7k)

Signed-off-by: Yan Yan <yan.yan@windriver.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wi

core: arm: support Xilinx ZYNQ7000 ZC702 (plat-zynq7k)

Signed-off-by: Yan Yan <yan.yan@windriver.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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